Patents by Inventor Young-Gwan Ko

Young-Gwan Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180145044
    Abstract: An electronic component package and a method of manufacturing the same are provided. The electronic component package includes a frame having a through-hole, an electronic component disposed in the through-hole of the frame, and a redistribution part disposed at one side of the frame and the electronic component. One or more first wiring layers of the frame are electrically connected to the electronic component through the redistribution part.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 24, 2018
    Inventors: Dae Hyun PARK, Han KIM, Kang Heon HUR, Young Gwan KO, Jung Ho SHIM
  • Patent number: 9966178
    Abstract: Chip electronic component and manufacturing method thereof disclosed. An example aspect provides a chip electronic component. The chip electronic component includes a magnetic body including a magnetic material, a coil part embedded in the magnetic body and formed to be connected to a first coil conductor and a second coil conductor, an insulating layer covering the first coil conductor and the second coil conductor, and a magnetic layer formed on the insulating layer.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: May 8, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Youn-Soo Seo, Myung-Sam Kang, Jin-Soo Kim, Young-Gwan Ko, Woon-Chul Choi, In-Seok Kim, Hye-Yeon Cha
  • Publication number: 20180096927
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Application
    Filed: September 19, 2017
    Publication date: April 5, 2018
    Inventors: Da Hee KIM, Young Gwan KO, Sung Won JEONG
  • Publication number: 20180070458
    Abstract: A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok-Hwan AHN, Mi-Sun HWANG, Young-Gwan KO, Jong-Seok BAE, Myung-Sam KANG
  • Publication number: 20180061794
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; a resin layer disposed on the encapsulant; and a rear redistribution layer embedded in the encapsulant so that one surface thereof is exposed by the encapsulant, wherein the resin layer covers at least portions of the exposed one surface of the rear redistribution layer, and the rear redistribution layer is electrically connected to the redistribution layer of the first connection member through connection members formed in first openings penetrating through the resin layer and the encapsulant.
    Type: Application
    Filed: January 12, 2017
    Publication date: March 1, 2018
    Inventors: Da Hee KIM, Young Gwan KO
  • Patent number: 9848492
    Abstract: A printed circuit board includes: an insulating layer including a cavity formed therein, the cavity being recessed into the insulating layer from a top surface of the insulating layer; a first circuit layer formed inside the insulating layer such that a portion of the first circuit layer is disposed within the cavity; a second circuit layer disposed above the insulating layer; a first surface-treated layer disposed above the portion of the first circuit layer disposed within the cavity; and a second surface-treated layer disposed above the second circuit layer.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: December 19, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Soon-Oh Jung, Kyung-Hwan Ko, Yong-Ho Baek
  • Patent number: 9842789
    Abstract: An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity of the frame, a first metal layer disposed on an inner wall of the cavity of the frame, an encapsulant encapsulating the electronic component, and a redistribution layer disposed below the frame and the electronic component.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: December 12, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung On Kang, Woo Sung Han, Young Gwan Ko, Chul Kyu Kim, Han Kim
  • Patent number: 9837343
    Abstract: A chip embedded substrate includes: an insulating layer having outer layer circuit patterns provided on any one of an upper surface and a lower surface thereof; a chip embedded in the insulating layer; and internal circuit patterns included in the insulating layer and disposed between a height of a top surface of the chip and a height of a bottom surface thereof.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: December 5, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Joon Sung Kim, Yong Ho Baek, Jung Hyun Cho, Eung Suek Lee, Jae Hoon Choi, Young Gwan Ko
  • Patent number: 9832866
    Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok-Hwan Ahn, Mi-Sun Hwang, Young-Gwan Ko, Jong-Seok Bae, Myung-Sam Kang
  • Patent number: 9832856
    Abstract: Disclosed are a circuit board and a method of manufacturing the same. The circuit board includes an insulating part, a heat-transfer body disposed in the insulating part, the heat-transfer body including a thermally conductive material formed in a column shape, and a function hole penetrating the heat-transfer body between a top surface and a bottom surface of the heat-transfer body.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae-Hong Min, Myung-Sam Kang, Young-Gwan Ko
  • Publication number: 20170330814
    Abstract: An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity of the frame, a first metal layer disposed on an inner wall of the cavity of the frame, an encapsulant encapsulating the electronic component, and a redistribution layer disposed below the frame and the electronic component.
    Type: Application
    Filed: August 3, 2017
    Publication date: November 16, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung On KANG, Woo Sung HAN, Young Gwan KO, Chul Kyu KIM, Han KIM
  • Publication number: 20170309531
    Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole.
    Type: Application
    Filed: July 12, 2017
    Publication date: October 26, 2017
    Inventors: Young Gwan KO, Sung Won JEONG
  • Patent number: 9793250
    Abstract: There are provided a package board, a method for manufacturing the same, and a package on package having the same. The package board according to an exemplary embodiment of the present disclosure includes a first insulating layer formed with a cavity having a penetrating shape; and a first connection pad formed to penetrate through the first insulating layer and formed at one side of the cavity.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: October 17, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung Sam Kang, Young Gwan Ko, Hye Jin Kim, Hye Won Jung, Min Jae Seong
  • Publication number: 20170287853
    Abstract: The fan-out semiconductor package includes: a semiconductor chip having an active surface having a connection pad disposed thereon and an inactive surface disposed to oppose the active surface; a first capacitor disposed adjacently to the semiconductor chip; an encapsulant at least partially encapsulating the first connection member and the semiconductor chip; a first connection member disposed on the encapsulant, the first capacitor, and the semiconductor chip, and a second capacitor disposed on the other surface of the first connection member opposing one surface of the first connection member on which the semiconductor chip is disposed, wherein the first connection member includes a redistribution layer electrically connected to the connection pad of the semiconductor chip, the first capacitor, and the second capacitor, and the first capacitor and the second capacitor are electrically connected to the connection pad through a common power wiring of the redistribution layer.
    Type: Application
    Filed: September 28, 2016
    Publication date: October 5, 2017
    Inventors: Han KIM, Mi Ja HAN, Kang Heon HUR, Young Gwan KO
  • Publication number: 20170271272
    Abstract: The present disclosure relates to a fan-out semiconductor package including a frame having a through hole, a semiconductor chip disposed in the through hole, a first encapsulant disposed in a space between the frame and the semiconductor chip, a second encapsulant disposed on one sides of the frame and the semiconductor chip, and a redistribution layer disposed on the other sides of the frame and the semiconductor chip, and a method of manufacturing the same. The first encapsulant and the second encapsulant may include different materials.
    Type: Application
    Filed: November 15, 2016
    Publication date: September 21, 2017
    Inventors: Ji Hyun LEE, Kyoung Moo HARR, Seung Yeop KOOK, Ji Hoon KIM, Young Gwan KO
  • Publication number: 20170251548
    Abstract: A circuit board is disclosed. In addition to insulating layers, the circuit board includes a structure for heat transfer that includes a first layer that is formed of graphite or graphene, a second layer that is formed of metallic material and disposed on one surface of the first layer, and a third layer that is formed of metallic material and disposed on the other surface of the first layer, and at least a portion of the structure for heat transfer is inserted into an insulation layer. Such a circuit board provides improved heat management. Also disclosed is a method of manufacturing the circuit board.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 31, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae-Hong MIN, Myung-Sam KANG, Jung-Han LEE, Young-Gwan KO
  • Patent number: 9741630
    Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: August 22, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Gwan Ko, Sung Won Jeong
  • Patent number: 9736939
    Abstract: A printed circuit board may include: a first circuit layer; a first insulating layer disposed on the first circuit layer; a high-rigidity layer disposed on the first insulating layer; and a second circuit layer disposed on the high-rigidity layer and connected to the first circuit layer by a first via extending through the first insulating layer and the high-rigidity layer, wherein a rigidity of the high-rigidity layer is greater than a rigidity of the first insulating layer.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: August 15, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Hyeon Cho, Yong Ho Baek, Young Gwan Ko, Yoong Oh, Young Kuk Ko
  • Patent number: 9736927
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board include a glass plate, an insulating member penetrating through the glass plate, insulating layers disposed on a first surface and a second surface of the glass plate, and a via through the insulating member.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: August 15, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Hyeon Cho, Yoong Oh, Young Gwan Ko, Yong Ho Baek, Young Kuk Ko
  • Patent number: 9699885
    Abstract: Disclosed herein is a circuit board. According to an exemplary embodiment of the present disclosure, a circuit board has a structure in which at least a portion of a first heat transfer structure in which a metal layer and an insulating layer are alternately stacked is inserted into an insulating part.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 4, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Hong Min, Myung Sam Kang, Young Gwan Ko, Min Jae Seong