Patents by Inventor Youping Zhang
Youping Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10296681Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.Type: GrantFiled: May 17, 2018Date of Patent: May 21, 2019Assignee: ASML Netherlands B.V.Inventors: Guangqing Chen, Shufeng Bai, Eric Richard Kent, Yen-Wen Lu, Paul Anthony Tuffy, Jen-Shiang Wang, Youping Zhang, Gertjan Zwartjes, Jan Wouter Bijlsma
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Publication number: 20190018326Abstract: There is disclosed a method of measuring a process parameter for a manufacturing process involving lithography. In a disclosed arrangement the method comprises performing first and second measurements of overlay error in a region on a substrate, and obtaining a measure of the process parameter based on the first and second measurements of overlay error. The first measurement of overlay error is designed to be more sensitive to a perturbation in the process parameter than the second measurement of overlay error by a known amount.Type: ApplicationFiled: September 7, 2018Publication date: January 17, 2019Applicant: ASML Netherlands B.V.Inventors: Maurits Van Der Schaar, Arie Jeffrey Den Boef, Omer Abubaker Omer Adam, Te-Chih Huang, Youping Zhang
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Publication number: 20180373168Abstract: A target structure, wherein the target structure is configured to be measured with a metrology tool that has a diffraction threshold; the target structure including: one or more patterns supported on a substrate, the one or more patterns being periodic with a first period in a first direction and periodic with a second period in a second direction, wherein the first direction and second direction are different and parallel to the substrate, and the first period is equal to or greater than the diffraction threshold and the second period is less than the diffraction threshold.Type: ApplicationFiled: December 13, 2016Publication date: December 27, 2018Applicant: ASML NETHERLANDS B.V.Inventors: Maurits VAN DER SCHAAR, Youping ZHANG, Hua XU
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Publication number: 20180364590Abstract: A method includes projecting an illumination beam of radiation onto a metrology target on a substrate, detecting radiation reflected from the metrology target on the substrate, and determining a characteristic of a feature on the substrate based on the detected radiation, wherein a polarization state of the detected radiation is controllably selected to optimize a quality of the detected radiation.Type: ApplicationFiled: November 30, 2016Publication date: December 20, 2018Applicant: ASML NETHERLANDS B.V.Inventors: Maurits VAN DER SCHAAR, Patrick WARNAAR, Youping ZHANG, Arie Jeffrey DEN BOEF, Feng XIAO, Martin EBERT
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Publication number: 20180268093Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.Type: ApplicationFiled: May 17, 2018Publication date: September 20, 2018Applicant: ASML Netherlands B.V.Inventors: Guangqing CHEN, Shufeng Bai, Eric Richard Kent, Yen-Wen Lu, Paul Anthony Tuffy, Jen-Shiang Wang, Youping Zhang, Gertjan Zwartjes, Jan Wouter Bijlsma
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Patent number: 10073357Abstract: There is disclosed a method of measuring a process parameter for a manufacturing process involving lithography. In a disclosed arrangement the method comprises performing first and second measurements of overlay error in a region on a substrate, and obtaining a measure of the process parameter based on the first and second measurements of overlay error. The first measurement of overlay error is designed to be more sensitive to a perturbation in the process parameter than the second measurement of overlay error by a known amount.Type: GrantFiled: January 28, 2015Date of Patent: September 11, 2018Assignee: ASML Netherlands B.V.Inventors: Maurits Van Der Schaar, Arie Jeffrey Den Boef, Omer Abubaker Omer Adam, Te-Chih Huang, Youping Zhang
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Patent number: 10061212Abstract: Disclosed is a method of measuring a target, associated substrate comprising a target and computer program. The target comprises overlapping first and second periodic structures. The method comprising illuminating the target with measurement radiation and detecting the resultant scattered radiation. The pitch of the second periodic structure is such, relative to a wavelength of the measurement radiation and its angle of incidence on the target, that there is no propagative non-zeroth diffraction at the second periodic structure resultant from said measurement radiation being initially incident on said second periodic structure. There may be propagative non-zeroth diffraction at the second periodic structure which comprises further diffraction of one or more non-zero diffraction orders resultant from diffraction by the first periodic structure.Type: GrantFiled: April 3, 2017Date of Patent: August 28, 2018Assignee: ASML Netherlands B.V.Inventors: Maurits Van Der Schaar, Richard Johannes Franciscus Van Haren, Everhardus Cornelis Mos, Youping Zhang
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Publication number: 20180238737Abstract: A method of measuring n values of a parameter of interest (e.g., overlay) relating to a structure forming process, where n>1. The method includes performing n measurements on each of n+1 targets, each measurement performed with measurement radiation having a different wavelength and/or polarization combination and determining the n values for a parameter of interest from the n measurements of n+1 targets, each of the n values relating to the parameter of interest for a different pair of the layers. Each target includes n+1 layers, each layer including a periodic structure, the targets including at least n biased targets having at least one biased periodic structure formed with a positional bias relative to the other layers, the biased periodic structure being in at least a different one of the layers per biased target. Also disclosed is a substrate having such a target and a patterning device for forming such a target.Type: ApplicationFiled: April 25, 2018Publication date: August 23, 2018Applicant: ASML NETHERLANDS B.V.Inventors: Chi-Hsiang FAN, Maurits VAN DER SCHAAR, Youping ZHANG
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Patent number: 10007744Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.Type: GrantFiled: November 13, 2015Date of Patent: June 26, 2018Assignee: ASML NETHERLANDS B.V.Inventors: Guangqing Chen, Shufeng Bai, Eric Richard Kent, Yen-Wen Lu, Paul Anthony Tuffy, Jen-Shiang Wang, Youping Zhang, Gertjan Zwartjes, Jan Wouter Bijlsma
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Publication number: 20170293233Abstract: Disclosed is a method of measuring a target, associated substrate comprising a target and computer program. The target comprises overlapping first and second periodic structures. The method comprising illuminating the target with measurement radiation and detecting the resultant scattered radiation. The pitch of the second periodic structure is such, relative to a wavelength of the measurement radiation and its angle of incidence on the target, that there is no propagative non-zeroth diffraction at the second periodic structure resultant from said measurement radiation being initially incident on said second periodic structure. There may be propagative non-zeroth diffraction at the second periodic structure which comprises further diffraction of one or more non-zero diffraction orders resultant from diffraction by the first periodic structure.Type: ApplicationFiled: April 3, 2017Publication date: October 12, 2017Applicant: ASML Netherlands B.V.Inventors: Maurits VAN DER SCHAAR, Richard Johannes Franciscus VAN HAREN, Everhardus Cornelis MOS, Youping ZHANG
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Publication number: 20170082927Abstract: A method to improve a lithographic process for imaging a portion of a design layout onto a substrate using a lithographic projection apparatus, the method including: computing a multi-variable cost function of a plurality of design variables that are characteristics of the lithographic process, and reconfiguring the characteristics of the lithographic process by adjusting the design variables until a predefined termination condition is satisfied. The multi-variable cost function may be a function of one or more pattern shift errors. Reconfiguration of the characteristics may be under one or more constraints on the one or more pattern shift errors.Type: ApplicationFiled: March 3, 2015Publication date: March 23, 2017Applicant: ASML Netherlands B.V.Inventors: Duan-Fu Stephen HSU, Jianjun JIA, Xiaofeng LIU, Youping ZHANG
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Publication number: 20170059999Abstract: A substrate has first and second target structures formed thereon by a lithographic process. Each target structure has two-dimensional periodic structure formed in a single material layer on a substrate using first and second lithographic steps, wherein, in the first target structure, features defined in the second lithographic step are displaced relative to features defined in the first lithographic step by a first bias amount that is close to one half of a spatial period of the features formed in the first lithographic step, and, in the second target structure, features defined in the second lithographic step are displaced relative to features defined in the first lithographic step by a second bias amount close to one half of said spatial period and different to the first bias amount.Type: ApplicationFiled: August 15, 2016Publication date: March 2, 2017Applicant: ASML Netherlands B.V.Inventors: Maurits VAN DER SCHAAR, Youping Zhang, Hendrik Jan Hidde Smilde, Anagnostis Tsiatmas, Adriaan Johan Van Leest, Alok Verma, Thomas Theeuwes, Hugo Augustinus Joseph Cramer, Paul Christiaan Hinnen
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Publication number: 20160349627Abstract: There is disclosed a method of measuring a process parameter for a manufacturing process involving lithography. In a disclosed arrangement the method comprises performing first and second measurements of overlay error in a region on a substrate, and obtaining a measure of the process parameter based on the first and second measurements of overlay error. The first measurement of overlay error is designed to be more sensitive to a perturbation in the process parameter than the second measurement of overlay error by a known amount.Type: ApplicationFiled: January 28, 2015Publication date: December 1, 2016Applicant: ASML Netherlands B.V.Inventors: Maurits VAN DER SCHAAR, Arie Jeffrey DEN BOEF, Omer Abubaker Omer ADAM, Te-Chih HUANG, Youping ZHANG
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Publication number: 20160140267Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.Type: ApplicationFiled: November 13, 2015Publication date: May 19, 2016Applicant: ASML NETHERLANDS B.V.Inventors: Guangqing CHEN, Shufeng BAI, Eric Richard KENT, Yen-Wen LU, Paul Anthony TUFFY, Jen-Shiang WANG, Youping ZHANG, Gertjan ZWARTJES, Jan Wouter BIJLSMA
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Publication number: 20150153651Abstract: The present invention relates to methods and systems for designing gauge patterns that are extremely sensitive to parameter variation, and thus robust against random and repetitive measurement errors in calibration of a lithographic process utilized to image a target design having a plurality of features. The method may include identifying most sensitive line width/pitch combination with optimal assist feature placement which leads to most sensitive CD (or other lithography response parameter) changes against lithography process parameter variations, such as wavefront aberration parameter variation. The method may also include designing gauges which have more than one test patterns, such that a combined response of the gauge can be tailored to generate a certain response to wavefront-related or other lithographic process parameters. The sensitivity against parameter variation leads to robust performance against random measurement error and/or any other measurement error.Type: ApplicationFiled: December 18, 2014Publication date: June 4, 2015Applicant: ASML NETHERLANDS B.V.Inventors: Hanying FENG, Yu CAO, Jun YE, Youping ZHANG
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Patent number: 8918742Abstract: The present invention relates to methods and systems for designing gauge patterns that are extremely sensitive to parameter variation, and thus robust against random and repetitive measurement errors in calibration of a lithographic process utilized to image a target design having a plurality of features. The method may include identifying most sensitive line width/pitch combination with optimal assist feature placement which leads to most sensitive CD (or other lithography response parameter) changes against lithography process parameter variations, such as wavefront aberration parameter variation. The method may also include designing gauges which have more than one test patterns, such that a combined response of the gauge can be tailored to generate a certain response to wavefront-related or other lithographic process parameters. The sensitivity against parameter variation leads to robust performance against random measurement error and/or any other measurement error.Type: GrantFiled: July 5, 2012Date of Patent: December 23, 2014Assignee: ASML Netherlands B.V.Inventors: Hanying Feng, Yu Cao, Jun Ye, Youping Zhang
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Patent number: 8782574Abstract: A system and method for integrated circuit design are disclosed to enhance manufacturability of circuit layouts by applying layout processing to handle imperfections such as jogs in integrated circuit design layouts. The layout processing may be applied to jogs in the original integrated circuit design layout or jogs created post-design by process biases, as well as design rule check and Boolean processes or process compensation.Type: GrantFiled: February 2, 2009Date of Patent: July 15, 2014Inventors: Youping Zhang, Weinong Lai
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Patent number: 8739082Abstract: The present invention relates to a method of selecting a subset of patterns from a design, to a method of performing source and mask optimization, and to a computer program product for performing the method of selecting a subset of patterns from a design. According to certain aspects, the present invention enables coverage of the full design while lowering the computation cost by intelligently selecting a subset of patterns from a design in which the design or a modification of the design is configured to be imaged onto a substrate via a lithographic process. The method of selecting the subset of patterns from a design includes identifying a set of patterns from the design related to the predefined representation of the design. By selecting the subset of patterns according to the method, the selected subset of patterns constitutes a similar predefined representation of the design as the set of patterns.Type: GrantFiled: October 26, 2010Date of Patent: May 27, 2014Inventors: Hua-Yu Liu, Luoqi Chen, Hong Chen, Zhi-Pan Li, Jun Ye, Min-Chun Tsai, Youping Zhang, Yen-Wen Lu, Jiangwei Li
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Publication number: 20130014065Abstract: The present invention relates to methods and systems for designing gauge patterns that are extremely sensitive to parameter variation, and thus robust against random and repetitive measurement errors in calibration of a lithographic process utilized to image a target design having a plurality of features. The method may include identifying most sensitive line width/pitch combination with optimal assist feature placement which leads to most sensitive CD (or other lithography response parameter) changes against lithography process parameter variations, such as wavefront aberration parameter variation. The method may also include designing gauges which have more than one test patterns, such that a combined response of the gauge can be tailored to generate a certain response to wavefront-related or other lithographic process parameters. The sensitivity against parameter variation leads to robust performance against random measurement error and/or any other measurement error.Type: ApplicationFiled: July 5, 2012Publication date: January 10, 2013Applicant: ASML Netherlands B.V.Inventors: Hanying Feng, Yu Cao, Jun Ye, Youping Zhang
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Patent number: 8281264Abstract: A system and method are provided for analyzing layout patterns via simulation using a lithography model to characterize the patterns and generate rules to be used in rule-based optical proximity correction (OPC). The system and method analyze a series of layout patterns conforming to a set of design rules by simulation using a lithography model to obtain a partition of the pattern spaces into one portion that requires only rule-based OPC and another portion that requires model-based OPC. A corresponding hybrid OPC system and method are also introduced that utilize the generated rules to correct an integrated circuit (IC) design layout which reduces the OPC output complexity and improves turnaround time.Type: GrantFiled: December 1, 2009Date of Patent: October 2, 2012Assignee: Takumi Technology CorporationInventor: Youping Zhang