Patents by Inventor Yu-Chi Wang

Yu-Chi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040067585
    Abstract: The present invention claims and discloses a growth surface for cell and/or tissue culturing and its method of making thereof. More specifically, the instant invention claims and discloses a novel growth surface for culturing cells that maximizes growth surface, cell attachment, even distribution of nutrients and air to cells and providing a second chance for the unattached and/or dislodged cells for re-attachment by physically manipulating the growth surface into a geometric configuration, while compatible to be used in conjunction with any conventional cultivating system. The growth surface of the present invention can optionally have trimmed or folded ends to increase fluid movement thus increasing production of cellular product.
    Type: Application
    Filed: February 21, 2003
    Publication date: April 8, 2004
    Inventors: Yu-Chi Wang, King-Ming Chang
  • Patent number: 6495407
    Abstract: A novel method of forming a GaAs-based MOS structure comprises ion implantation after oxide formation, and subsequent slow heating and cooling, carried out such that essentially no interfacial defects that are detectable by high resolution transmission electron microscopy are formed. If the MOS structure is a MOS-FET then metal contacts are provided in conventional fashion. A post-metallization anneal can result in FETs that are substantially free of drain current/voltage hysteresis. MOS-FETs made according to the novel method can be produced with high yield and can have significantly increased lifetime, as compared to some prior art GaAs-based MOS-FETs.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: December 17, 2002
    Assignee: Agere Systems Inc.
    Inventors: Minghwei Hong, Jenn-Ming Kuo, Jueinai Raynien Kwo, Joseph Petrus Mannaerts, Yu-Chi Wang
  • Patent number: 6294116
    Abstract: The present invention provides a method and apparatus for producing a crosslinked foamed article. Such a method comprises the steps of: (a) uniformly mixing at least one crosslinkable resin, at least one crosslinking agent, at least one foaming agent, and some additives into a resin composition; (b) extruding the resin composition through a die into an extrudate of a predetermined shape; and (c) heating the extrudate to a temperature sufficient to cause crosslinking and foaming of the crosslinkable resin while being driven by a driving device to move in the extruding direction, thereby obtaining a crosslinked foamed article. By means of the present invention, the resin extrudate can progress smoothly through the heater or the mold.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: September 25, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Hsi-Hsin Shih, Chien-Tsung Wu, Shihn-Juh Liou, Yu-Chi Wang, Chang-Ming Wong, Chi-Chou Huang, Chin-Chin Tsai
  • Patent number: 5923951
    Abstract: In a method of making a flip-chip bonded GaAs-based opto-electronic device, removal of the GaAs substrate is facilitated by provision of a lattice matched (Al.sub.x Ga.sub.1-x)InP etch stop layer, exemplarily a Ga.sub.0.51 In.sub.0.49 P layer, and use of an etchant that isotropically etches GaAs such that an essentially mirror-like etch stop layer surface results, and that preferably exhibits an etch rate ratio of at least 200:1 for GaAs and the etch stop layer, respectively. Use of the novel substrate removal method can substantially increase device yield, and facilitate manufacture of large device arrays, e.g., arrays of detector/modulator diodes flip-chip bonded to Si CMOS chips.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: July 13, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Keith Wayne Goossen, Jenn-Ming Kuo, Yu-Chi Wang
  • Patent number: 5844261
    Abstract: In a DH-PHEMT the channel layer comprises InGaAs and the donor layers comprise In.sub.0.5-q (Al.sub.x Ga.sub.1-x).sub.0.5+q P in which the mole fraction of Al is in the range of about 0.2.ltoreq.x.ltoreq.0.3. In another embodiment, an InAlGaP layer forms a Schottky barrier gate contact with a barrier height of about 1.0 eV and hence low leakage current. The devices exhibit high 2DEG density, current drivability, and breakdown voltage, making them suitable for low voltage application such as battery-powered, portable wireless equipment. The Schottky barrier contact may be used in devices other than HEMTs.
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: December 1, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Jenn-Ming Kuo, Yu-Chi Wang
  • Patent number: 5811844
    Abstract: In a DH-PHEMT the channel layer comprises InGaAs, the donor layers comprise In.sub.y Ga.sub.1-y P(0.15.ltoreq.y.ltoreq.0.85), and each of the spacer layers comprises an In.sub.0.5-q (Al.sub.x Ga.sub.1-x).sub.0.5+q P outer spacer layer (0.2.ltoreq.x) and an Al.sub.r Ga.sub.1-r As (0.ltoreq.r.ltoreq.0.3) inner spacer layer. In another embodiment, a similar InAlGaP layer forms a Schottky barrier gate contact with a barrier height of at least 1.0 eV and hence low leakage current. The devices exhibit the capability for both low noise and high power operation at low supply voltages.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: September 22, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Jenn-Ming Kuo, Yu-Chi Wang