Patents by Inventor Yu-Chung Chen

Yu-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145378
    Abstract: An interconnect structure on a semiconductor die includes: a lower conductive layer; an upper conductive layer disposed above the lower conductive layer; and a VIA disposed between the lower conductive layer and the upper conductive layer. The VIA includes: a primary interconnect structure and a sacrificial stress barrier ring disposed around the primary interconnect structure and separated a distance from the primary interconnect structure. A fabrication method for the interconnect structure includes: forming a dielectric layer over a lower conductive layer; patterning photoresist (PR) layer over the dielectric layer to define a location for a plurality of VIA trenches, wherein the patterning includes patterning the PR layer to provide a center opening for the VIA trenches that is surrounded by a ring opening for the VIA trenches, wherein the center opening and the ring opening are spaced apart.
    Type: Application
    Filed: February 7, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Ting Liu, Chen-Chiu Huang, Dian-Hau Chen, Hung-Chao Kao, Hsiang-Ku Shen, Wen-Chiung Tu, Li Chung Yu, Yu-Chung Lai
  • Publication number: 20240130614
    Abstract: An intraocular pressure inspection device includes an intraocular pressure detection unit, a high-precision positioning system and a wide-area positioning system, wherein according to the position of the intraocular pressure detection unit, a set of high-precision coordinates output by the high-precision positioning system and a set of wide-area coordinates output by the wide-area positioning system are integrated in appropriate weights to obtain a set of more precise integrated coordinate. The above-mentioned intraocular pressure inspection device can prevent the intraocular pressure detection unit from failing to operate once it is not in the working area of the high-precision positioning system.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 25, 2024
    Inventors: Shao Hung HUANG, Chao-Ting CHEN, Fong Hao KUO, Yu-Chung TUNG, Chu-Ming CHENG, Chi-Yuan KANG
  • Patent number: 11966077
    Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 23, 2024
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
  • Patent number: 11944970
    Abstract: A microfluidic detection unit comprises at least one fluid injection section, a fluid storage section and a detection section. Each fluid injection section defines a fluid outlet; the fluid storage section is in gas communication with the atmosphere and defines a fluid inlet; the detection section defines a first end in communication with the fluid outlet and a second end in communication with the fluid inlet. A height difference is defined between the fluid outlet and the fluid inlet along the direction of gravity. When a first fluid is injected from the at least one fluid injection section, the first fluid is driven by gravity to pass through the detection section and accumulate to form a droplet at the fluid inlet, such that a state of fluid pressure equilibrium of the first fluid is established.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 2, 2024
    Assignees: INSTANT NANOBIOSENSORS, INC., INSTANT NANOBIOSENSORS CO., LTD.
    Inventors: Yu-Chung Huang, Yi-Li Sun, Ting-Chou Chang, Jhy-Wen Wu, Nan-Kuang Yao, Lai-Kwan Chau, Shau-Chun Wang, Ying Ting Chen
  • Publication number: 20240105664
    Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 28, 2024
    Inventors: Yu-Chung Huang, Hsin-Yen Tsai, Fa-Chung Chen, Cheng-Fan Lin, Chen-Yu Wang
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240096712
    Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Chieh-Fang Chen, Yen-Chung Ho, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240086109
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a write command from a host system, and the write command including first data; checking a status of a first physical programming unit in a first physical erasing unit; in response to the status of the first physical programming unit being a first status, sending a first command sequence to a rewritable non-volatile memory module, and the first command sequence being configured to instruct the rewritable non-volatile memory module to store at least part of the first data to the first physical programming unit.
    Type: Application
    Filed: October 17, 2022
    Publication date: March 14, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Jia-Li Xu, Ping-Cheng Chen
  • Patent number: 11929427
    Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: March 12, 2024
    Assignee: VISUAL PHOTONICS EPITAXY CO., LTD.
    Inventors: Chao-Hsing Huang, Yu-Chung Chin, Kai-Yu Chen
  • Publication number: 20240079536
    Abstract: A display device includes a first substrate, a plurality of light-emitting diodes, a first wavelength conversion layer and a metasurface. The light-emitting diodes are arranged on the first substrate, in which the light-emitting diodes emit a first color light, and the light-emitting diodes includes a first light-emitting diode, a second light-emitting diode and a third light-emitting diode. The first wavelength conversion layer is on the first light-emitting diode, and configured to convert the first color light emitted from the first light-emitting diode into a second color light, in which the second color light is different from the first color light. The metasurface is above the first wavelength conversion layer, and configured to reflect the first color light and pass the second color light.
    Type: Application
    Filed: August 14, 2023
    Publication date: March 7, 2024
    Inventors: Yu-Heng HONG, Shih-Chen CHEN, Hao-Chung KUO
  • Patent number: 10822030
    Abstract: A parking guidance system and method and an automatic parking system. The method includes: detecting corners of a marked parking space; planning a vehicle's parking path based on the corners; and providing parking guidance based on the parking path. The planned parking path includes: a first straight path the vehicle will travel straight to a first turning point; a first turning path the vehicle will turn a first angle from the first turning point along the circumference of a first turning circle; a second straight path the vehicle will travel from the end point of the first turning path to a second turning point; a second turning path the vehicle will turn a second angle from the second turning point along the circumference of a second turning circle; and an intra-parking-space path the vehicle will travel from the end point of the second turning point to a stop point.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: November 3, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tse-Lin Lee, Wen-Han Lu, Yu-Chung Chen, Pin-Yung Chen
  • Publication number: 20190176888
    Abstract: A parking guidance system and method and an automatic parking system. The method includes: detecting corners of a marked parking space; planning a vehicle's parking path based on the corners; and providing parking guidance based on the parking path. The planned parking path includes: a first straight path the vehicle will travel straight to a first turning point; a first turning path the vehicle will turn a first angle from the first turning point along the circumference of a first turning circle; a second straight path the vehicle will travel from the end point of the first turning path to a second turning point; a second turning path the vehicle will turn a second angle from the second turning point along the circumference of a second turning circle; and an intra-parking-space path the vehicle will travel from the end point of the second turning point to a stop point.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 13, 2019
    Inventors: Tse-Lin Lee, Wen-Han Lu, Yu-Chung Chen, Pin-Yung Chen
  • Patent number: 10242575
    Abstract: A marked parking space identification system and a marked parking space identification method are disclosed. The marked parking space identification method includes: receiving a first image of a first parking space with markings; identifying a plurality of corners in the first image of the first parking space with markings; pairing up two adjacent corners to become a parking corner group; and using the parking corner group to identify a first marked parking space.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: March 26, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sheng-Wei Chan, Yu-Chung Chen, Chantel Lin, Pin-Yung Chen
  • Publication number: 20180041433
    Abstract: A method for relaying packets in a network system with the aid of network address translation and an associated apparatus are provided. The method includes: controlling a relay server to receive a first packet from a client device, wherein the first packet carries a source Internet Protocol (IP) address and a destination IP address; controlling the relay server to change the destination IP address carried by the first packet in order to relay the first packet to a peer device, wherein the peer device obtains the source IP address from the first packet; and controlling the relay server to receive a second packet from the peer device and relay the second packet to the client device.
    Type: Application
    Filed: March 13, 2017
    Publication date: February 8, 2018
    Inventors: Yu-Chung Chen, Kan-Yueh Chen, Jia-Yu Liu
  • Patent number: 9756240
    Abstract: A wide-angle lens calibration system is provided, which may include a rotation unit, an image input unit, and a processing unit. A lens to be calibrated may be disposed on the rotation unit; the rotation direction of the rotation unit may be parallel to the horizontal direction; the optical axis center of the lens may be aligned with a reference object. The image input unit may receive images from the lens. The processing unit may control the rotation unit to rotate and analysis the images received from the lens. The processing unit may execute a distortion calibration process, wherein the processing unit may continuously rotate the rotation unit by a predetermined angle and then record the distance between the position of the reference object in the image and the optical axis center and a total rotation angle after each rotation so as to establish a distortion calibration model.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: September 5, 2017
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Cheng Liu, Yu-Chung Chen
  • Publication number: 20170171464
    Abstract: A wide-angle lens calibration system is provided, which may include a rotation unit, an image input unit, and a processing unit. A lens to be calibrated may be disposed on the rotation unit; the rotation direction of the rotation unit may be parallel to the horizontal direction; the optical axis center of the lens may be aligned with a reference object. The image input unit may receive images from the lens. The processing unit may control the rotation unit to rotate and analysis the images received from the lens. The processing unit may execute a distortion calibration process, wherein the processing unit may continuously rotate the rotation unit by a predetermined angle and then record the distance between the position of the reference object in the image and the optical axis center and a total rotation angle after each rotation so as to establish a distortion calibration model.
    Type: Application
    Filed: December 30, 2015
    Publication date: June 15, 2017
    Inventors: Wei-Cheng Liu, Yu-Chung Chen
  • Patent number: 9601349
    Abstract: The invention is directed to a method for patterning a material layer. The method comprises steps of providing a material layer having a first hard mask layer and a second hard mask layer successively formed thereon and then patterning the second hard mask layer. Thereafter, an etching process is performed to pattern the first hard mask layer by using the patterned second hard mask layer as a mask, and the etching process is performed with a power of about 1000 W. Next, the material layer is patterned by using the patterned first hard mask layer as a mask.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: March 21, 2017
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Yu-Chung Chen, Hsin-Fang Su, Shih-Chang Tsai
  • Patent number: 9236219
    Abstract: Measurements of line roughness are separated into groups depending upon pre-layers. Image data collected from similar pre-layer types are considered together in order to separate effects of line roughness from distortion of measurements caused by the pre-layers. The resulting line roughness measurements are used to estimate an aspect of line quality.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: January 12, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Chung Chen, Shin-Chang Tsai, Ta-Hung Yang
  • Publication number: 20150348986
    Abstract: Provided is a non-volatile memory including a substrate having at least one protruding part, a charge trapping layer and a gate layer. The charge trapping layer covers a portion of the surface of the substrate beside the protruding part and covers at least a portion of the sidewall of the protruding part. The gate layer is disposed on the charge trapping layer. In such disposition of the invention, adjacent bits can be isolated by the protruding part of the substrate, so as to avoid mutual interference between the bits and thereby improve the performance and reliability of the device.
    Type: Application
    Filed: March 12, 2015
    Publication date: December 3, 2015
    Inventor: Yu-Chung Chen