Abstract: Provided is a resistive random access memory (RRAM) including at least one memory cell. The at least one memory cell includes a top electrode, a bottom electrode, a data storage layer, an oxygen gettering layer, a first barrier layer, and an oxygen supplying layer. The data storage layer is disposed between the top electrode and the bottom electrode. The oxygen gettering layer is disposed between the data storage layer and the top electrode. The first barrier layer is disposed between the oxygen gettering layer and the data storage layer. The oxygen supplying layer is disposed between the oxygen gettering layer and the top electrode and/or between the oxygen gettering layer and the first barrier layer.

Abstract: A resistive random access memory including first and second electrodes, a resistance variable layer, first and second metal layers and a resistance stabilizing layer is provided. The second electrode is disposed on the first electrode. The resistance variable layer is disposed between the first and second electrodes. The first metal layer is disposed between the resistance variable layer and the second electrode. The second metal layer is disposed between the first metal layer and the second electrode. The resistance stabilizing layer is disposed between the first and second metal layers. The oxygen content of the resistance variable layer is higher than that of the first metal layer, the oxygen content of the first metal layer is higher than that of the resistance stabilizing layer, the oxygen content of the resistance stabilizing layer is higher than that of the second metal layer.

Abstract: A method for manufacturing a semiconductor device, including the following steps. A plurality of first vias are formed in a first dielectric layer in a memory cell region and a peripheral region. A surface treatment is performed on the plurality of first vias to form a plurality of sacrificial layers. The plurality of sacrificial layers are removed to form a plurality of recesses. A plurality of protective layers are formed in the plurality of recesses. A memory device is formed on the first dielectric layer in the memory cell region. A second dielectric layer is formed on the memory device and on the first dielectric layer. A plurality of second vias is formed in the second dielectric layer in the memory cell region and the peripheral region to electrically connect the memory device in the memory cell region and the first vias in the peripheral region, respectively.

Abstract: A concealed anti-tamper device to prevent unauthorized opening and tampering with a manufactured product includes a shell, an anti-dismantling structure concealed in the shell, and at least one key. The shell defines a through hole and a slot. The anti-dismantling structure includes anti-dismantling hook module with hook, driving module, and resetting component anti-dismantling hook module. The anti-dismantling hook module is movable within the shell, and when the product is to be locked, the separate key rotates the driving module, which drives the hook of the anti-dismantling hook module to embed in the slot. The key is rotated in the opposite direction to unlock, until the driving module separates from the anti-dismantling hook module, and the resetting component separates the hook from the slot by the restoring force of a spring.

Abstract: Provided are a resistive random access memory and a manufacturing method thereof. The resistive random access memory includes first, second, and third electrodes, a variable resistance layer, a selection layer, and first and second bit lines. The second electrode and the third electrode are on the first electrode. The second and third electrodes are separated from each other and overlapped with the sidewall and the top surface of the first electrode. The variable resistance layer is between the first and second electrodes and between the first and third electrodes. The selection layer is between the variable resistance layer and the first electrode. The first bit line is on the second electrode and electrically connected to the second electrode via a first contact. The second bit line is on the third electrode and electrically connected to the third electrode via a second contact.

Abstract: A resistive random access memory including first and second electrodes, a resistance variable layer, first and second metal layers and a resistance stabilizing layer is provided. The second electrode is disposed on the first electrode. The resistance variable layer is disposed between the first and second electrodes. The first metal layer is disposed between the resistance variable layer and the second electrode. The second metal layer is disposed between the first metal layer and the second electrode. The resistance stabilizing layer is disposed between the first and second metal layers. The oxygen content of the resistance variable layer is higher than that of the first metal layer, the oxygen content of the first metal layer is higher than that of the resistance stabilizing layer, the oxygen content of the resistance stabilizing layer is higher than that of the second metal layer.

Abstract: A data write-in method and a non-volatile memory are provided. The data write-in method includes: providing a reset voltage to a plurality of selected memory cells according to a first flag, and recursively performing a reset process for the plurality of selected memory cells; setting a second flag according to a plurality of first verification currents of the plurality of selected memory cells; and under a condition that the second flag is set: providing a set voltage to the plurality of selected memory cells according to a resistance of the plurality of selected memory cells; and setting the first flag according to a plurality of second verification currents of the plurality of selected memory cells.

Abstract: A method of forming a copolymer is provided, which includes (i) mixing a diamine and a diester to form a mixture, and heating the mixture to form a diamine compound, wherein the diamine compound has a chemical structure of (ii) mixing the diamine compound and a diacid to form a diamine-diacid salt, wherein the diamine-diacid salt has a chemical structure of and (iii) heating the diamine-diacid salt to polymerize the diamine-diacid salt for forming a copolymer, wherein the copolymer has a repeating unit with a chemical structure of wherein n=2-12, R is and m=2-12.

Abstract: A data write-in method and a non-volatile memory are provided. The data write-in method includes: providing a reset voltage to a plurality of selected memory cells according to a first flag, and recursively performing a reset process for the plurality of selected memory cells; setting a second flag according to a plurality of first verification currents of the plurality of selected memory cells; and under a condition that the second flag is set: providing a set voltage to the plurality of selected memory cells according to a resistance of the plurality of selected memory cells; and setting the first flag according to a plurality of second verification currents of the plurality of selected memory cells.

Abstract: A method of fabricating a semiconductor device includes the following steps. A plurality of doped regions are formed in a substrate. A first dielectric layer is formed on the substrate. A plurality of first contacts and second contacts are formed in the first dielectric layer to be connected to the plurality of doped regions. A memory element is formed on the first dielectric layer. The memory element is electrically connected to the second contact. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer surrounds the memory element. A conductive line is formed in the second dielectric layer. A top surface of the conductive line is at a same level as a top surface of the memory element, and the conductive line is electrically connected to the plurality of first contacts.

Abstract: Provided is a resistive random access memory (RRAM) including at least one memory cell. The at least one memory cell includes a top electrode, a bottom electrode, a data storage layer, an oxygen gettering layer, a first barrier layer, and an oxygen supplying layer. The data storage layer is disposed between the top electrode and the bottom electrode. The oxygen gettering layer is disposed between the data storage layer and the top electrode. The first barrier layer is disposed between the oxygen gettering layer and the data storage layer. The oxygen supplying layer is disposed between the oxygen gettering layer and the top electrode and/or between the oxygen gettering layer and the first barrier layer.

Abstract: A power on reset method for a resistive memory storage device is provided and includes performing a forming procedure on a memory cell of the resistive memory storage device. The forming procedure includes applying at least one forming voltage and at least one reset voltage to the memory cell. The forming procedure further includes a thermal step. The step of applying at least one reset voltage to the memory cell may be preformed before or after the thermal step. After one forming voltage is applied, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. After the thermal step, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. In addition, after one reset voltage is applied, if the memory cell passes verification, the next reset voltage is not applied to the memory cell.

Abstract: A testing system is suitable for receiving at least one testing item of multiple device under tests (DUTs). The testing system comprises a plurality of testing devices and an arrangement unit. The arrangement unit is coupled to the testing devices. The arrangement unit generates at least one testing instruction according to the at least one testing item and detects an idle state corresponding to the at least one testing instruction, and transmits the at least one testing instruction to the testing device in the idle state, so as to trigger the testing device in the idle state to test the corresponding DUT according to the at least one testing instruction and generate a testing result.

Abstract: An antenna structure includes a metallic member, a feed portion, and a coupling resistor. The metallic member defines a slot, a first gap, a second gap, and a third gap. The first gap and the second gap are connected with the slot and divide with the slot the metallic member into a first portion and a second portion. The second portion is grounded. The third gap is defined on the first portion and connected with the slot. The first portion is divided into a radiating portion and a coupling portion by the third gap. The coupling portion is spaced apart from the radiating portion. The feed portion is electrically connected to the radiating portion, and the coupling portion is grounded through the coupling resistor.

Abstract: A near-eye augmented reality device includes an imaging unit including a plurality of imaging portions having birefringence and positive diopter, a lighting unit, and a polarization-control unit. The lighting unit is spaced apart from the imaging unit, and includes a base plate and a plurality of pixel modules. The base plate has a first surface proximal to the imaging unit, and an opposite second surface. Each of the pixel modules is operative to produce an imaging light directed towards the imaging unit. The polarization-control unit is operative to control polarization states of the image light and an ambient light.

Abstract: A concealed anti-tamper device to prevent unauthorized opening and tampering with a manufactured product includes a shell, an anti-dismantling structure concealed in the shell, and at least one key. The shell defines a through hole and a slot. The anti-dismantling structure includes anti-dismantling hook module with hook, driving module, and resetting component anti-dismantling hook module. The anti-dismantling hook module is movable within the shell, and when the product is to be locked, the separate key rotates the driving module, which drives the hook of the anti-dismantling hook module to embed in the slot. The key is rotated in the opposite direction to unlock, until the driving module separates from the anti-dismantling hook module, and the resetting component separates the hook from the slot by the restoring force of a spring.

Abstract: A near-eye augmented reality device includes an imaging unit including a plurality of imaging portions having birefringence and positive diopter, a lighting unit, and a polarization-control unit. The lighting unit is spaced apart from the imaging unit, and includes a base plate and a plurality of pixel modules. The base plate has a first surface proximal to the imaging unit, and an opposite second surface. Each of the pixel modules is operative to produce an imaging light directed towards the imaging unit. The polarization-control unit is operative to control polarization states of the image light and an ambient light.

Abstract: A method for reducing matching errors in disparity images by information in zoom images is revealed. Images with different local length captured by two zoom cameras are given. Perform image and zoom rectification of the images to get a new image center. Then cross checking is used to check whether the corresponding points of each pixel in the image are matched for marking the pixel as a reliable point or an unreliable point. Computation of stereo matching cost is carried out when a reliable point is marked. Otherwise stereo matching and zoom image matching are performed. The matching cost is aggregated by weighting so as to select the matching cost that mostly represents the similarity. Use WTA to get final matching results and disparities thereof for disparity selection. Lastly use a median filter to remove noise from the image for disparity refinement and get a final disparity image.

Abstract: A power on reset method for a resistive memory storage device is provided and includes performing a forming procedure on a memory cell of the resistive memory storage device. The forming procedure includes applying at least one forming voltage and at least one reset voltage to the memory cell. The forming procedure further includes a thermal step. The step of applying at least one reset voltage to the memory cell may be preformed before or after the thermal step. After one forming voltage is applied, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. After the thermal step, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. In addition, after one reset voltage is applied, if the memory cell passes verification, the next reset voltage is not applied to the memory cell.