Patents by Inventor Yuelin Wang

Yuelin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8853814
    Abstract: A miniature thermoelectric energy harvester and a fabrication method thereof. Annular grooves are fabricated on a low-resistivity silicon substrate to define silicon thermoelectric columns, an insulating layer is fabricated on the annular grooves, a thermoelectric material is filled in the annular grooves to form annular thermoelectric columns, and then metal wirings, passivation layers and supporting substrates are fabricated, thereby completing the fabrication process. The silicon thermoelectric column using a silicon base material simplifies the fabrication process. The fabrication of the thermocouple structure is one thin-film deposition process, which simplifies the process. The use of silicon as a component of the thermocouple has a high Seebeck coefficient. The use of vertical thermocouples improves the stability. Since the thermocouple structure is bonded to the upper supporting substrate and lower supporting substrate by wafer-level bonding, the fabrication efficiency is improved.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Dehui Xu, Bin Xiong, Yuelin Wang
  • Publication number: 20140026934
    Abstract: A three-dimensional thermoelectric energy harvester and a fabrication method thereof. Low-resistivity silicon is etched to form a plurality of grooves and silicon columns between the grooves, and an insulating layer is formed on a surface of the groove, and thermoelectric columns are fabricated by using a thin-film deposition technique, so that the thermoelectric column and a neighboring silicon column form a thermocouple pair; and then, a metal wiring is fabricated by processes such as etching and deposition, followed by thinning of the substrate and bonding of the supporting substrates, thereby completing fabrication of the three-dimensional thermoelectric energy harvester. Fabrication of the thermocouple pair structure by one thin-film deposition process simplifies the fabrication process. The thermocouple pair using silicon ensures a high Seebeck coefficient. The use of vertical thermocouple pairs having a column structure improves the mechanical stability of the thermoelectric energy harvester.
    Type: Application
    Filed: April 5, 2012
    Publication date: January 30, 2014
    Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY
    Inventors: Dehui Xu, Bin Xiong, Yuelin Wang
  • Publication number: 20140021576
    Abstract: A miniature thermoelectric energy harvester and a fabrication method thereof Annular grooves are fabricated on a low-resistivity silicon substrate to define silicon thermoelectric columns, an insulating layer is fabricated on the annular grooves, a thermoelectric material is filled in the annular grooves to form annular thermoelectric columns, and then metal wirings, passivation layers and supporting substrates are fabricated, thereby completing the fabrication process. The silicon thermoelectric column using a silicon base material simplifies the fabrication process. The fabrication of the thermocouple structure is one thin-film deposition process, which simplifies the process. The use of silicon as a component of the thermocouple has a high Seebeck coefficient. The use of vertical thermocouples improves the stability. Since the thermocouple structure is bonded to the upper supporting substrate and lower supporting substrate by wafer-level bonding, the fabrication efficiency is improved.
    Type: Application
    Filed: April 6, 2012
    Publication date: January 23, 2014
    Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADAMY
    Inventors: Dehui Xu, Bin Xiong, Yuelin Wang
  • Patent number: 7550358
    Abstract: A method to create piezoresistive sensing elements and electrostatic actuator elements on trench sidewalls is disclosed. P-type doped regions are formed in the upper surface of an n-type substrate. A trench is formed in the substrate (e.g. by DRIE process) intersecting with the doped regions and defining a portion of the substrate which is movable in the plane of the substrate relative to the rest of the substrate. Then diffusion of P-type dopant into the trench side-walls creates piezoresistive elements and electrode elements for electrostatic actuation. Owing to the intersection of two doped regions, there are good electrical paths between the electrical elements on the trench side-walls and the previously P-type doped portions on the wafer surface. The trench intersects with insulating elements, so that insulating elements mutually insulate adjacent electrical elements. P-n junctions between the electrical elements and the substrate insulate the electrical elements from the substrate.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: June 23, 2009
    Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Xinxin Li, Heng Yang, Yuelin Wang, Songlin Feng
  • Patent number: 7477884
    Abstract: A tri-state RF MEMS switch includes: a first well formed in a first substrate; a first input signal line and a first output signal line forming a first gap therebetween in the first well; a post bar forming a boundary between the second well and third well in the second substrate; a second input signal line and a second output signal line, and a third input signal line and a third output signal line forming a second gap and a third gap in the second well and the third well, respectively; and a membrane disposed between the first substrate and the second substrate such that the membrane crosses the first, second and third gaps, the membrane including a first conductive pad, a second conductive pad, and a third conductive pad thereon to face the first, second and third gaps, respectively.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: January 13, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung Choi, Jiwel Jiao, Yuelin Wang, Xianglong Xing
  • Publication number: 20070259471
    Abstract: A method to create piezoresistive sensing elements and electrostatic actuator elements on trench sidewalls is disclosed. P-type doped region(s) 25 are formed in the upper surface of an n-type substrate 20. A trench 22 is formed in the substrate (e.g. by DRIE process) intersecting with the doped regions and defining a portion 21 of the substrate which is movable in the plane of the substrate relative to the rest of the substrate. Then diffusion of P-type dopant into the trench side-walls creates piezoresistive elements 27 and electrode elements 29 for electrostatic actuation. Owing to the intersection of two doped regions, there are good electrical paths between the electrical elements 27, 29 on the trench side-walls and the previously P-typedoped portions 25 on the wafer surface. The trench 22 intersects with insulating elements 28, so that insulating elements 28 mutually insulate adjacent electrical elements 27, 29.
    Type: Application
    Filed: June 11, 2007
    Publication date: November 8, 2007
    Inventors: Xinxin Li, Heng Yang, Yuelin Wang, Songlin Feng
  • Publication number: 20060229045
    Abstract: A tri-state RF MEMS switch includes: a first well formed in a first substrate; a first input signal line and a first output signal line forming a first gap therebetween in the first well; a post bar forming a boundary between the second well and third well in the second substrate; a second input signal line and a second output signal line, and a third input signal line and a third output signal line forming a second gap and a third gap in the second well and the third well, respectively; and a membrane disposed between the first substrate and the second substrate such that the membrane crosses the first, second and third gaps, the membrane including a first conductive pad, a second conductive pad, and a third conductive pad thereon to face the first, second and third gaps, respectively.
    Type: Application
    Filed: February 2, 2006
    Publication date: October 12, 2006
    Inventors: Hyung Choi, Jiwei Jiao, Yuelin Wang, Xianglong Xing