Patents by Inventor Yuichi Oshima

Yuichi Oshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7118934
    Abstract: A porous substrate for epitaxial growth includes an underlying layer made of III-nitride semiconductor which is grown on a sapphire substrate, a void-formation preventive layer which is grown on the underlying layer, a porous III-nitride semiconductor layer and a porous metallic layer on the porous III-nitride semiconductor layer.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: October 10, 2006
    Assignee: Hitachi Cable, Ltd.
    Inventors: Yuichi Oshima, Masatomo Shibata
  • Publication number: 20060191467
    Abstract: To provide a semiconductor substrate of a group III nitride with a little warp, this invention provides a process comprising such steps of: epitaxial-growing a GaN layer 33 with a GaN low temperature grown buffer layer 32 upon a sapphire substrate 31; removing the sapphire substrate 31, the GaN buffer layer 32 and a small portion of the GaN layer 33 from the substrate taken out of a growth reactor to obtain a self-supporting GaN substrate 35; and after that, heat-treating the GaN substrate 35 by putting it into an electric furnace under the NH3 atmosphere at: 1200° C. for 24 hours; which leads to a marked reduction of the warp of the self-supporting GaN substrate 35 such that dislocation densities of its obverse and reverse surface are 4×107 cm?2 and 8×105 cm?2, and thereby such a low ratio of dislocation densities of 50 is well-controlled.
    Type: Application
    Filed: May 8, 2006
    Publication date: August 31, 2006
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Patent number: 7097920
    Abstract: To provide a semiconductor substrate of a group III nitride with a little warp, this invention provides a process comprising such steps of: epitaxial-growing a GaN layer 33 with a GaN low temperature grown buffer layer 32 upon a sapphire substrate 31; removing the sapphire substrate 31, the GaN buffer layer 32 and a small portion of the GaN layer 33 from the substrate taken out of a growth reactor to obtain a self-supporting GaN substrate 35; and after that, heat-treating the GaN substrate 35 by putting it into an electric furnace under the NH3 atmosphere at 1200° C. for 24 hours; which leads to a marked reduction of the warp of the self-supporting GaN substrate 35 such that dislocation densities of its obverse and reverse surface are 4×107 cm?2 and 8×105 cm?2, and thereby such a low ratio of dislocation densities of 50 is well-controlled.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 29, 2006
    Assignees: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Publication number: 20060170000
    Abstract: A nitride-based compound semiconductor substrate mainly used for an epitaxial growth of a nitride semiconductor and a method for fabricating the same are disclosed. The nitride-based compound semiconductor substrate has a composition of AlxGa1-xN (0<x<1), a principal plane of C face, an area of 2 cm2 or more, and a thickness of 200 ?m or more. The substrate having this structure is fabricated by a HVPE (hydride vapor phase epitaxy) method by using an organic Al compound such as TMA (trimethyl aluminum) or TEA (trimethyl aluminum) as an Al source, A stable crystal growth can be obtained without damaging a reacting furnace, and a large-sized AlGaN crystal substrate with an excellent crystallinity can be obtained.
    Type: Application
    Filed: January 12, 2006
    Publication date: August 3, 2006
    Applicant: Hitachi Cable Ltd.
    Inventor: Yuichi Oshima
  • Patent number: 7075111
    Abstract: A nitride semiconductor substrate having a diameter of 10 mm or more, which has a single-layer structure composed of a nitride semiconductor layer having a basic composition represented by AlxGa1?xN (0?x?1), or a multi-layer structure comprising the nitride semiconductor layer, the mass density of the nitride semiconductor layer being 98% or more of a theoretical mass density ? (x) represented by the following general formula (1): ? ? ( x ) = 4 ? ( M x + M N ) 3 ? a x 2 ? c x ? N a , ( 1 ) wherein ax=aGaN+(aAlN?aGaN)x, wherein aGaN represents an a-axis length of GaN, and aAlN represents an a-axis length of AlN; cx=cGaN+(cAlN?cGaN)x, wherein cGaN represents a c-axis length of GaN, and CAlN represents a c-axis length of AlN; Mx=MGa+(MAl?MGa)x, wherein MGa represents the atomic weight of Ga, and MAl represents the atomic weight of Al; MN represents the atomic weight of nitrogen; and Na represents Avogadro's number.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: July 11, 2006
    Assignee: Hitachi Cable, Ltd.
    Inventor: Yuichi Oshima
  • Publication number: 20060046511
    Abstract: A structure of a substrate used for growing a crystal layer of a semiconductor, particularly a group-III nitride semiconductor and its manufacturing method. The substrate comprises two porous layers on a base. The mean opening diameter of the pores of the first porous laser, the outermost layer, is smaller than the means diameter of the pores in the second porous layer nearer to the base than the first porous layer. The first and second porous layers have volume porosities of 10 to 90%. More then 50% of the pores of the first porous layer extend from the surface of the first porous layer and reach the interface between the first and second porous layers. Even by a conventional crystal growing method, an epitaxial crystal of low defect density can be easily grown on the porous substrate.
    Type: Application
    Filed: June 26, 2003
    Publication date: March 2, 2006
    Inventors: Masatomo Shibata, Yuichi Oshima, Takeshi Eri, Akira Usui, Haruo Sunagawa
  • Publication number: 20060046325
    Abstract: The present invention provides a group III nitride semiconductor substrate with low defect density as well as small warp and a process for producing the same; for instance, the process according to the present invention comprises the following series of steps of: forming a metallic Ti film 63 on a sapphire substrate 61, followed by treatment of nitration to convert it into a TiN film 64 having fine pores; thereafter growing a HVPE-GaN layer 66 thereon; forming voids 65 in the HVPE-GaN layer 66 by means of effects of the metallic Ti film 63 and the TiN film 64; and peeling the sapphire substrate 61 from the region of the voids 65 to remove it therefrom.
    Type: Application
    Filed: July 1, 2003
    Publication date: March 2, 2006
    Applicants: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Patent number: 6924159
    Abstract: To provide a semiconductor substrate of a group III nitride with low defect density and little warp, this invention provides a process comprising such steps of: forming a GaN layer 2 on a sapphire substrate 1 of the C face ((0001) face); forming a titanium film 3 thereon; heat-treating the substrate in an atmosphere containing hydrogen gas or a gas of a compound containing hydrogen to form voids in the GaN layer 2; and thereafter forming a GaN layer 4 on the GaN layer 2?.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: August 2, 2005
    Assignees: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Publication number: 20050104082
    Abstract: A nitride semiconductor substrate having a diameter of 10 mm or more, which has a single-layer structure composed of a nitride semiconductor layer having a basic composition represented by AlxGa1-xN (0?x?1), or a multi-layer structure comprising the nitride semiconductor layer, the mass density of the nitride semiconductor layer being 98% or more of a theoretical mass density ? (x) represented by the following general formula (1): ? ? ( x ) = 4 ? ( M x + M N ) 3 ? a x 2 ? c x ? N a , ( 1 ) wherein ax=aGaN+(aAlN?aGaN)x, wherein aGaN represents an a-axis length of GaN, and aAlN represents an a-axis length of AlN; cx=cGaN+(cAlN?cGaN)x, wherein cGaN represents a c-axis length of GaN, and CAlN represents a c-axis length of AlN; Mx=MGa+(MAl?MGa)x, wherein MGa represents the atomic weight of Ga, and MAl represents the atomic weight of Al; MN represents the atomic weight of nitrogen; and Na represents Avogadro's number.
    Type: Application
    Filed: February 18, 2004
    Publication date: May 19, 2005
    Inventor: Yuichi Oshima
  • Publication number: 20050029507
    Abstract: A metal layer is formed directly on a nitride-based compound semiconductor base layer over a substrate body. The metal layer includes at least one metal exhibiting an atomic interaction, with assistance of a heat treatment, to atoms constituting the base layer to promote removal of constitutional atoms from the base layer, whereby pores penetrating the metal layer are formed, while many voids are formed in the nitride-based compound semiconductor base layer. An epitaxial growth of a nitride-based compound semiconductor crystal is made with an initial transient epitaxial growth, which fills the voids, and a subsequent main epitaxial growth over the porous metal layer.
    Type: Application
    Filed: September 14, 2004
    Publication date: February 10, 2005
    Applicants: NEC CORPORATION, HITACHI CABLE, LTD.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Patent number: 6812051
    Abstract: A metal layer is formed directly on a nitride-based compound semiconductor base layer over a substrate body. The metal layer includes at least one metal exhibiting an atomic interaction, with assistance of a heat treatment, to atoms constituting the base layer to promote removal of constitutional atoms from the base layer, whereby pores penetrating the metal layer are formed, while many voids are formed in the nitride-based compound semiconductor base layer. An epitaxial growth of a nitride-based compound semiconductor crystal is made with an initial transient epitaxial growth, which fills the voids, and a subsequent main epitaxial growth over the porous metal layer.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: November 2, 2004
    Assignees: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Publication number: 20040206967
    Abstract: A porous substrate for epitaxial growth includes an underlying layer made of III-nitride semiconductor which is grown on a sapphire substrate, a void-formation preventive layer which is grown on the underlying layer, a porous III-nitride semiconductor layer and a porous metallic layer on the porous III-nitride semiconductor layer.
    Type: Application
    Filed: April 12, 2004
    Publication date: October 21, 2004
    Applicant: HITACHI CABLE, LTD.
    Inventors: Yuichi Oshima, Masatomo Shibata
  • Publication number: 20030183157
    Abstract: To provide a semiconductor substrate of a group III nitride with a little warp, this invention provides a process comprising such steps of:
    Type: Application
    Filed: March 24, 2003
    Publication date: October 2, 2003
    Applicants: NEC Corporation, Hitachi Cable, Ltd.
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Publication number: 20030017685
    Abstract: A metal layer is formed directly on a nitride-based compound semiconductor base layer over a substrate body. The metal layer includes at least one metal exhibiting an atomic interaction, with assistance of a heat treatment, to atoms constituting the base layer to promote removal of constitutional atoms from the base layer, whereby pores penetrating the metal layer are formed, while many voids are formed in the nitride-based compound semiconductor base layer. An epitaxial growth of a nitride-based compound semiconductor crystal is made with an initial transient epitaxial growth, which fills the voids, and a subsequent main epitaxial growth over the porous metal layer.
    Type: Application
    Filed: May 21, 2002
    Publication date: January 23, 2003
    Applicant: NEC CORPORATION
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Publication number: 20020197825
    Abstract: To provide a semiconductor substrate of a group III nitride with low defect density and little warp, this invention provides a process comprising such steps of:
    Type: Application
    Filed: March 26, 2002
    Publication date: December 26, 2002
    Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
  • Patent number: 6306966
    Abstract: A moisture curable composition excellent in transparency, operating efficiency and storage stability, and is suitable for use as an adhesive and a sealing material is provided. The moisture curable composition produced by blending 100 parts by weight of a mixture (A) and 2 parts by weight to 300 parts by weight of amorphous powder (B). The mixture (A) comprises (1) a copolymer having reactive silicon groups which can be cross-linked by hydrolysis, whose molecular chain substantially consists of (i) alkylacrylate and/or alkylmethacrylate monomeric units having an alkyl group with 1 to 8 carbon atoms, and (ii) alkylacrylate and/or alkylmethacrylate monomeric units having an alkyl group with 10 or more carbon atoms, and (2) a polymer substantially consisting of oxyalkylene including reactive silicon groups which can be cross-linked by hydrolysis. The amorphous powder (B) has a grain diameter ranging from 0.01 &mgr;m to 300 &mgr;m.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: October 23, 2001
    Assignee: Cemedine Co., Ltd.
    Inventors: Yasunobu Horie, Yoshinobu Egawa, Yuichi Oshima, Hideharu Hashimukai, Tomokazu Wakaume, Hiroshi Aoki