Patents by Inventor Yuji Takaoka
Yuji Takaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11800249Abstract: A rewiring region 22 is provided in a region other than a pixel region 21 on a front face (pixel formation surface) FA of an imaging element 20. A mold part 30 is formed around the imaging element 20 other than on the front face FA. Rewiring layers 41b, 42b, and 43b that connect an external terminal and a pad 23 provided in the rewiring region 22 are formed via insulating layers 41a, 42a, and 43a on a side of the pixel formation surface of the imaging element 20 and the mold part 30. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging device 10 is also on the side of the pixel formation surface, and reduction in size and height can be achieved.Type: GrantFiled: January 3, 2022Date of Patent: October 24, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yuta Momiuchi, Yuji Takaoka
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Patent number: 11676977Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: April 4, 2022Date of Patent: June 13, 2023Assignee: SONY GROUP CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20220231061Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: April 4, 2022Publication date: July 21, 2022Applicant: Sony Group CorporationInventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 11356584Abstract: The present technology relates to a camera module, a production method, and an electronic device that can prevent reduction of optical module positioning accuracy or heat dissipation performance. An image pickup element is joined on one face of a flexible board so that a light receiving surface of the image pickup element is exposed through an opening of the flexible board, and an optical module is joined on an other face of the flexible board. A reinforcing member is joined on the one face of the flexible board at a circumference of the image pickup element and reinforces a joining part of the flexible board where the optical module is joined. The reinforcing member is joined so as to face an area including at least a part of the joining part and is formed so that a part of the circumference of the image pickup element is kept open.Type: GrantFiled: September 8, 2017Date of Patent: June 7, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yuta Momiuchi, Yuji Takaoka, Hirokazu Nakayama, Kiyohisa Tanaka, Miyoshi Togawa, Hirokazu Seki
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Publication number: 20220132059Abstract: A rewiring region 22 is provided in a region other than a pixel region 21 on a front face (pixel formation surface) FA of an imaging element 20. A mold part 30 is formed around the imaging element 20 other than on the front face FA. Rewiring layers 41b, 42b, and 43b that connect an external terminal and a pad 23 provided in the rewiring region 22 are formed via insulating layers 41a, 42a, and 43a on a side of the pixel formation surface of the imaging element 20 and the mold part 30. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging device 10 is also on the side of the pixel formation surface, and reduction in size and height can be achieved.Type: ApplicationFiled: January 3, 2022Publication date: April 28, 2022Inventors: Yuta Momiuchi, Yuji Takaoka
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Patent number: 11315970Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: August 6, 2018Date of Patent: April 26, 2022Assignee: SONY CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 11245863Abstract: A rewiring region is provided in a region other than a pixel region on a front face (pixel formation surface) FA of an imaging element. A mold part is formed around the imaging element other than on the front face FA. Rewiring layers that connect an external terminal and a pad provided in the rewiring region are formed via insulating layers on a side of the pixel formation surface of the imaging element and the mold part. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging device is also on the side of the pixel formation surface, and reduction in size and height can be achieved.Type: GrantFiled: April 3, 2019Date of Patent: February 8, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yuta Momiuchi, Yuji Takaoka
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Patent number: 11239529Abstract: A desired drying capability is achieved while damage to a film is prevented. A film production method is arranged such that: a production process including a drying step is operated by setting a drying condition, under which to carry out the drying step, for each of at least two periods, the two periods being a first period and a second period later than the first period; the drying condition is changed in at least a part of the first period so as to be enhanced with time; and the drying condition is maintained in the second period so as to be substantially fixed.Type: GrantFiled: October 11, 2019Date of Patent: February 1, 2022Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Akihiko Shin, Yuji Takaoka, Atsushi Nakazawa, Hideyuki Sasaki
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Patent number: 11171170Abstract: The present technology relates to a semiconductor device including: a solid-state image sensor having a pixel array unit in which a plurality of pixels each having a photoelectric conversion element is two-dimensionally arranged in a matrix; and a flexible printed circuit having wiring adapted to connect a pad portion provided on an upper surface side to be located on a light receiving surface side of the solid-state image sensor to an external terminal provided on a lower surface side opposite to the upper surface side, in which the flexible printed circuit is arranged along respective surfaces of the solid-state image sensor such that a position of an end portion located on the upper surface side becomes a position different from a position in a space above the light receiving surface.Type: GrantFiled: July 14, 2016Date of Patent: November 9, 2021Assignee: SONY CORPORATIONInventors: Yuta Momiuchi, Yuji Takaoka, Kiyohisa Tanaka, Eiichirou Kishida, Emi Nishioka, Naoki Yamashita, Hirokazu Seki
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Publication number: 20210281721Abstract: The present technology relates to a camera module, a production method, and an electronic device that can prevent reduction of optical module positioning accuracy or heat dissipation performance. An image pickup element is joined on one face of a flexible board so that a light receiving surface of the image pickup element is exposed through an opening of the flexible board, and an optical module is joined on an other face of the flexible board so that light enters to the image pickup element through the opening. A reinforcing member is joined on the one face of the flexible board at a circumference of the image pickup element and reinforces a joining part of the flexible board where the optical module is joined. The reinforcing member is joined so as to face an area including at least a part of the joining part and is formed so that a part of the circumference of the image pickup element is kept open.Type: ApplicationFiled: September 8, 2017Publication date: September 9, 2021Inventors: YUTA MOMIUCHI, YUJI TAKAOKA, HIROKAZU NAKAYAMA, KIYOHISA TANAKA, MIYOSHI TOGAWA, HIROKAZU SEKI
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Publication number: 20210250534Abstract: A rewiring region 22 is provided in a region other than a pixel region 21 on a front face (pixel formation surface) FA of an imaging element 20. A mold part 30 is formed around the imaging element 20 other than on the front face FA. Rewiring layers 41b, 42b, and 43b that connect an external terminal and a pad 23 provided in the rewiring region 22 are formed via insulating layers 41a, 42a, and 43a on a side of the pixel formation surface of the imaging element 20 and the mold part 30. Therefore, connection to a substrate can be made possible even if the spacing between the pads is narrowed, a mounting surface of an imaging device 10 is also on the side of the pixel formation surface, and reduction in size and height can be achieved.Type: ApplicationFiled: April 3, 2019Publication date: August 12, 2021Inventors: YUTA MOMIUCHI, YUJI TAKAOKA
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Patent number: 10867950Abstract: A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, a plurality of wirings, and a solder resist layer, in which the plurality of wirings and the solder resist layer are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The plurality of solder-including electrodes include at least one gap control electrode. The at least one gap control electrode includes a columnar metal layer and a solder layer in order named from side on which the chip body is disposed, and includes an overlap region where the columnar metal layer and the solder resist layer overlap each other, along part or all of an aperture end of the aperture.Type: GrantFiled: June 5, 2015Date of Patent: December 15, 2020Assignee: SONY CORPORATIONInventors: Makoto Murai, Yuji Takaoka
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Patent number: 10720402Abstract: A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.Type: GrantFiled: June 5, 2015Date of Patent: July 21, 2020Assignee: SONY CORPORATIONInventors: Makoto Murai, Kazuki Sato, Hiroyuki Yamada, Yuji Takaoka, Makoto Imai, Shigeki Amano
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Patent number: 10720459Abstract: The present technology relates to an imaging element package and a camera module capable of improving reliability. An imaging element package includes a flexible substrate, an imaging element connected to a first surface of the flexible substrate, and a member, bonded to a second surface of the flexible substrate opposite to the first surface with an adhesive, having a linear expansion coefficient different from the flexible substrate, in which in a portion of the adhesive, a slit is formed which intersects with a direction from the imaging element toward an end of the flexible substrate as viewed from a direction perpendicular to the flexible substrate. The present technology is applied to a camera module.Type: GrantFiled: July 25, 2017Date of Patent: July 21, 2020Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yuta Momiuchi, Yuji Takaoka, Hirokazu Nakayama, Kiyohisa Tanaka, Miyoshi Togawa, Hirokazu Seki, Eiichirou Kishida
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Publication number: 20200044218Abstract: A desired drying capability is achieved while damage to a film is prevented. A film production method is arranged such that: a production process including a drying step is operated by setting a drying condition, under which to carry out the drying step, for each of at least two periods, the two periods being a first period and a second period later than the first period; the drying condition is changed in at least a part of the first period so as to be enhanced with time; and the drying condition is maintained in the second period so as to be substantially fixed.Type: ApplicationFiled: October 11, 2019Publication date: February 6, 2020Inventors: Akihiko SHIN, Yuji TAKAOKA, Atsushi NAKAZAWA, Hideyuki SASAKI
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Patent number: 10418340Abstract: A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The plurality of solder-including electrodes include a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes supply a first electric potential, and the plurality of second electrodes supply a second electric potential different from the first electric potential. The plurality of first electrodes and the plurality of second electrodes are disposed alternately in both a row direction and a column direction, in a central part of the chip body. The plurality of wirings include a plurality of first wirings and a plurality of second wirings.Type: GrantFiled: June 5, 2015Date of Patent: September 17, 2019Assignee: SONY CORPORATIONInventors: Makoto Murai, Yuji Takaoka, Kazuki Sato, Hiroyuki Yamada
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Publication number: 20190267418Abstract: The present technology relates to an imaging element package and a camera module capable of improving reliability. An imaging element package includes a flexible substrate, an imaging element connected to a first surface of the flexible substrate, and a member, bonded to a second surface of the flexible substrate opposite to the first surface with an adhesive, having a linear expansion coefficient different from the flexible substrate, in which in a portion of the adhesive, a slit is formed which intersects with a direction from the imaging element toward an end of the flexible substrate as viewed from a direction perpendicular to the flexible substrate. The present technology is applied to a camera module.Type: ApplicationFiled: July 25, 2017Publication date: August 29, 2019Inventors: YUTA MOMIUCHI, YUJI TAKAOKA, HIROKAZU NAKAYAMA, KIYOHISA TANAKA, MIYOSHI TOGAWA, HIROKAZU SEKI, EIICHIROU KISHIDA
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Publication number: 20190043905Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: August 6, 2018Publication date: February 7, 2019Applicant: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 10050074Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: May 27, 2016Date of Patent: August 14, 2018Assignee: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20180204870Abstract: The present technology relates to a semiconductor device, a manufacturing method for the same, and an electronic apparatus, in which a chip size package can be more easily achieved by using flexible printed circuits. Provided is a semiconductor device including: a solid-state image sensor having a pixel array unit in which a plurality of pixels each having a photoelectric conversion element is two-dimensionally arranged in a matrix; and a flexible printed circuit having wiring adapted to connect a pad portion provided on an upper surface side to be located on a light receiving surface side of the solid-state image sensor to an external terminal provided on a lower surface side opposite to the upper surface side, in which the flexible printed circuit is arranged along respective surfaces of the solid-state image sensor such that a position of an end portion located on the upper surface side becomes a position different from a position in a space above the light receiving surface.Type: ApplicationFiled: July 14, 2016Publication date: July 19, 2018Inventors: YUTA MOMIUCHI, YUJI TAKAOKA, KIYOHISA TANAKA, EIICHIROU KISHIDA, EMI NISHIOKA, NAOKI YAMASHITA, HIROKAZU SEKI