Patents by Inventor Yusuke Otake

Yusuke Otake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11411032
    Abstract: An imaging device comprises a sensor substrate including a pixel array that includes at least a first pixel. The first pixel includes an avalanche photodiode including a light receiving region, a cathode, and an anode. The first pixel includes a wiring layer electrically connected to the cathode and arranged in the sensor substrate such that the wiring layer is in a path of incident light that exits the light receiving region.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: August 9, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Akira Tanaka, Yusuke Otake, Toshifumi Wakano
  • Patent number: 11411034
    Abstract: A solid-state imaging device according to the present disclosure includes a photoelectric conversion film that is provided outside a semiconductor substrate on a pixel-by-pixel basis, performs photoelectric conversion on light having a predetermined wavelength range, and transmits light having wavelength ranges other than the predetermined wavelength range, and a photoelectric conversion region that is provided inside the semiconductor substrate on a pixel-by-pixel basis and performs photoelectric conversion on the light having the wavelength ranges, the light having the wavelength ranges having passed through the photoelectric conversion film. The photoelectric conversion film includes a film having an avalanche function.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: August 9, 2022
    Assignee: SONY CORPORATION
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Otake
  • Patent number: 11404595
    Abstract: An avalanche photodiode (APD) sensor includes a photoelectric conversion region disposed in a substrate and that converts light incident to a first side of the substrate into electric charge, and a cathode region disposed at a second side of the substrate. The second side is opposite the first side. The APD sensor includes an anode region disposed at the second side of the substrate, a first region of a first conductivity type disposed in the substrate, and a second region of a second conductivity type disposed in the substrate. The second conductivity type is different than the first conductivity type. In a cross-sectional view, the first region and the second region are between the photoelectric conversion region and the second side of the substrate. In the cross-sectional view, an interface between the first region and the second region has an uneven pattern.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: August 2, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Toshifumi Wakano, Yusuke Otake
  • Publication number: 20220239849
    Abstract: Provided is an imaging device that makes it possible to exhibit a better imaging performance. The imaging device includes a semiconductor layer, a pixel separation section, a plurality of photoelectric conversion sections, and a plurality of electric charge voltage conversion sections. The semiconductor layer has a surface that extends in an in-plane direction, and a back face positioned on an opposite side of the surface in a thickness direction. The pixel separation section extends from the surface to the back face in the thickness direction, and separates the semiconductor layer into a plurality of pixel regions in the in-plane direction. The plurality of photoelectric conversion sections is respectively provided in the plurality of pixel regions of the semiconductor layer separated by the pixel separation section, and is each configured to generate, by a photoelectric conversion, electric charge corresponding to a light amount of incident light from the back face.
    Type: Application
    Filed: April 28, 2020
    Publication date: July 28, 2022
    Inventors: HIDEKI ARAI, YUSUKE OTAKE, TAKURO MURASE
  • Patent number: 11363186
    Abstract: The present disclosure relates to an image pickup device that enables inhibition of occurrence of color mixture or noise, and an electronic apparatus. The image pickup device of the present disclosure includes an image plane phase difference detection pixel for obtaining a phase difference signal for image plane phase difference AF.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: June 14, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kyohei Yoshimura, Toshifumi Wakano, Yusuke Otake
  • Publication number: 20220182523
    Abstract: A light-receiving device according to an embodiment of the present disclosure includes a pixel array including light-receiving elements provided in respective pixels. The light-receiving elements each include a high electric field region and a photoelectric conversion region. A plurality of the light-receiving elements provided in the respective pixels includes a plurality of types of elements that have temperature regions having high photon detection efficiency (PDE). The temperature regions are different from each other and partially overlap each other.
    Type: Application
    Filed: March 19, 2020
    Publication date: June 9, 2022
    Inventors: KYOSUKE ITO, YUSUKE OTAKE
  • Publication number: 20220181366
    Abstract: A sensor chip and an electronic device with SPAD pixels each including an avalanche photodiode element. The sensor chip includes a pixel area having an array of pixels, an avalanche photodiode element that amplifies a carrier by a high electric field area provided for the each of the pixels, an inter-pixel separation section that insulates and separates each of the pixels from adjacent pixels, and a wiring in a wiring layer laminated on a surface opposite to a light receiving surface of the semiconductor substrate that covers at least the high electric field area. The pixel array includes a dummy pixel area located near a peripheral edge of the pixel area. A cathode and an anode electric potential of the avalanche photodiode element arranged in the dummy pixel area are the same, or at least one of the cathode and anode electric potential is in a floating state.
    Type: Application
    Filed: March 16, 2020
    Publication date: June 9, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shinichiro YAGI, Yusuke OTAKE, Kyosuke ITO
  • Publication number: 20220181374
    Abstract: A sensor chip according to an embodiment of the present disclosure includes: a photoelectric conversion section including a multiplication region that avalanche-multiplies carriers by a high electric field region; a light-condensing section that condenses incident light toward the photoelectric conversion section; and a pixel array in which a plurality of pixels each including the photoelectric conversion section and the light-condensing section are arranged in array and at least one of a structure of the photoelectric conversion section or a structure of the light-condensing section is changed stepwise from a middle part toward an outer peripheral part.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 9, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kyosuke ITO, Toshifumi WAKANO, Yusuke OTAKE
  • Publication number: 20220165902
    Abstract: To reduce a variation in the characteristics of avalanche photodiode sensors. An avalanche photodiode sensor includes a first semiconductor region, a second semiconductor region, a low-impurity-concentration region, a first contact region, and a second contact region. The first semiconductor region is disposed on a surface of a semiconductor substrate. The second semiconductor region is disposed below the first semiconductor region and has a different conductivity type from the first semiconductor region. The low-impurity-concentration region is disposed adjacent to the second semiconductor region. The first contact region is disposed on the surface of the semiconductor substrate to be adjacent to the first semiconductor region and has electrodes connected thereto. The second contact region is disposed adjacent to the low-impurity-concentration region and has electrodes connected thereto.
    Type: Application
    Filed: February 20, 2020
    Publication date: May 26, 2022
    Inventors: MUTSUMI OKAZAKI, YUSUKE OTAKE
  • Patent number: 11333549
    Abstract: An avalanche photodiode sensor includes a photoelectric conversion region disposed in a substrate and that converts incident light into electric charge. The avalanche photodiode sensor includes a first region of a first conductivity type on the photoelectric conversion region, and a cathode disposed in the substrate adjacent to the first region and coupled to the photoelectric conversion region. The avalanche photodiode sensor includes an anode disposed in the substrate adjacent to the cathode, and a contact of the first conductivity type disposed in the substrate. An impurity concentration of the first region is different than an impurity concentration of the contact.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: May 17, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kyosuke Ito, Toshifumi Wakano, Yusuke Otake
  • Publication number: 20220149090
    Abstract: The present technology relates to a light detecting element and a method of manufacturing the same that make it possible to reduce pixel size. The light detecting element includes a plurality of pixels arranged in the form of a matrix. Each of the pixels includes a first semiconductor layer of a first conductivity type formed in an outer peripheral portion in the vicinity of a pixel boundary, and a second semiconductor layer of a second conductivity type opposite from the first conductivity type formed on the inside of the first semiconductor layer as viewed in plan. A high field region formed by the first semiconductor layer and the second semiconductor layer when a reverse bias voltage is applied is configured to be formed in a depth direction of a substrate. The present technology is, for example, applicable to a photon counter or the like.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 12, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke OTAKE, Toshifumi WAKANO
  • Publication number: 20220149221
    Abstract: A photodetector comprising: a separation region that is provided in a semiconductor substrate and defines a pixel region; a hole accumulation region that is provided in the semiconductor substrate of the pixel region along a side surface of the separation region; a multiplication region that is provided in the semiconductor substrate of the pixel region and is configured by joining a first conductivity type region and a second conductivity type region from the surface side of the semiconductor substrate in the thickness direction of the semiconductor substrate; and an insulating region provided in the semiconductor substrate in a region between the multiplication region and the hole accumulation region, wherein a formation depth of the insulating region is larger than a formation depth of the first conductivity type region.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 12, 2022
    Inventors: KENJI KURATA, YUSUKE OTAKE, YUJI ISOGAI
  • Publication number: 20220077218
    Abstract: An imaging device includes a first chip. The first chip includes a first pixel and a second pixel. The first pixel includes a first anode region and a first cathode region, and the second pixel includes a second anode region and a second cathode region. The first chip includes a first wiring layer. The first wiring layer includes a first anode electrode, a first anode via coupled to the first anode electrode and the first anode region, and a second anode via coupled to the first anode electrode and the second anode region.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenji KOBAYASHI, Toshifumi WAKANO, Yusuke OTAKE
  • Patent number: 11264420
    Abstract: The present technology relates to a light detecting element and a method of manufacturing the same that make it possible to reduce pixel size. The light detecting element includes a plurality of pixels arranged in the form of a matrix. Each of the pixels includes a first semiconductor layer of a first conductivity type formed in an outer peripheral portion in the vicinity of a pixel boundary, and a second semiconductor layer of a second conductivity type opposite from the first conductivity type formed on the inside of the first semiconductor layer as viewed in plan. A high field region formed by the first semiconductor layer and the second semiconductor layer when a reverse bias voltage is applied is configured to be formed in a depth direction of a substrate. The present technology is, for example, applicable to a photon counter or the like.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: March 1, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Otake, Toshifumi Wakano
  • Publication number: 20220020789
    Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode and a cathode. The cathode is in a well region of the first substrate. The first pixel includes an isolation region that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.
    Type: Application
    Filed: September 30, 2021
    Publication date: January 20, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke OTAKE, Akira MATSUMOTO, Junpei YAMAMOTO, Ryusei NAITO, Masahiko NAKAMIZO, Toshifumi WAKANO
  • Patent number: 11222916
    Abstract: An imaging device includes a first chip. The first chip includes a first pixel and a second pixel. The first pixel includes a first anode region and a first cathode region, and the second pixel includes a second anode region and a second cathode region. The first chip includes a first wiring layer. The first wiring layer includes a first anode electrode, a first anode via coupled to the first anode electrode and the first anode region, and a second anode via coupled to the first anode electrode and the second anode region.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 11, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kenji Kobayashi, Toshifumi Wakano, Yusuke Otake
  • Publication number: 20210343777
    Abstract: The present disclosure relates to a solid-state imaging element and an electronic device capable of increasing the capacitance of a charge holding unit. The solid-state imaging element includes a pixel including a photodiode, an FD that accumulates charges generated in the photodiode, and a charge holding unit that is connected in parallel with the FD. The charge holding unit includes a wiring capacitance formed by parallel running of a first wiring connected to a first potential and a second wiring connected to a second potential different from the first potential. The present disclosure can be applied to a solid-state imaging element that performs global shutter type imaging.
    Type: Application
    Filed: September 5, 2019
    Publication date: November 4, 2021
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke OTAKE, Toshifumi WAKANO, Takuro MURASE
  • Publication number: 20210280622
    Abstract: Providing a SPAD photodiode that accurately captures a subject regardless of long distance or short distance. A solid-state imaging apparatus (1000) according to the present disclosure includes: a pixel isolator (100) that defines a photoelectric conversion region (200) for each pixel; a first semiconductor layer (106) provided in the photoelectric conversion region; and a second semiconductor layer (108) to which a voltage for electron multiplication is applied, specifically between the first semiconductor layer and the second semiconductor layer, in which the sensitivities of the plurality of pixels are varied. With this configuration, it is possible to accurately capture a subject in the SPAD photodiode regardless of long distance or short distance.
    Type: Application
    Filed: June 7, 2019
    Publication date: September 9, 2021
    Inventors: HIDENORI MAEDA, TOSHIFUMI WAKANO, YUSUKE OTAKE
  • Patent number: 11044428
    Abstract: Imaging devices and electronic apparatuses with one or more shared pixel structures are provided. The shared pixel structure includes a plurality of photoelectric conversion devices or photodiodes. Each photodiode in the shared pixel structure is located within a rectangular area. The shared pixel structure also includes a plurality of shared transistors. The shared transistors in the shared pixel structure are located adjacent the photoelectric conversion devices of the shared pixel structure. The rectangular area can have two short sides and two long sides, with the shared transistors located along one of the long sides. In addition, a length of one or more of the transistors can be extended in a direction parallel to the long side of the rectangular area.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: June 22, 2021
    Assignee: SONY CORPORATION
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Otake
  • Publication number: 20210183917
    Abstract: The present technology relates to a light detecting element and a method of manufacturing the same that make it possible to reduce pixel size. The light detecting element includes a plurality of pixels arranged in the form of a matrix. Each of the pixels includes a first semiconductor layer of a first conductivity type formed in an outer peripheral portion in the vicinity of a pixel boundary, and a second semiconductor layer of a second conductivity type opposite from the first conductivity type formed on the inside of the first semiconductor layer as viewed in plan. A high field region formed by the first semiconductor layer and the second semiconductor layer when a reverse bias voltage is applied is configured to be formed in a depth direction of a substrate. The present technology is, for example, applicable to a photon counter or the like.
    Type: Application
    Filed: November 1, 2018
    Publication date: June 17, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke OTAKE, Toshifumi WAKANO