Abstract: A single-split cage capable of continuously holding a plurality of rolling elements stably for a long time by eliminating the difference in the strength between split regions, by maintaining the strength of the entire cage uniform in the circumferential direction and by maintaining the dimensional accuracy between the split regions constant at the time of molding and also capable of improving load capacity and achieving low cost for assembly.

Abstract: The present invention provides a single-split cage capable of continuously holding a plurality of rolling elements stably for a long time by eliminating the difference in the strength between split regions, by maintaining the strength of the entire cage uniform in the circumferential direction and by maintaining the dimensional accuracy between the split regions constant at the time of molding and also capable of improving load capacity and achieving low cost for assembly.

Abstract: Achieved is a cage for a radial roller bearing that is made by axial draw molding, and that can suppress wear due to friction between the end sections in the axial direction and the guide surfaces of the opposing members, without the assembly direction being restricted, even when guide surfaces of opposing members are not able to support the cage over the entire area of the end surfaces in the axial direction. The cage 7c is composed of a pair of circular ring shaped rim sections 8e, 8f and a plurality of column sections 9, with the spaces between column section 9 that are adjacent in the circumferential direction functioning as pockets 10.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, an upper-layer wire provided on the substrate, a lower-layer wire provided on the substrate, a memory cell located at an intersection of the upper-layer wire and the lower-layer wire and includes a diode and a storage layer, a conductive layer located between the upper-layer wire and the memory cell in a direction perpendicular to the substrate surface, and an interlayer insulating film provided between memory cells. The position of an interface between the upper-layer wire and the interlayer insulating film is lower than a top surface of the conductive layer.

Abstract: According to one embodiment, a semiconductor device includes a substrate and an interconnect region on the substrate. The interconnect region includes a first interconnect having a first contact portion whose plane shape is a ring-like plane shape, a second interconnect disposed below the first interconnect, and a contact electrode passing through the ling-like portion of the first contact portion and electrically connecting the first interconnect and the second interconnect.

Abstract: A pair of rim portions (4a) and (4b) is formed in the shape of a discontinuous segmental circular ring, which includes cutout portions (8a) and (8b), respectively, at one position. The cutout portions of the respective rim portions are concentrically disposed so as to face each other with a predetermined interval therebetween in an axial direction while having the same phase in a circumferential direction. A plurality of pillar portions (6) form pockets (10) where rollers (14) are retained. An expandable elastic connecting portion (12), which connects one end portion (84a) of one rim portion in the circumferential direction to the other end portion (82b) of the other rim portion in the circumferential direction, is provided at the pair of rim portions.

Abstract: Achieved is a cage for a radial roller bearing that is made by axial draw molding, and that can suppress wear due to friction between the end sections in the axial direction and the guide surfaces of the opposing members, without the assembly direction being restricted, even when guide surfaces of opposing members are not able to support the cage over the entire area of the end surfaces in the axial direction. The cage 7c is composed of a pair of circular ring shaped rim sections 8e, 8f and a plurality of column sections 9, with the spaces between column section 9 that are adjacent in the circumferential direction functioning as pockets 10.

Abstract: According to one embodiment, a semiconductor device includes a substrate and an interconnect region on the substrate. The interconnect region includes a first interconnect having a first contact portion whose plane shape is a ring-like plane shape, a second interconnect disposed below the first interconnect, and a contact electrode passing through the ling-like portion of the first contact portion and electrically connecting the first interconnect and the second interconnect.

Abstract: A pair of rim portions 4a and 4b is formed in the shape of a discontinuous segmental circular ring, which includes cutout portions 8a and 8b, respectively, at one position. The cutout portions of the respective rim portions are concentrically disposed so as to face each other with a predetermined interval therebetween in an axial direction while having the same phase in a circumferential direction. A plurality of pillar portions 6 form pockets 10 where rollers 14 are retained. An expandable elastic connecting portion 12, which connects one end portion 84a of one rim portion in the circumferential direction to the other end portion 82b of the other rim portion in the circumferential direction, is provided at the pair of rim portions.

Abstract: A memory cell array is configured as an arrangement of memory cells disposed at intersections of a plurality of first lines and a plurality of second lines formed so as to intersect one another, each of the memory cells comprising a variable resistance element. A control circuit selectively drives the first lines and the second lines. The variable resistance element is configured by a transition metal oxide film. An electrode connected to the variable resistance element includes a polysilicon electrode configured from polysilicon. A block layer is formed between the polysilicon electrode and the variable resistance element.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, an upper-layer wire provided on the substrate, a lower-layer wire provided on the substrate, a memory cell located at an intersection of the upper-layer wire and the lower-layer wire and includes a diode and a storage layer, a conductive layer located between the upper-layer wire and the memory cell in a direction perpendicular to the substrate surface, and an interlayer insulating film provided between memory cells. The position of an interface between the upper-layer wire and the interlayer insulating film is lower than a top surface of the conductive layer.

Abstract: The present invention provides a single-split cage capable of continuously holding a plurality of rolling elements stably for a long time by eliminating the difference in the strength between split regions, by maintaining the strength of the entire cage uniform in the circumferential direction and by maintaining the dimensional accuracy between the split regions constant at the time of molding and also capable of improving load capacity and achieving low cost for assembly.

Abstract: According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion.

Abstract: According to one embodiment, a semiconductor device includes a substrate and an interconnect region on the substrate. The interconnect region includes a first interconnect having a first contact portion whose plane shape is a ring-like plane shape, a second interconnect disposed below the first interconnect, and a contact electrode passing through the ling-like portion of the first contact portion and electrically connecting the first interconnect and the second interconnect.

Abstract: When Cyazofamid is formulated in accordance with a conventional formulation method, Cyazofamid is degraded in some cases. The problem to be solved by the present invention is to improve storage stability of the formulation by controlling degradation of Cyazofamid as an agricultural chemical active ingredient. The present invention provides a method for controlling degradation of an agricultural chemical active ingredient, Cyazofamid, which comprises using at least one stabilizer selected from the group consisting of epoxidized animal oil and/or vegetable oil, a nonionic surface active agent of polyoxyethylene, an anionic surface active agent of polyoxyethylene, polyhydric alcohol and a basic substance.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, an upper-layer wire provided on the substrate, a lower-layer wire provided on the substrate, a memory cell located at an intersection of the upper-layer wire and the lower-layer wire and includes a diode and a storage layer, a conductive layer located between the upper-layer wire and the memory cell in a direction perpendicular to the substrate surface, and an interlayer insulating film provided between memory cells. The position of an interface between the upper-layer wire and the interlayer insulating film is lower than a top surface of the conductive layer.

Abstract: According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion.

Abstract: Capacitors are formed in the trenches made in an interlayer insulator made of silicon oxide. An insulating film (e.g., a silicon nitride film) is provided on the sides of each trench of the interlayer insulator. A storage electrode made of ruthenium or the like is provided in each trench of the interlayer insulator. A capacitor insulating film made of BSTO or the like is formed on the storage electrode. A plate electrode made of ruthenium or the like is formed on the capacitor insulating film. The plate electrode is common to all capacitors provided. Any two adjacent capacitors are electrically isolated by the interlayer insulator and the insulating film provided on the sides of the trenches of the interlayer insulator.

Abstract: Capacitors are formed in the trenches made in an interlayer insulator made of silicon oxide. An insulating film (e.g., a silicon nitride film) is provided on the sides of each trench of the interlayer insulator. A storage electrode made of ruthenium or the like is provided in each trench of the interlayer insulator. A capacitor insulating film made of BSTO or the like is formed on the storage electrode. A plate electrode made of ruthenium or the like is formed on the capacitor insulating film. The plate electrode is common to all capacitors provided. Any two adjacent capacitors are electrically isolated by the interlayer insulator and the insulating film provided on the sides of the trenches of the interlayer insulator.

Abstract: A floor system includes a plurality of panels placed on a base floor. A space is formed between the panels and the base floor for laying cables. A plurality of sliding plates are arranged on the base floor. A plurality of supports are provided and each support of the plurality of supports is arranged on each of the sliding plates so as to freely slide. The plurality of panels are supported by the plurality of supports by being fixed on a pedestal of the each support of the plurality of supports. The plurality of panels are hence connected to each other to form a single floor surface. The dynamic coefficient of friction between the bottom of the supports and the sliding plates is selected to be a value within a range of 0.09 to 0.25.