Abstract: A semiconductor device includes a first interlayer film formed on an upper surface of a substrate, a first metal wiring line, a second interlayer film, a second metal wiring line, a first via electrically connecting the first metal wiring line and the second metal wiring line, a landing pad embedded in an upper portion of the first interlayer film and penetrating the second interlayer film, and a second via penetrating the substrate and the first interlayer film from a back side of the substrate and connected to the landing pad. The lower surface position of the landing pad is different from that of the first metal wiring line.

Abstract: A liquid crystal display device is provided with a display substrate, an array substrate, a liquid crystal layer sandwiched between the display substrate and the array substrate, and control circuitry. The display substrate includes a touch sensing line. The array substrate includes a common electrode having a constant potential, a first insulating layer provided under the common electrode, a pixel electrode provided under the first insulating layer, a second insulating layer provided under the pixel electrode, a conductive line electrically connected to the common electrode under the second insulating layer, a third insulating layer provided under the conductive line, and a first active element and a second active element provided under the third insulating layer and electrically connected to the pixel electrode.

Abstract: A semiconductor device according to an aspect of die present invention has: a plurality of memory cells MC: a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to, the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against for example, the Row Hammer problem, etc. can be taken.

Abstract: A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.

Abstract: A driver including: an ejection part to which a fastener is supplied; a driver blade which moves from a first position toward a second position and drives the fastener into a driven member; and a rack provided to the driver blade. The driver further includes: a rotary component engaging with the rack and moving the driver blade from the second position to the first position; and a lock plate engaging with the rack. The driver blade moves from the second position to the first position while the rotary component rotates once, the rotary component is released from engaging with the rack after the driver blade moves from the second position to the first position, and moves from the first position to the second position, and the lock plate is engageable with the rack when the driver blade stops before reaching the second position from the first position.

Abstract: A transparent conductive laminate which does not cause erroneous operation under high temperature and high humidity and a touch panel which includes the transparent conductive laminate are provided. The transparent conductive laminate includes a transparent base material; and a transparent electrode layer containing resin which is disposed on one or both sides of the transparent base material, wherein the transparent electrode layer includes a plurality of conductive regions which contain fibrous metals, and a non-conductive region, and the transparent electrode layer has a thickness of 30 nm or more and 150 nm or less.

Abstract: An electronic pulse driver includes a motor, a hammer, an anvil, an end tool mounting unit, a power supply unit, and a control unit. The hammer is rotatable together with the anvil. The end tool mounting unit transmits the rotation of the anvil to an end tool. The power supply unit supplies a drive electric power to the motor. The control unit controls the power supply unit to halt a supply of the drive electric power to the motor when an electric current flowing to the motor increases to a prescribed value. The control unit controls the power supply unit to supply to the motor a prestart electric power lower than the drive electric power before supplying the drive electric power in order to permit the power supply unit to supply the drive electric power after the hammer is in contact with the anvil.

Abstract: An operation panel display device for a medical X-ray photography apparatus may include: a display panel including a photography mode selection region where a plurality of photography mode selection images corresponding to a plurality of X-ray photography modes are displayed; an operation receiver that receives a selection operation to select one of the photography mode selection images displayed on the display panel; a processor that performs display processing of the selected photography mode selection image displayed on the display panel in response to the selection operation received through the operation receiver; and an illustration display region included in the display panel where an illustration image corresponding to the selected photography mode selection image is displayed.

Abstract: A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC, a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.

Abstract: Semiconductor memory testing devices and methods are disclosed. In one respect, a device is disclosed that includes a first memory cell array having a first bit-line and a plurality of first memory cells coupled to the first bit-line; a second memory cell array having a second bit-line and a plurality of second memory cells coupled to the second bit-line, the number of second memory cells being smaller than that of the first memory cells; a sense amplifier coupled to the first bit-line and a first end of the second bit-line; a word decoder configured to operate the second memory cells responsive to a first test signal; and a transistor coupled to a second end of the second bit-line and operated by a second test signal.

Abstract: A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.

Abstract: An object of the present invention is to provide a laminated film which can prevent permeation of the water vapor at the higher level, and the present invention provides a laminated film comprising at least a gas barrier layer and an inorganic polymer layer being laminated on a resin substrate, wherein a Y value calculated from a transmission electron microscope image of a cross section of the inorganic polymer layer by the following procedures (a) to (d) is 0.220 or less. (a) A standard deviation (?) of the contrast of an electron beam-unirradiated part of the inorganic polymer layer is calculated. (b) An electron beam-irradiated part of the inorganic polymer layer is divided into twenty so that divided ones have a film thickness equal in a film thickness direction, and a standard deviation (?n: standard deviation of nth division, n=1˜20) of the contrast of each divided part is calculated. (c) Xn (n=1˜20) of each divided part is calculated from the expression (1).

Abstract: A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that intermittently monitors accesses to the plurality of word lines WL, stores/erases some captured row-addresses in a first number of registers, and detects, by comparison with stored addresses, in response to a first number of accesses to one of the word lines WL in a first period of time. According to the present invention, access histories can be precisely analyzed by a small-scale circuit configuration, and measures against, for example, the Row Hammer problem, etc. can be taken.

Abstract: An object of the present invention is to provide a laminated film which can prevent transmission of the water vapor at the high level, and has good flex resistance, and the present invention provides a laminated film comprising at least a gas barrier layer and an inorganic polymer layer being laminated on a resin substrate, wherein concerning a distance from a surface of the inorganic polymer layer in a film thickness direction of the layer and the ratio of an oxygen atom to a total amount of a silicon atom, an oxygen atom, a carbon atom and a nitrogen atom (oxygen atomic ratio), the ratio of a value of the oxygen atomic ratio O/(total amount of Si, O, C and N) in a region from a surface on a side opposite to the gas barrier layer up to 30% of a film thickness of the inorganic polymer in a depth direction to a value of the oxygen atomic ratio O/(total amount of Si, O, C and N) in a region from 30% of a film thickness of the inorganic polymer layer in a depth direction up to a surface on a side of the gas barr

Abstract: An object of the present invention is to provide a laminated film which can prevent transmission of the water vapor at the high level, and can suppress prevention of dark spots over a long period of time when used as a supporting substrate of an electronic device such as an organic EL element, and the present invention provides a laminated film comprising at least a gas barrier layer and an inorganic polymer layer being laminated on a resin substrate, wherein the arithmetic average height (Sa) of a surface of the inorganic polymer layer is 20 nm or less, and the NH3 gas generation amount per unit mass of the inorganic polymer layer when the laminated film comprising the inorganic polymer layer is accommodated in a sample chamber, and the interior of the sample chamber is heated at 85° C. for 1 hour while the humidified air at 25° C. and 85% RH is flown through the sample chamber is 5000 mass ppm or less.

Abstract: The invention provides a gas barrier laminated film having high impact resistance when a heterolayer is formed on a thin film layer. The laminated film includes a flexible substrate and a thin film layer formed on at least one surface of the substrate, wherein the thin film layer contains Si, O, and C, and the ratio of the number of carbon atoms to the number of silicon atoms which is calculated using peaks each corresponding to each binding energy of 2p of Si, 1s of O, 1s of N, and 1s of C obtained from wide scan spectrums is in the range defined by the following formula (1) when the surface of the thin film layer is subjected to X-ray photoelectron spectrometry, and a intensity ratio of a peak intensity (I2) at 1240 to 1290 cm?1 to a peak intensity (Ii) at 950 to 1050 cm?1 is in the range defined by the following formula (2) when the surface of the thin film layer is measured by an ATR method in infrared spectrometry: 0.01<C/Si?0.02??(1) 0.01?I2/I1<0.

Abstract: Semiconductor memory testing devices and methods are disclosed. In one respect, a device is disclosed that includes a first memory cell array having a first bit-line and a plurality of first memory cells connected to the first bit-line; a second memory cell array having a second bit-line and a plurality of second memory cells connected to the second bit-line, the number of second memory cells being smaller than that of the first memory cells; a sense amplifier connected to the first bit-line and a first end of the second bit-line; a word decoder configured to operate the second memory cells responsive to a first test signal; and a transistor coupled to a second end of the second bit-line and operated by a second test signal.

Abstract: Apparatuses and methods for error correction and detection of data from memory on a plurality of channels are described. An example apparatus includes: a first memory cell array including first input/output nodes; a second memory cell array including second input/output nodes and third input/output nodes; a first error correcting code (ECC) control circuit including fourth input/output nodes and fifth input/output nodes; and a second ECC control circuit including sixth input/output nodes coupled respectively to the third input/output nodes of the second memory cell array. The fourth input/output nodes of the first ECC control circuit are coupled respectively to the first input/output nodes of the first memory cell array. The fifth input/output nodes of the first ECC are coupled respectively to the second input/output nodes of the second memory cell array.

Abstract: Apparatuses and methods for error correction and detection of data from memory on a plurality of channels are described. An example apparatus includes: a first memory cell array including first input/output nodes; a second memory cell array including second input/output nodes and third input/output nodes; a first error correcting code (ECC) control circuit including fourth input/output nodes and fifth input/output nodes; and a second ECC control circuit including sixth input/output nodes coupled respectively to the third input/output nodes of the second memory cell array. The fourth input/output nodes of the first ECC control circuit are coupled respectively to the first input/output nodes of the first memory cell array. The fifth input/output nodes of the first ECC are coupled respectively to the second input/output nodes of the second memory cell array.

Abstract: A powered working machine facilitating work of fixing a tip tool to a tool supporting member is provided. A powered working machine in which a tip tool is driven by power of an electric-powered motor includes: an output shaft to which the tip tool is attached; a tool fixing member which fixes the tip tool to the output shaft; a second shaft to/from which the tool fixing member is attached/detached; a clamp having a locked state in which a state of attachment of the tool fixing member to the second shaft is maintained and an unlocked state in which the tool fixing member can be detached from the second shaft; and a guide member having a first rotation position at which the clamp is in the locked state and a second rotation position at which the clamp is in the unlocked state.