Abstract: Regulator circuitry includes first to third output transistors, a first control transistor and a circuit stage. The first and second output transistors, and the first control transistor have a first channel conductivity type. The second output transistor has a second channel conductivity type. The first and second output transistors have a drain coupled to an output node and a source coupled to a first power supply line. The third output transistor has a drain coupled to the output node and a source coupled to a second power supply line. The circuit stage is configured to drive the gates of the first output transistor, the third output transistor, and the first control transistor based on a specified level of the output voltage.

Abstract: Regulator circuitry includes first to third output transistors, a first control transistor and a circuit stage. The first and second output transistors, and the first control transistor have a first channel conductivity type. The second output transistor has a second channel conductivity type. The first and second output transistors each have a drain coupled to an output node and a source coupled to a first power supply line. The third output transistor has a drain coupled to the output node and a source coupled to a second power supply line. The first control transistor has a gate coupled to a gate of the first output transistor and a source coupled to a gate of the second output transistor. The circuit stage is configured to drive the gates of the first output transistor, the third output transistor, and the first control transistor based on a specified level of the output voltage.

Abstract: An operational amplifier includes an output transistor having a gate coupled to an output node, at least one intermediate transistor each having a common gate node, an input transistor having a gate coupled to an input node, and a load device coupled to sources of the output transistor, the at least one intermediate transistor, and the input transistor. The operational amplifier further includes an output stage coupled to the output node, configured to drive the voltage on the output node based on currents through the output transistor, the at least one intermediate transistors, and the input transistor. The operational amplifier further includes a first switch coupled between the common gate node of the at least one intermediate transistor and the gate of the input transistor, and a second switch coupled between the output node and the common gate node of the at least one intermediate transistors.

Abstract: An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.

Abstract: A display driver comprises: a first grayscale line; output circuitry configured to receive a first grayscale voltage from the first grayscale line and perform digital-analog conversion on a pixel data to output a source output voltage corresponding to the pixel data, the digital-analog conversion being based on the first grayscale voltage; and first gamma assist circuitry comprising a first holding node to hold the first grayscale voltage received from the first grayscale line and configured to drive the first grayscale line based on a first voltage between the first holding node and the first grayscale line.

Abstract: An operational amplifier includes a first transistor, a second transistor, a third transistor, a first constant current source, an output state, a first switch, and a second switch. The first transistor has a first gate configured to receive an output voltage from an output node. The second transistor has a second gate. The third transistor has a third gate configured to receive an input voltage. The first constant current source is coupled to sources of the first transistor, the second transistor, and the third transistor. The output stage is configured to drive the output voltage on the output node based on a first current through the first transistor, a second current through the second transistor, and a third current through the third transistor. The first switch is coupled between the second gate of the second transistor and the third gate of the third transistor; and the second switch is coupled between the output node and the second gate of the second transistor.

Abstract: An operational amplifier comprises a front stage and an output stage. The front stage comprises a first input transistor, a second input transistor, a first node, a second node, and a first current mirror. A first voltage based on a first current through the first input transistor is generated on the first node. A second voltage based on a second current through the second input transistor is generated on the second node. The output stage is configured to output an output voltage based on at least one of the first voltage and the second voltage. The first current mirror comprises a first transistor having a drain connected to the first node, a second transistor having a drain connected to the second node, and a first offset canceling capacitor connected between gates of the first transistor and the second transistor.

Abstract: A display driver comprises: a first grayscale line; output circuitry configured to receive a first grayscale voltage from the first grayscale line and perform digital-analog conversion on a pixel data to output a source output voltage corresponding to the pixel data, the digital-analog conversion being based on the first grayscale voltage; and first gamma assist circuitry comprising a first holding node to hold the first grayscale voltage received from the first grayscale line and configured to drive the first grayscale line based on a first voltage between the first holding node and the first grayscale line.

Abstract: A display driver comprises a digital-to-analog converter (DAC) configured to output a grayscale voltage corresponding to an image data. The display driver further comprises a source amplifier configured to drive a source line of a display panel, and a buffer connected between the DAC and the source amplifier. The buffer comprises a first NMOS transistor having a gate supplied with the grayscale voltage and a drain connected to a power supply. The buffer is configured to supply a current depending on a first current flowing through the first NMOS transistor to an input terminal of the source amplifier.

Abstract: A display driver comprises a digital-to-analog converter (DAC) configured to output a grayscale voltage corresponding to an image data. The display driver further comprises a source amplifier configured to drive a source line of a display panel, and a buffer connected between the DAC and the source amplifier. The buffer comprises a first NMOS transistor having a gate supplied with the grayscale voltage and a drain connected to a power supply. The buffer is configured to supply a current depending on a first current flowing through the first NMOS transistor to an input terminal of the source amplifier.

Abstract: The overdrive amplifier may include: a differential input circuit arranged by connecting, in a folded-cascode style, input transistors supplied with an input signal at gates, and feedback input transistors accepting the feedback of an output signal at respective gates; a current mirror load having mirror input current paths connected to current paths of the feedback input transistors, and mirror output current paths connected to current paths of the input transistors; an output circuit accepting the input of output control signals from the mirror output current paths of the current mirror load; and an overdrive circuit which causes bias currents of directions which boost an output of the output circuit, depending on the output control signals, to pass through the current mirror load based on the output control signals in an overdrive period.

Abstract: The booster precharges a boost-voltage-output terminal to a predetermined voltage before voltage-boosting start by a charge-pump circuit in the booster. While alternately switching one capacitive electrode of a pumping capacitance between first and second voltages, the charge-pump circuit periodically applies a third voltage to the other capacitive electrode, in which the voltage is boosted by lifting up the third voltage each switching. The resultant boost voltage is successively supplied to a stabilization capacitance through a MOS switch circuit for output. Thus, a boost voltage boosted to a sum voltage of the second and third voltages can be obtained. Using a precharge voltage produced by the precharge circuit in the booster as the third voltage can make a MOS switch circuit operable to supply the third voltage and the MOS switch circuit for boost voltage output smaller than a voltage under the sum voltage of the second and third voltages.

Abstract: An integrated circuit device boosts an output voltage which is to be boosted based on the reference power supply voltage, based on another power supply voltage before the reference power supply voltage is supplied.

Abstract: The series regulator has: a differential amplifier; a level shifter including a level shift transistor with a drain connected to a gate; and a source follower including an output transistor. The differential amplifier includes an amplification stage having a non-inverting input terminal for input of a reference voltage, an inverting input terminal for input of a feedback voltage, and an amplifier output terminal. The differential amplifier has a DC operation point where an error of an output voltage at the amplifier output terminal to an input voltage to the non-inverting input terminal is equal to or under a gate-source voltage of an input transistor, and a follower output terminal of the source follower is feedback-connected to the inverting input terminal. The level shifter performs a level shift to make an output voltage of the source follower coincident with the voltage at the amplifier output terminal of the differential amplifier.

Abstract: A differential amplifier circuit and display drive circuit having the same are disclosed herein. In one example, a differential amplifier circuit includes a differential pair transistor configure to receive a differential input signal. A current source is connected in series to the differential pair transistor and an output transistor that drives an output terminal on the basis of the differential input signal. The output transistor is configured to increase a current value of a current source on the basis of a timing at which a voltage level of the output terminal is caused to transition. The output transistor is configured to drive the output terminal only during a period in which the output terminal is caused to transition, and thus a slew rate is improved by increasing a bias current of the differential pair transistor in the period.

Abstract: The overdrive amplifier may include: a differential input circuit arranged by connecting, in a folded-cascode style, input transistors supplied with an input signal at gates, and feedback input transistors accepting the feedback of an output signal at respective gates; a current mirror load having mirror input current paths connected to current paths of the feedback input transistors, and mirror output current paths connected to current paths of the input transistors; an output circuit accepting the input of output control signals from the mirror output current paths of the current mirror load; and an overdrive circuit which causes bias currents of directions which boost an output of the output circuit, depending on the output control signals, to pass through the current mirror load based on the output control signals in an overdrive period.

Abstract: The booster precharges a boost-voltage-output terminal to a predetermined voltage before voltage-boosting start by a charge-pump circuit in the booster. While alternately switching one capacitive electrode of a pumping capacitance between first and second voltages, the charge-pump circuit periodically applies a third voltage to the other capacitive electrode, in which the voltage is boosted by lifting up the third voltage each switching. The resultant boost voltage is successively supplied to a stabilization capacitance through a MOS switch circuit for output. Thus, a boost voltage boosted to a sum voltage of the second and third voltages can be obtained. Using a precharge voltage produced by the precharge circuit in the booster as the third voltage can make a MOS switch circuit operable to supply the third voltage and the MOS switch circuit for boost voltage output smaller than a voltage under the sum voltage of the second and third voltages.

Abstract: An integrated circuit device boosts an output voltage which is to be boosted based on the reference power supply voltage, based on another power supply voltage before the reference power supply voltage is supplied.

Abstract: A display driver includes an input node for receiving display data, a level shift circuit configured to convert voltage level of the display data and output a first voltage and a second voltage based on the display data, an output node for outputting the output display data, a first P-channel MOS transistor coupled to the output node, whose gate is configured to input the first voltage, and a first N-channel MOS transistor coupled to the output node, whose gate is configured to input the second voltage, wherein a voltage difference between the second voltage and the first voltage varies based on the display data.

Abstract: A differential amplifier circuit and display drive circuit having the same are disclosed herein. In one example, a differential amplifier circuit includes a differential pair transistor configure to receive a differential input signal. A current source is connected in series to the differential pair transistor and an output transistor that drives an output terminal on the basis of the differential input signal. The output transistor is configured to increase a current value of a current source on the basis of a timing at which a voltage level of the output terminal is caused to transition. The output transistor is configured to drive the output terminal only during a period in which the output terminal is caused to transition, and thus a slew rate is improved by increasing a bias current of the differential pair transistor in the period.