Patents by Inventor Yuuichi Takeuchi

Yuuichi Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6853006
    Abstract: A silicon carbide (SiC) substrate is provided with an off-oriented {0001} surface whose off-axis direction is <11-20>. A trench is formed on the SiC to have a stripe structure extending toward a <11-20> direction. An SiC epitaxial layer is formed on an inside surface of the trench.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: February 8, 2005
    Assignee: Denso Corporation
    Inventors: Mitsuhiro Kataoka, Yuuichi Takeuchi, Masami Naito, Rajesh Kumar, Hiroyuki Matsunami, Tsunenobu Kimoto
  • Publication number: 20040214453
    Abstract: An insulating film (2) is formed on a semiconductor substrate (1) formed of silicon carbide. A contact hole (3) is formed in the insulating film (2) to expose a part of the upper surface of the semiconductor substrate (1). Then, nickel (Ni) (4′) is formed above the semiconductor substrate (1). Subsequently, the semiconductor substrate (1) is subjected to a heat treatment, whereby the contact portion of nickel (4′) chemically bonds with the semiconductor substrate (1) to become an alloy layer (4) of silicon carbide and nickel. Nickel (4′) on the insulating film (2) is selectively removed by etching liquid for dissolving the nickel.
    Type: Application
    Filed: April 15, 2004
    Publication date: October 28, 2004
    Inventors: Takeshi Endou, Yuuichi Takeuchi
  • Publication number: 20040051136
    Abstract: A silicon carbide (SiC) substrate is provided with an off-oriented {0001} surface whose off-axis direction is <11-20>. A trench is formed on the SiC to have a stripe structure extending toward a <11-20> direction. An SiC epitaxial layer is formed on an inside surface of the trench.
    Type: Application
    Filed: July 31, 2003
    Publication date: March 18, 2004
    Inventors: Mitsuhiro Kataoka, Yuuichi Takeuchi, Masami Naito, Rajesh Kumar, Hiroyuki Matsunami, Tsunenobu Kimoto
  • Publication number: 20030168111
    Abstract: Disclosed is an EGR valve which is compact in size and can increase an amount of exhaust gas to be recirculated in comparison with that of the prior art without deteriorating mountability of an engine to a vehicle. The EGR valve has a housing with a mounting surface adapted to be mounted to an exhaust gas confluence port on a suction pipe, an gas intake pathway extending through the housing along the mounting surface and having longitudinal ends one of which is opened as gas inlet, gas discharge pathways in the housing for communication with longitudinally spaced portions of the gas intake pathway via openings and opened via gas outlets to the mounting surface, and actuators mounted on the housing for moving valve bodies to selectively open and close the openings.
    Type: Application
    Filed: March 5, 2003
    Publication date: September 11, 2003
    Applicant: HINO MOTORS LTD.
    Inventors: Ryuuichi Koga, Yoshiyuki Nii, Yuuichi Takeuchi
  • Patent number: 5723376
    Abstract: A groove is formed on the surface of a semiconductor substrate composed of silicon carbide and a first thermal oxidation film is formed by executing thermal oxidation on a damaged layer of groove inner walls. Then, the first thermal oxidation film is removed so that the damaged layer can be removed. Since a second thermal oxidation film is formed after the damaged layer is removed, the second thermal oxidation film is uniform. A silicon carbide semiconductor device can be achieved with less side etching because substantially a (0001) carbon face of a cubic system is chosen as the plane orientation of the semiconductor substrate.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: March 3, 1998
    Assignee: Nippondenso Co., LTD.
    Inventors: Yuuichi Takeuchi, Takeshi Miyajima, Kazukuni Hara, Norihito Tokura
  • Patent number: 5698880
    Abstract: A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well.
    Type: Grant
    Filed: October 5, 1995
    Date of Patent: December 16, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigeki Takahashi, Mitsuhiro Kataoka, Tsuyoshi Yamamoto, Yuuichi Takeuchi, Norihito Tokura