Patents by Inventor Zhen Wang

Zhen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103900
    Abstract: A disclosed method initializes a sideband management (SBM) bridge coupled to a system bus of an information handling system to identify an operating system (OS) domain resource, e.g., a hardware component or an OS resource, as a sideband-manageable resource. An OS-isolated environment, e.g., a virtual machine (VM) or rootless container, may then be associated with the SBM bridge. Thereafter, the OS domain resource may be managed from the OS-isolated environment via the SBM bridge. The system bus may be a peripheral component interconnect express (PCIe) bus and the SBM bridge may be a PCIe bridge. The SBM bridge may include a single root I/O virtualization (SR-IOV) interface and initializing the SBM bridge may include initializing, by the OS domain resource, a physical function (PF) of the SBM bridge. In such embodiments, associating the OS-isolated object with the SBM bridge may include assigning a virtual function (VF) of the SBM bridge to the OS-isolated object.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 28, 2024
    Applicant: Dell Products L.P.
    Inventors: Bo WANG, Zhuo ZHANG, Zhen CAO, Haitao LUO
  • Publication number: 20240106606
    Abstract: Embodiments of the present disclosure provide an information determination method and device, an electronic device and a storage medium. The method includes: determining a reference signal in a case where a preset condition is satisfied; and determining information of a downlink signal or downlink channel according to the reference signal. The embodiments of the present disclosure solve a problem that physical downlink shared channels (PDSCHs) of multiple component carriers (CCs) cannot be received normally due to conflict of the PDSCHs of the CCs in a time domain in the related art.
    Type: Application
    Filed: September 29, 2020
    Publication date: March 28, 2024
    Inventors: Zhen HE, Shujuan ZHANG, Zhaohua LU, Jianwe WANG, Yu Ngok LI
  • Publication number: 20240105112
    Abstract: A display substrate and a display apparatus are provided. The display substrate includes a base substrate; sub-pixels arranged in an array and on the base substrate; data line groups on the base substrate; each data line group includes data lines, each of which is connected to one column of sub-pixels; data selectors on the base substrate and connected to the data line groups in a one-to-one correspondence; data lines in a same data line group are connected to a same data selector; and data selection signal lines, wherein different data selection signal lines output different data selection signals; and different data lines connected to a same data selector correspond to different data selection signal lines, respectively. The display panel provided may effectively reduce the resistance on the data selection signal lines, thereby reducing the delay of the data selection signals and further improving the charging uniformity of sub-pixels.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 28, 2024
    Inventors: Jian ZHANG, Zhen WANG, Deshuai WANG, Han ZHANG, Wei YAN, Jian SUN
  • Publication number: 20240103328
    Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.
    Type: Application
    Filed: June 29, 2021
    Publication date: March 28, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhen Zhang, Fuqiang Li, Zhenyu Zhang, Yunping Di, Lizhong Wang, Zheng Fang, Jiahui Han, Yawei Wang, Chenyang Zhang, Chengfu Xu, Ce Ning, Pengxia Liang, Feihu Zhou, Xianqin Meng, Weiting Peng, Qiuli Wang, Binbin Tong, Rui Huang, Tianmin Zhou, Wei Yang
  • Publication number: 20240106766
    Abstract: Methods, apparatus, and processor-readable storage media for automatically processing user request data using artificial intelligence techniques are provided herein. An example computer-implemented method includes generating, using a chatbot during a communication session with a user, answers to user requests by processing the user requests using a first set of artificial intelligence techniques associated with the chatbot; generating knowledge base-related predictions associated with the user requests by processing the user requests using a second set of artificial intelligence techniques associated with a knowledge base; calculating at least one score associated with at least a portion of the answers and the user requests based on qualifying values computed in connection with at least one of generating the answers and generating the knowledge base-related predictions; and performing one or more automated actions based on the at least one calculated score.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 28, 2024
    Inventors: Zijia Wang, Zhisong Liu, Zhen Jia, Kenneth Durazzo
  • Patent number: 11944020
    Abstract: A two-terminal resistive switching device (TTRSD) such as a non-volatile two-terminal memory device or a volatile two-terminal selector device can be formed according to a manufacturing process. The process can include forming an etch stop layer that is made of aluminum and can include forming a buffer layer below the etch stop layer and/or between the etch stop layer and a top electrode of the TTRSD.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: March 26, 2024
    Assignee: CROSSBAR, INC.
    Inventors: Sundar Narayanan, Natividad Vasquez, Zhen Gu, Yunyu Wang
  • Patent number: 11941869
    Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for data augmentation. The method includes: generating a group of candidate images based on a target image by using a thermodynamic genetic algorithm (TDGA) model, the TDGA model being configured to apply one or more operations of a set of predetermined image processing operations during each evolution process; and determining multiple augmented images from the group of candidate images based on free energy of the group of candidate images, the multiple augmented images being determined as belonging to the same classification with the target image. In this way, data augmentation can be efficiently implemented by a thermodynamic genetic algorithm.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: March 26, 2024
    Assignee: Dell Products L.P.
    Inventors: Zijia Wang, Wenbin Yang, Zhen Jia
  • Patent number: 11938653
    Abstract: The present invention relates to a powder dry-pressing molding device and method.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 26, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, SHENYANG HONGYANG PRECISION CERAMICS CO., LTD.
    Inventors: Changhe Li, Mingcun Shi, Xiangyang Ma, Baoda Xing, Xiaohong Ma, Yanbin Zhang, Min Yang, Xin Cui, Teng Gao, Xiaoming Wang, Yali Hou, Han Zhai, Zhen Wang, Bingheng Lu, Huajun Cao, Naiqing Zhang, Qidong Wu
  • Patent number: 11943292
    Abstract: A system may include a memory and a processor in communication with the memory. The processor may be configured to perform operations. The operations may include registering a custom resource definition for a tenant with a host and scaling a controller for the customer resource definition. The operations may include generating a replication using the customer resource definition, injecting information into the replication, and syncing a status of the custom resource definition between the host and the tenant.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: March 26, 2024
    Assignee: International Business Machines Corporation
    Inventors: Peng Li, Guangya Liu, Xun Pan, Hai Hui Wang, Xiang Zhen Gan, Xin Peng Liu
  • Patent number: 11940848
    Abstract: An electronic device display may have pixels formed from crystalline semiconductor light-emitting diode dies, organic light-emitting diodes, or other pixel structures. The pixels may be formed on a display panel substrate. A display panel may extend continuously across the display or multiple display panels may be tiled in two dimensions to cover a larger display area. Interconnect substrates may have outwardly facing contacts that are electrically shorted to corresponding inwardly facing contacts such as inwardly facing metal pillars associated with the display panels. The interconnect substrates may be supported by glass layers. Integrated circuits may be embedded in the display panels and/or in the interconnect substrates. A display may have an active area with pixels that includes non-spline pixels in a non-spline display portion located above a straight edge of the display and spline pixel in a spline display portion located above a curved edge of the display.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: March 26, 2024
    Assignee: Apple Inc.
    Inventors: Elmar Gehlen, Zhen Zhang, Francois R. Jacob, Paul S. Drzaic, Han-Chieh Chang, Abbas Jamshidi Roudbari, Anshi Liang, Hopil Bae, Mahdi Farrokh Baroughi, Marc J. DeVincentis, Paolo Sacchetto, Tiffany T. Moy, Warren S. Rieutort-Louis, Yong Sun, Jonathan P. Mar, Zuoqian Wang, Ian D. Tracy, Sunggu Kang, Jaein Choi, Steven E. Molesa, Sandeep Chalasani, Jui-Chih Liao, Xin Zhao, Izhar Z. Ahmed
  • Publication number: 20240096997
    Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a first source/drain region disposed in a PFET region and a second source/drain region disposed in an NFET region. The second source/drain region comprises a dipole region. The structure further includes a first silicide layer disposed on and in contact with the first source/drain region, a second silicide layer disposed on and in contact with the first silicide layer, and a third silicide layer disposed on and in contact with the dipole region of the second source/drain region. The first, second, and third silicide layers include different materials. The structure further includes a first conductive feature disposed over the first source/drain region, a second conductive feature disposed over the second source/drain region, and an interconnect structure disposed on the first and second conductive features.
    Type: Application
    Filed: January 15, 2023
    Publication date: March 21, 2024
    Inventors: Po-Chin Chang, Lin-Yu Huang, Li-Zhen Yu, Yuting Cheng, Sung-Li Wang, Pinyen Lin
  • Publication number: 20240095970
    Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for processing a target object. The method includes acquiring an initial non-video feature vector on the basis of at least one input of a received speech input and text input. The method further includes taking, in response to not receiving a video input, a default feature vector as an initial video feature vector corresponding to the video input. The method further includes generating a video feature, a speech feature, and a text feature on the basis of the initial non-video feature vector and the initial video feature vector. The method further includes generating a processing parameter for a target object on the basis of the video feature, the speech feature, and the text feature, wherein the processing parameter includes at least one of an emotion parameter, an attribute parameter, and a pose parameter.
    Type: Application
    Filed: October 20, 2022
    Publication date: March 21, 2024
    Inventors: Zijia Wang, Zhisong Liu, Zhen Jia
  • Publication number: 20240099122
    Abstract: Provided are an organic electroluminescent device and a use thereof. The organic electroluminescent device comprises a metal complex having particular spectral characteristics (that is, satisfying requirements on D and AR), and the metal complex can better approach the commercially pursued BT.2020 luminescence. Compared with a metal complex that does not satisfy the requirements on D and AR, the metal complex is applied to the organic electroluminescent device to make the obtained organic electroluminescent device have higher device efficiency and more saturated green light emission, can better satisfy the BT.2020 luminescence requirement of the market, and can still maintain high device performance, especially device efficiency, when approaching the BT.2020 luminescence, and the metal complex basically reaches maximum efficiency of the device. The organic electroluminescent device comprising the preceding metal complex has a broad commercial application prospect and can achieve more saturated luminescence.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 21, 2024
    Applicant: BEIJING SUMMER SPROUT TECHNOLOGY CO., LTD.
    Inventors: Chi Yuen Raymond Kwong, Wei Cai, Liang Gao, Jing Wang, Zheng Wang, Hongbo Li, Zhen Wang, Chuanjun Xia
  • Publication number: 20240096000
    Abstract: Embodiments of the present disclosure relate to a method, a device, and a computer program product for rendering an image. The method includes determining, based on a coordinate value of a target point in a target scenario and a viewing direction for the target point, a rendering parameter for the target point. The method further includes adjusting the rendering parameter based on the viewing direction and by performing an upsampling operation on the rendering parameter. The method further includes rendering an image for the target scenario based on the adjusted rendering parameter. By means of the method, resources required by processing of image data are reduced; the image data processing speed is increased; and fast rendering of a high-resolution image can be achieved.
    Type: Application
    Filed: October 14, 2022
    Publication date: March 21, 2024
    Inventors: Zhisong Liu, Zijia Wang, Zhen Jia
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11932062
    Abstract: A tire surface managing method, comprising: emitting detecting light to a target object on a surface of a tire; receiving reflected detecting light from the target object and from the surface adjacent to the target object; determining whether the target object protrudes according to a distance calculated according to the reflected detecting light from the target object and a distance calculated according to the reflected detecting light from the surface; determining whether the target object forms a hole on the surface according to the distance calculated according to the reflected detecting light from the target object and the distance calculated according to the reflected detecting light from the surface; receiving the reflected detecting light from the surface to calculate a width of the hole on the tire; and activating a protection mechanism for a vehicle comprising the tire if the width is larger than a width threshold.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: March 19, 2024
    Assignee: PixArt Imaging Inc.
    Inventors: Guo-Zhen Wang, Chang-Sheng Chiu
  • Patent number: 11932881
    Abstract: A heparin skeleton synthase originates from Neisseria animaloris, with an amino acid sequence as shown in SEQ ID NO.2 and a nucleotide sequence of the coding gene as shown in SEQ ID NO.1. Its recombinant expression level is 6.8 times that of the existing heparin skeleton synthase KfiA from Escherichia coli K5, and total enzyme activity per fermentation liquor is 5.22 times that of the heparin skeleton synthase KfiA. The heparin skeleton synthase mutants obtained through site-directed mutagenesis of the sites No. 16, No. 25, No. 30, No. 111, No. 165, and No. 172 in the amino acid sequence of the said heparin skeleton synthase all have high expression levels.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: March 19, 2024
    Assignees: SHAN DONG UNIVERSITY, Bloomage Biotechnology Corporation Limited
    Inventors: Juzheng Sheng, Xueping Guo, Jianqun Deng, Fengshan Wang, Zhen Lu, Ranran Du, Liu Sun, Yuanjun Sun
  • Patent number: 11935794
    Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Chieh Su, Cheng-Chi Chuang, Chih-Hao Wang, Zhi-Chang Lin, Li-Zhen Yu
  • Patent number: 11933144
    Abstract: Offshore systems and methods may be configured for offshore power generation and carbon dioxide injection for enhanced gas recovery for gas reservoirs. For example, a method may include: providing an offshore facility including a gas turbine, and a gas separator; producing a produced gas from a gas reservoir to the offshore facility; combusting the produced gas in a gas turbine to produce power and a flue gas; at least partially removing nitrogen from the flue gas in a gas separator to produce a carbon dioxide-enriched flue gas and a nitrogen-enriched flue gas; compressing the carbon dioxide-enriched flue gas in a gas compressor to produce a compressed gas; and injecting the compressed gas from the gas compressor into the gas reservoir, wherein 80 mol % or more of hydrocarbon in the produced gas is combusted and/or injected into the gas reservoir.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: March 19, 2024
    Assignee: ExxonMobil Technology and Engineering Company
    Inventors: Rui Wang, Mark Christian Ausborn, Zhen Li, Elliot M. Chang-Tang
  • Publication number: 20240087949
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Li-Zhen Yu, Cheng-Chi Chuang, Chih-Hao Wang, Yu-Ming Lin, Lin-Yu Huang