Abstract: A shift actuator for a transmission includes a drive assembly coupled with a selector interface. A transmission selector operates between a plurality of transmission settings. A threaded actuator is rotationally operated by the drive assembly. A carriage linearly operates along the threaded actuator to define a plurality of actuator positions that correspond to the transmission settings. An actuator arm extends between the carriage and the transmission selector to translate linear operation of the carriage to rotational operation of the transmission selector.

Abstract: A method and an apparatus for displaying an information flow on a terminal device, an electronic device, a computer-readable storage medium, and a computer program product are provided. An implementation is: in response to detecting an activation operation on an application for displaying the information flow, reproducing, on the terminal device, a first page displayed on the terminal device when the application is last switched to running in the background or closed; and in response to determining that a time interval between the activation operation and the application being last switched to running in the background or closed does not exceed a first threshold, displaying a second page as a continuation of a content entry displayed in the first page, where the second page includes at least one first content entry cached in the terminal device before the activation operation but not displayed in the first page.

Abstract: A charger system with a digital interface circuit, wherein the digital interface circuit has an N-bit control register, wherein N is a positive integer no less than 2, and wherein the N-bit register has a primary state machine, at a first portion of addresses of the control register, configured to instruct operation statuses of a system management bus host; and a secondary state machine, at a second portion of addresses of the control register, configured to instruct a data bit of transmission of a corresponding control instruction under each of the operation statuses of the system management bus host.

Abstract: A phase-shift dimming circuit for LED controller having a delay signal generator configured to receive a PWM input signal, and to provide a plurality of pairs of set signal and reset signal, the set signal and the reset signal respectively having pulses; and a plurality of latches configured to respectively receive the plurality of pairs of set signal and reset signal to generate a plurality of PMW output signals, each of the PWM output signals having pulses, and wherein the rising edge of the pulses of the PWM output signals is based on the corresponding set signal pulses, and the falling edge of the pulses of the PWM output signals is based on the corresponding reset signal pulses.

Abstract: A step-down regulator comprising a pseudo constant on time control circuit is disclosed, comprising an on-time generator configured to receive a switching signal provided by the step-down regulator and a control signal provided by the pseudo constant on time control circuit, and generates an on-time signal; a feedback control circuit configured to receive a feedback signal representative of the output voltage of the step-down regulator and generate an output signal; and a logic control circuit coupled to the on-time generator and the feedback control circuit to receive the on-time signal and the output signal and generating the control signal, and a power stage configured to receive an input voltage and the control signal and generate the switching signal.

Abstract: A method and a system are disclosed for processing online joint guarantee. After a server receives an application from a user, the server provides various types of joint guarantee grouping to the user for selection. The server creates a joint guarantee group having a unique ID according to the selection of the user, organizes the information of the joint guarantee group into a data packet and sends the data packet to a bank system to be approved. The method potentially improves the success rate of joint guarantee grouping and removes the geographical limitations. Through the Internet, the method makes it possible to join companies of different geographical locations for online joint guarantee. The method also establishes a complete online alert mechanism, and realizes computerized loan risk control to improve the business credit system.

Abstract: The present invention discloses an analog switching circuit having a first terminal receiving an input signal, a second terminal providing an output signal and a control terminal receiving a switching control signal. The analog switching circuit has a first logic circuit providing a first control signal and a second control signal based on the switching control signal; an NMOS and a PMOS coupled between the first terminal and the second terminal, and controlled by the first control signal and the second control signal respectively; a first control circuit controls the backgate voltage of the NMOS based on the input signal and the switching control signal; and a second control circuit controls the backgate voltage of the PMOS based on the input signal and the switching control signal.

Abstract: The embodiments of the present circuit and method disclose a circuit to bypass a target circuit when an open status is detected. The present circuit may comprise a sample circuit, a monitoring circuit and a bypass circuit. The sample circuit may comprise a capacitor coupled to the target circuit. The monitoring circuit may be coupled to the capacitor and may have an output configured to generate an output signal selectively indicating the open status. The bypass circuit may comprise a switch, wherein the switch has a control terminal coupled to the output of the monitoring circuit and wherein the switch may be configured to be selectively turned ON to bypass the target circuit in accordance with the output of the monitoring circuit.

Abstract: A charger system with a digital interface circuit, wherein the digital interface circuit has an N-bit control register, wherein N is a positive integer no less than 2, and wherein the N-bit register has a primary state machine, at a first portion of addresses of the control register, configured to instruct operation statuses of a system management bus host; and a secondary state machine, at a second portion of addresses of the control register, configured to instruct a data bit of transmission of a corresponding control instruction under each of the operation statuses of the system management bus host.

Abstract: The present technology is directed to class G audio amplifiers and the associated methods of operation. In one embodiment, a class G audio amplifier includes an input port, an audio output stage, a level detector, and a charge pump. The class G audio amplifier regulates the power supplies of the audio output stage according to the input signal, so as to realize high efficiency and high quality audio output.

Abstract: The present invention discloses an analog switching circuit having a first terminal receiving an input signal, a second terminal providing an output signal and a control terminal receiving a switching control signal. The analog switching circuit has a first logic circuit providing a first control signal and a second control signal based on the switching control signal; an NMOS and a PMOS coupled between the first terminal and the second terminal, and controlled by the first control signal and the second control signal respectively; a first control circuit controls the backgate voltage of the NMOS based on the input signal and the switching control signal; and a second control circuit controls the backgate voltage of the PMOS based on the input signal and the switching control signal.

Abstract: A phase-shift dimming circuit for LED controller having a delay signal generator configured to receive a PWM input signal, and to provide a plurality of pairs of set signal and reset signal, the set signal and the reset signal respectively having pulses; and a plurality of latches configured to respectively receive the plurality of pairs of set signal and reset signal to generate a plurality of PMW output signals, each of the PWM output signals having pulses, and wherein the rising edge of the pulses of the PWM output signals is based on the corresponding set signal pulses, and the falling edge of the pulses of the PWM output signals is based on the corresponding reset signal pulses.

Abstract: A step-down regulator comprising a pseudo constant on time control circuit is disclosed, comprising an on-time generator configured to receive a switching signal provided by the step-down regulator and a control signal provided by the pseudo constant on time control circuit, and generates an on-time signal; a feedback control circuit configured to receive a feedback signal representative of the output voltage of the step-down regulator and generate an output signal; and a logic control circuit coupled to the on-time generator and the feedback control circuit to receive the on-time signal and the output signal and generating the control signal, and a power stage configured to receive an input voltage and the control signal and generate the switching signal.

Abstract: The embodiments of the present circuit and method disclose a circuit to bypass a target circuit when an open status is detected. The present circuit may comprise a sample circuit, a monitoring circuit and a bypass circuit. The sample circuit may comprise a capacitor coupled to the target circuit. The monitoring circuit may be coupled to the capacitor and may have an output configured to generate an output signal selectively indicating the open status. The bypass circuit may comprise a switch, wherein the switch has a control terminal coupled to the output of the monitoring circuit and wherein the switch may be configured to be selectively turned ON to bypass the target circuit in accordance with the output of the monitoring circuit.

Abstract: A method and a system of credit risk control use different incentive mechanisms for different type of users for post-loan credit risk control. The method classifies the user to one of several different user types based on the user information and a correspondence relationship between the user information and risk levels, and selects an appropriate incentive mechanism for risk control based on the user type. The incentive mechanisms may either be a positive incentive mechanism or a negative incentive mechanism depending on the user type. The incentive mechanisms are performed over a network, and are designed to encourage a user of good loan payment record but to discourage a user of bad loan payment record. The method and the system are particularly suited for risk control of repayment of various kinds of loans which are applied and disbursed over the Internet.

Abstract: A battery charger integrated circuit with temperature control is disclosed that includes a temperature sensor circuit and a charging current generator circuit. Upon receiving a temperature reading voltage (VDT), the temperature sensing circuit is operable to generate a second reference voltage (VREF) that is a function of the first reference voltage (VREF1). The charging current generator circuit generates and continuously adjusts a reference current (I1) and a charging current (IOUT) according to the second reference voltage (VREF). Whenever the temperature reading voltage (VDT) exceeds the first reference voltage, the temperature sensor circuit is operable to adjust the second reference voltage (VREF).

Abstract: A method and a loan access evaluation system use a loan applicant's actual business transaction information received from an online business system on which the loan applicant conducts business. In addition to the information of the loan applicant's owner, other general background business information and historical business information of the loan applicant, the method and the system obtain detailed transaction data of the loan applicant on e-commerce systems or platforms and banks, and thus have access to dynamic business data of the applicant for a more reliable loan access appraisal.

Abstract: The present technology is directed to class G audio amplifiers and the associated methods of operation. In one embodiment, a class G audio amplifier includes an input port, an audio output stage, a level detector, and a charge pump. The class G audio amplifier regulates the power supplies of the audio output stage according to the input signal, so as to realize high efficiency and high quality audio output.

Abstract: A battery charger integrated circuit with temperature control is disclosed that includes a temperature sensor circuit and a charging current generator circuit. Upon receiving a temperature reading voltage (VDT), the temperature sensing circuit is operable to generate a second reference voltage (VREF) that is a function of the first reference voltage (VREF1). The charging current generator circuit generates and continuously adjusts a reference current (I1) and a charging current (IOUT) according to the second reference voltage (VREF). Whenever the temperature reading voltage (VDT) exceeds the first reference voltage, the temperature sensor circuit is operable to adjust the second reference voltage (VREF).

Abstract: A battery charger integrated circuit with temperature control is disclosed that includes a temperature sensor circuit and a charging current generator circuit. Upon receiving a temperature reading voltage (VDT), the temperature sensing circuit is operable to generate a second reference voltage (VREF) that is a function of the first reference voltage (VREF1). The charging current generator circuit generates and continuously adjusts a reference current (I1) and a charging current (IOUT) according to the second reference voltage (VREF). Whenever the temperature reading voltage (VDT) exceeds the first reference voltage, the temperature sensor circuit is operable to adjust the second reference voltage (VREF).