Patents by Inventor Zhijun JIANG
Zhijun JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11145504Abstract: A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.Type: GrantFiled: October 9, 2019Date of Patent: October 12, 2021Assignee: Applied Materials, Inc.Inventors: Zhijun Jiang, Ganesh Balasubramanian, Arkajit Roy Barman, Hidehiro Kojiri, Xinhai Han, Deenesh Padhi, Chuan Ying Wang, Yue Chen, Daemian Raj Benjamin Raj, Nikhil Sudhindrarao Jorapur, Vu Ngoc Tran Nguyen, Miguel S. Fung, Jose Angelo Olave, Thian Choi Lim
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Publication number: 20210047730Abstract: Exemplary semiconductor processing chambers may include a showerhead. The chambers may also include a substrate support characterized by a first surface facing the showerhead. The first surface may be configured to support a semiconductor substrate. The substrate support may define a recessed pocket centrally located within the first surface. The recessed pocket may be defined by an outer radial wall characterized by a height from the first surface within the recessed pocket that is greater than or about 150% of a thickness of the semiconductor substrate.Type: ApplicationFiled: August 6, 2020Publication date: February 18, 2021Applicant: Applied Materials, Inc.Inventors: Sai Susmita Addepalli, Yue Chen, Zhijun Jiang, Shailendra Srivastava, Nikhil Sudhindrarao Jorapur, Daemian Raj Benjamin Raj, Greg Chichkanoff, Qiang Ma, Abhigyan Keshri, Xinhai Han, Ganesh Balasubramanian, Deenesh Padhi
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Publication number: 20200399756Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: ApplicationFiled: September 3, 2020Publication date: December 24, 2020Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Michael Wenyoung TSIANG, Masaki OGATA, Zhijun JIANG, Juan Carlos ROCHA-ALVAREZ, Thomas NOWAK, Jianhua ZHOU, Ramprakash SANKARAKRISHNAN, Amit Kumar BANSAL, Jeongmin LEE, Todd EGAN, Edward BUDIARTO, Dmitriy PANASYUK, Terrance Y. LEE, Jian J. CHEN, Mohamad A. AYOUB, Heung Lak PARK, Patrick REILLY, Shahid SHAIKH, Bok Hoen KIM, Sergey STARIK, Ganesh BALASUBRAMANIAN
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Patent number: 10793954Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: May 10, 2018Date of Patent: October 6, 2020Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
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Patent number: 10777394Abstract: Implementations of the present disclosure generally relate to methods for cleaning processing chambers. More specifically, implementations described herein relate to methods for determining processing chamber cleaning endpoints. In some implementations, a “virtual sensor” for detecting a cleaning endpoint is provided. The “virtual sensor” is based on monitoring trends of chamber foreline pressure during cleaning of the chamber, which involves converting solid deposited films on the chamber parts into gaseous byproducts by reaction with etchants like fluorine plasma for example. Validity of the “virtual sensor” has been confirmed by comparing the “virtual sensor” response with infrared-based optical measurements. In another implementation, methods of accounting for foreline pressure differences due to facility design and foreline clogging over time.Type: GrantFiled: November 13, 2017Date of Patent: September 15, 2020Assignee: Applied Materials, Inc.Inventors: Hemant P. Mungekar, William Pryor, Zhijun Jiang
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Publication number: 20200227258Abstract: A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.Type: ApplicationFiled: October 9, 2019Publication date: July 16, 2020Inventors: Zhijun JIANG, Ganesh BALASUBRAMANIAN, Arkajit ROY BARMAN, Hidehiro KOJIRI, Xinhai HAN, Deenesh PADHI, Chuan Ying WANG, Yue CHEN, Daemian Raj BENJAMIN RAJ, Nikhil Sudhindrarao JORAPUR, Vu Ngoc Tran NGUYEN, Miguel S. FUNG, Jose Angelo OLAVE, Thian Choi LIM
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Publication number: 20200126784Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1?x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.Type: ApplicationFiled: December 18, 2019Publication date: April 23, 2020Inventors: Xinhai HAN, Kang Sub YIM, Zhijun JIANG, Deenesh PADHI
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Publication number: 20200098547Abstract: Systems and methods for a process chamber that decreases the severity and occurrence of substrate defects due to loosened scale is discussed herein. A gas distribution assembly is disposed in a process chamber and includes a faceplate with a plurality of apertures formed therethrough and a second member. The faceplate is coupled to the second member which is configured to couple to the faceplate to reduce an exposed area of the faceplate and minimize an available area for material buildup during the release of gas into the process chamber. The second member is further configured to improve the glow of precursors into the process chamber. The gas distribution assembly can be heated before and during process chamber operations, and can remain heated between process chamber operations.Type: ApplicationFiled: September 25, 2019Publication date: March 26, 2020Inventors: Priyanka DASH, Zhijun JIANG, Ganesh BALASUBRAMANIAN, Qiang MA, Kalyanjit GHOSH, Kaushik ALAYAVALLI, Yuxing ZHANG, Daniel HWUNG, Shawyon JAFARI
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Patent number: 10600624Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.Type: GrantFiled: December 21, 2018Date of Patent: March 24, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Kalyanjit Ghosh, Sanjeev Baluja, Mayur G. Kulkarni, Shailendra Srivastava, Tejas Ulavi, Yusheng Alvin Zhou, Amit Kumar Bansal, Priyanka Dash, Zhijun Jiang, Ganesh Balasubramanian, Qiang Ma, Kaushik Alayavalli, Yuxing Zhang, Daniel Hwung, Shawyon Jafari
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Patent number: 10553427Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1-x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.Type: GrantFiled: April 20, 2018Date of Patent: February 4, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Xinhai Han, Kang Sub Yim, Zhijun Jiang, Deenesh Padhi
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Publication number: 20190382889Abstract: Implementations of the present disclosure generally provide improved methods for cleaning a vacuum chamber to remove adsorbed contaminants therefrom prior to a chamber seasoning process while maintaining the chamber at desired deposition processing temperatures. The contaminants may be formed from the reaction of cleaning gases with the chamber components and the walls of the vacuum chamber.Type: ApplicationFiled: May 24, 2019Publication date: December 19, 2019Inventors: Venkata Sharat Chandra PARIMI, Zhijun JIANG, Ganesh BALASUBRAMANIAN, Vivek Bharat SHAH, Shailendra SRIVASTAVA, Amit Kumar BANSAL, Xinhai HAN, Vinay K. PRABHAKAR
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Patent number: 10276353Abstract: A method and apparatus for a dual-channel showerhead is provided. In one embodiment the showerhead comprises a body comprising a conductive material having a plurality of first openings formed therethrough comprising a first gas channel and a plurality of second openings formed therethrough comprising a second gas channel that is fluidly separated from the first gas channel, wherein each of the first openings having a geometry that is different than each of the second openings.Type: GrantFiled: April 29, 2016Date of Patent: April 30, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Kaushik Alayavalli, Xinhai Han, Praket P. Jha, Masaki Ogata, Zhijun Jiang, Allen Ko, Ndanka O. Mukuti, Thuy Britcher, Amit Kumar Bansal, Ganesh Balasubramanian, Juan Carlos Rocha-Alvarez, Bok Hoen Kim
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Publication number: 20190122872Abstract: Systems and methods for depositing a film in a PECVD chamber while reducing residue buildup in the chamber. In some embodiments disclosed herein, a processing chamber includes a chamber body, a substrate support, a showerhead, and one or more heaters configured to heat the showerhead. In some embodiments, the processing chamber includes a controller.Type: ApplicationFiled: December 21, 2018Publication date: April 25, 2019Inventors: Kalyanjit GHOSH, Sanjeev BALUJA, Mayur G. KULKARNI, Shailendra SRIVASTAVA, Tejas ULAVI, Yusheng ALVIN ZHOU, Amit Kumar BANSAL, Priyanka DASH, Zhijun JIANG, Ganesh BALASUBRAMANIAN, Qiang MA, Kaushik ALAYAVALLI, Yuxing ZHANG, Daniel HWUNG, Shawyon JAFARI
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Publication number: 20180315592Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1-x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.Type: ApplicationFiled: April 20, 2018Publication date: November 1, 2018Inventors: Xinhai HAN, Kang Sub YIM, Zhijun JIANG, Deenesh PADHI
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Publication number: 20180258535Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: ApplicationFiled: May 10, 2018Publication date: September 13, 2018Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Michael Wenyoung TSIANG, Masaki OGATA, Zhijun JIANG, Juan Carlos ROCHA-ALVAREZ, Thomas NOWAK, Jianhua ZHOU, Ramprakash SANKARAKRISHNAN, Amit Kumar BANSAL, Jeongmin LEE, Todd EGAN, Edward BUDIARTO, Dmitriy PANASYUK, Terrance Y. LEE, Jian J. CHEN, Mohamad A. AYOUB, Heung Lak PARK, Patrick REILLY, Shahid SHAIKH, Bok Hoen KIM, Sergey STARIK, Ganesh BALASUBRAMANIAN
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Patent number: 10060032Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: November 3, 2017Date of Patent: August 28, 2018Assignee: APPLIED MATERIALS, INC.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian
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Patent number: 10030306Abstract: Apparatus and method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: October 23, 2013Date of Patent: July 24, 2018Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Ganesh Balasubramanian, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik
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Publication number: 20180166260Abstract: Implementations of the present disclosure generally relate to methods for cleaning processing chambers. More specifically, implementations described herein relate to methods for determining processing chamber cleaning endpoints. In some implementations, a “virtual sensor” for detecting a cleaning endpoint is provided. The “virtual sensor” is based on monitoring trends of chamber foreline pressure during cleaning of the chamber, which involves converting solid deposited films on the chamber parts into gaseous byproducts by reaction with etchants like fluorine plasma for example. Validity of the “virtual sensor” has been confirmed by comparing the “virtual sensor” response with infrared-based optical measurements. In another implementation, methods of accounting for foreline pressure differences due to facility design and foreline clogging over time.Type: ApplicationFiled: November 13, 2017Publication date: June 14, 2018Inventors: Hemant P. MUNGEKAR, William PRYOR, Zhijun JIANG
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Publication number: 20180066364Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: ApplicationFiled: November 3, 2017Publication date: March 8, 2018Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Michael Wenyoung TSIANG, Masaki OGATA, Zhijun JIANG, Juan Carlos ROCHA-ALVAREZ, Thomas NOWAK, Jianhua ZHOU, Ramprakash SANKARAKRISHNAN, Amit Kumar BANSAL, Jeongmin LEE, Todd EGAN, Edward BUDIARTO, Dmitriy PANASYUK, Terrance Y. LEE, Jian J. CHEN, Mohamad A. AYOUB, Heung Lak PARK, Patrick REILLY, Shahid SHAIKH, Bok Hoen KIM, Sergey STARIK, Ganesh BALASUBRAMANIAN
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Patent number: 9816187Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.Type: GrantFiled: September 28, 2016Date of Patent: November 14, 2017Assignee: APPLIED MATERIALS, INC.Inventors: Nagarajan Rajagopalan, Xinhai Han, Michael Wenyoung Tsiang, Masaki Ogata, Zhijun Jiang, Juan Carlos Rocha-Alvarez, Thomas Nowak, Jianhua Zhou, Ramprakash Sankarakrishnan, Amit Kumar Bansal, Jeongmin Lee, Todd Egan, Edward Budiarto, Dmitriy Panasyuk, Terrance Y. Lee, Jian J. Chen, Mohamad A. Ayoub, Heung Lak Park, Patrick Reilly, Shahid Shaikh, Bok Hoen Kim, Sergey Starik, Ganesh Balasubramanian