FREQUENCY OFFSET CORRECTION

Abstract

Various methods and systems are provided for frequency offset correction. In one example, among others, a method includes determining a phase estimation of a RF signal, rotating a sample of the RF signal based at least in part upon the phase estimation, and determining a channel estimation based upon the rotated sample. The channel estimation may be derotated based at least in part upon the phase estimation. In another example, a communication device includes a phase rotator configured to rotate RF signal samples based upon a rotation offset, a channel estimation filter configured to determine channel estimates, and a phase derotator configured to rotate the channel estimates based upon another rotation offset. Another example of a communication device includes a differential detector configured to determine conjugate multiply results, an averaging filter configured to sum the results, and a phase estimator configured to determine a phase estimation based upon the sum.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims priority to, and the benefit of, U.S. Provisional Patent Application entitled “CELLULAR BASEBAND PROCESSING,” having Ser. No. 61/565,864, filed on Dec. 1, 2011, and U.S. Provisional Patent Application entitled “CELLULAR BASEBAND PROCESSING,” having Ser. No. 61/568,868, filed on Dec. 9, 2011, both of which are incorporated by reference in their entirety.

BACKGROUND

Wideband code division multiple access (WCDMA) is a third generation (3G) cellular technology that enables the concurrent transmission of a plurality of distinct digital signals via a common RF channel. WCDMA supports a range of communications services that include voice, high speed data, and video communications. In WCDMA cellular systems, a mobile wireless communications device, such as a cell phone, monitors broadcast channels from a serving cell and neighbor cells to facilitate a soft-hand-over mechanism.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.

FIG. 1 is a graphical representation of an example of a wireless communication system in accordance with various embodiments of the present disclosure.

FIGS. 2, 3A, 3B and 5 are graphical representations of examples of a system for frequency offset correction in accordance with various embodiments of the present disclosure.

FIG. 4 is a graphical representation of an example of a phase accumulator and channel estimation of FIGS. 2, 3A, and 3B in accordance with various embodiments of the present disclosure.

FIG. 6 is a graphical representation of an example of front end antennas of user equipment (UE) of FIG. 1 in accordance with various embodiments of the present disclosure.

FIG. 7 is a flow chart illustrating an example of frequency offset correction in accordance with various embodiments of the present disclosure.

DETAILED DESCRIPTION

The present disclosure relates to carrier frequency offset correction in mobile communication devices. In WCDMA and/or other wireless technologies subject to mobility, a wireless communications device such as, e.g., a cell phone monitors broadcast channels from a serving cell and available neighbor cell(s) to facilitate a soft-hand over between cells, where the serving cell may refer to, e.g., a HSDPA serving cell (i.e., the cell associated with the base station that performs the transmission and reception of the dedicated HS-DSCH radio link for a given wireless communication device). The reference carrier frequency in the wireless communications device is usually tracked and locked at the serving cell's frequency in the receiver front end of the wireless communications device. This may be accomplished based upon monitoring of the common pilot downlink physical channel (CPICH) received at the wireless communication device from the serving cell. Carrier frequency offset information from processing the CPICH channel received from the serving cell may be used to adjust a phase locked loop (PLL) in the analog domain of the receiver to synchronize with the serving cell frequency, using what can be referred to as a first closed loop control. In addition, a cordic rotation block can be used in the front end digital baseband portion of the receiver to further adjust for any residual frequency offset of the received signals, with post correction in the analog domain, using what can be referred to as a second closed loop control based upon a phase estimation of the serving cell CPICH. However, neighbor cells, interfering cells, and other cells within an active set may experience a different carrier frequency offset than the serving cell because of, e.g., radio frequency (RF) impairment and Doppler frequency shifts caused by movement of the wireless communications device. For instance, the carrier frequency offset between the serving cell and a neighbor (or other) cell may be in the range of about 100 Hz to about 1500 Hz or more and is commonly the range of about 500 Hz to about 800 Hz.

Referring to FIG. 1, shown is an example of a wireless communication system in accordance with various embodiments of the present disclosure. In the example of FIG. 1, a cell 100 includes a base station 103. The cell 100 may also include user equipment (UE) 106 such as, e.g., one or more mobile communication devices configured to receive RF signals. In the example of FIG. 1, base station 103 provides the serving cell broadcast channel to the UE 106 and thus may be referred to as the serving cell base station for UE 106. The UE 106 tracks the frequency of the serving cell signal from base station 103 to synchronize communications with the serving cell base station 103. A phase locked loop (PLL) may be adjusted to synchronize the UE 106 with the serving cell base station 103 using a first closed loop control. The communication signal transmitted from the serving cell base station 103 can reach the UE 106 by multiple different pathways 109 along which the signal may be reflected, blocked, or otherwise delayed. A signal received by the UE 106 via one of the different pathways 109 may be referred to as a finger of the transmitted RF signal. Another base station 112 located outside of the cell 100 may service a neighbor cell. The RF signal from the neighbor base station 112 can also reach the UE 106 by multiple different pathways 115. In the case of a neighbor cell, the signals received by the UE 106 via the different pathways 115 may be referred to as tiny fingers. The UE 106 may also detect RF signals from other devices such as, e.g., other neighbor cells, other interfering cells, other UE (e.g., another mobile communication device), and/or other RF transmission devices.

Wideband code division multiple access (WCDMA) is a third generation (3G) cellular technology that enables the concurrent transmission of a plurality of distinct digital signals via a common RF channel. WCDMA supports a range of communication services that include voice, high speed data and video communications. In WCDMA systems, the UE 106 monitors the broadcast channels from the serving cell 100 and neighbor cell(s) to allow for soft-hand-over of the UE 106 between the base stations of the cells (e.g., 103 and 112). The serving cell frequency can be tracked using the serving cell CPICH, which allows the reference frequency of the UE 106 to be locked to the serving cell frequency, using a first closed loop control. Any remaining frequency offset of the serving cell signals may be compensated for using a second closed loop control based on a phase estimation of the serving cell CPICH. The carrier frequency offset of neighbor (or other) cell may also be compensated for using a phase estimation of the corresponding cell CPICH.

Referring to FIG. 2, shown is a graphical representation of an example of a system 200 for carrier frequency offset correction that may be used in the UE 106 of FIG. 1. The UE 106 tracks the frequency of the serving cell signal to synchronize communications with the serving cell base station 103. A frequency signal provided by a crystal oscillator (XO) 203 to the PLL 206 may be adjusted by a first closed loop control to synchronize the clock generation 209 of the UE 106 to the serving cell frequency. An analog input 212 from a receiver (RX) or transceiver of the UE 106 is converted by an analog-to-digital converter (ADC) 215 and the digital signal is provided to a front end cordic rotator 218, which performs a cordic rotation to compensate for at least a portion of any remaining frequency offset present in the digital signal. A closed loop control 221 (which may be referred to as a second closed loop control) determines a phase estimation corresponding to the frequency offset based upon, e.g., the CPICH from the serving cell base station 103 (FIG. 1), which is used to adjust the front end cordic rotation 218 to compensate for residual frequency offset that may be present. In general, adjustment of the crystal oscillator 203 and/or PLL 206 using the first closed loop control can reduce the carrier frequency offset of the serving cell signal to about 10-20 HZ. The second closed loop control of the front end cordic rotation 218 may further reduce the frequency offset to about 1-2 Hz or less. This correction can improve the HSDPA peak throughput of high geometry channels such as, e.g., 64QAM or higher.

For the phase estimation of the carrier frequency offset, it is assumed that the frequency offset is constant over the samples of interest of the observed cell. For example, at CPICH symbol time (t), the sample may be represented as a_i<b_i> where a_i is the amplitude and b_i is the phase. Assuming that the change in the amplitude between symbol time (t) and the next CPICH symbol time (t+1) is minimal, the sample at time (t+1) may be given by a_i<b_i+f>, where f is the frequency offset. The frequency offset may be determined using a conjugate multiply of the two samples at (t) and (t+1), which results in:

|a_i|²<f>.

The phase estimation corresponding to the frequency offset may be based upon the summation of the conjugate multiply results over a moving average filter:

Σ_i|a_i|²<f>.

The summation (Σ_i) can include some or all of the fingers assigned to the observed cell. Because the samples in the moving average filter have the same frequency offset (f) between adjacent samples, the conjugate multiply results add coherently. Using signal from multiple fingers reduces the time for averaging. Samples of fingers with larger amplitude contribute more to the sum (maximum ratio combining).

In the closed loop control 221 of FIG. 2, the CPICH of the serving cell may be processed by a descrambler 224 to obtain a series of decoded and/or descrambled samples, which are provided to an accumulator (or despreader) 227. A differential phase detector 230 carries out conjugate multiplication on the series of contiguous samples by multiplying 233 a current sample with the preceding sample that is delayed 236 and conjugated 239. The results of the conjugate multiply are then provided by the differential detector 230 to an averaging filter 242, where they are summed and provided to a phase estimator 245. For example, the in-phase (I) and quadrature (Q) components may be processed separately and provided to a cordic polar circuit for phase estimation. The phase corresponding to the frequency offset (f) may be estimated as a tan(I/Q). The estimated phase is then sent back to the front end cordic rotator 218 via an averaging loop filter 248 to adjust the cordic rotation of the RX input 212. Processing is performed at the symbol rate, where the symbol time period may be defined as the number of chips accumulated by the accumulator 227 (e.g., 512 chips, where the chip rate is equal to 3.84 Mega chips per second). The closed loop control 221 may be a circuit implemented in hardware to minimize the processing time. In some implementations, one or more portions of the closed loop control 221 circuit may be implemented in firmware (FW).

While the front end cordic rotator 218 compensates for carrier frequency offset of the signal from the serving cell base station 103 (FIG. 1), signals from other sources (e.g., neighbor cells, other interfering cells, and/or other UE) remain offset in frequency from the serving cell signal. An open loop control can be used for compensation of frequency offset of other cells to improve, e.g., channel estimation (ChEst) accuracy for tracking of neighbor cells to improve broadcast channel (BCH) detection, monitoring of other cells within the active set to improve dedicated channel (DCH) detection, suppression of interference from other cells, UE, and/or RF sources, etc. One or more fingers associated with a RF signal transmitted by any given one of the other cells, UE, or other RF source may be used to determine a phase estimation, which can be used to correct frequency offset for improved ChEst quality for one or more of the fingers associated with that given cell, UE, or other RF source. The open loop control may be a circuit implemented in hardware to minimize the processing time. In some implementations, one or more portions of the circuit may be implemented in firmware.

In the example of FIG. 2, a plurality of fingers associated with a RF signal transmitted by the given cell, UE, or other RF source are processed by a frequency offset front end 251 including a descrambler 254, an accumulator 257, and a differential phase detector 260. The descrambler 254 decodes and/or descrambles a series of samples associated with one of the fingers, which are then provided to the accumulator 257 before conjugate multiplication by the differential detector 260. Conjugate multiplication is carried out on the series of contiguous samples received from the accumulator 257 by delaying 263 and conjugating 266 the preceding sample, which is then multiplied 269 with the current sample. The differential detector 260 provides the conjugate multiply results associated with the finger to an averaging filter 272, where they are summed, across fingers and over samples in time. As illustrated in FIG. 2, the averaging filter 272 sums the conjugate multiply results associated with each of the plurality of fingers to determine the frequency offset (f) of the transmitted RF signal. The averaging filter 272 may be implemented as, e.g., a moving sum/circular buffer that combines the differential detector outputs of each of the plurality of fingers, across multiple samples in time. As the results of each finger have the same frequency offset (f), they add coherently with the samples of larger amplitude contributing more to the sum.

The I-component and Q-component from the averaging filter 272 may then be used for phase estimation 275 by, e.g., a cordic polar circuit. Phase accumulator 278 accumulates the estimated phases corresponding to the frequency offset to compensate the channel estimation 281. Signals from the phase accumulator 278 are used to adjust rotation of the decoded samples from the accumulator 257 before channel estimation to compensate for the effects of the frequency offset and to adjust derotation of the channel estimate so that it is in-phase with the data physical channel decoded samples. This may be accomplished for each finger by first rotating samples from the accumulator 257 using a phase rotator 284 such as, e.g., a cordic rotator before a ChEst filter 287 determines the channel estimate. The output of the ChEst filter 287 may then be derotated by a phase derotator 290 (e.g., a cordic derotator) to bring back the channel estimate phase in phase with the data samples. Due to the modulo nature of angles, the sum of the estimated phases is wrapped around between −pi to pi. In addition, the group delay of the ChEst filter 287 is taken into account for controlling the phase derotation 290 so that the channel estimate is in phase with data of the received RF signal.

Referring to FIGS. 3A and 3B, shown is a graphical representation of another example of frequency offset correction for channel estimation (ChEst) of at least a portion of a signal transmitted by, e.g., a neighbor cell. As shown in FIG. 3A, a digital signal received from the RX front end 303 for each finger (i=1, . . . , k) of the transmitted RF signal is decoded and/or descrambled by a descrambler 306. Samples are provided from the descrambler 306 to accumulator 309 where they are accumulated over a given number L of chips prior to performing channel estimation 312 with frequency offset correction. An output from each accumulator 309 (e.g., after accumulation over M chips where M≦L) associated with one of the fingers provides a series of despread samples to a corresponding differential detector 315 (FIG. 3B) for determination of a phase estimation corresponding to the frequency offset associated with the received signal. The accumulator length L and output accumulated length M may be varied with the frequency offset of the application. For example, shorter accumulation lengths and outputs may be used for larger frequency offsets and longer accumulation lengths and outputs may be used for smaller frequency offsets.

In the example of FIG. 3B, the differential phase detector 315 performs conjugate multiplication on the series of contiguous samples received from the output of accumulator 309 by delaying and conjugating the preceding sample, which is then multiplied with the current sample as in the example of FIG. 2. A moving sum/circular buffer 324 combines the differential detector outputs of each of the plurality of fingers and over multiple samples in time.

The output from each differential detector 315 may be combined with equal gains or may be weighted before combining across multiple fingers (i=1, . . . , k). For example, the output from each differential detector 315 may be weighted 327 by a factor of w_i prior to being received by the moving sum/circular buffer 324. In some implementations, the weighting (w_i) may be based at least in part upon the signal-to-noise ratio (SNR) of the RF signal for the corresponding finger i. The signal and noise powers may be measured and used to determine the weighting (w_i). In this way, fingers with a good SNR are given a higher (or larger) weight and thus have more influence on the phase estimation. A SNR estimator may be used to dynamically adjust the applied weighting (w_i). As the SNR of a finger of the transmitted signal changes, the weighting factor (w_i) may be dynamically updated. A weight (w_i) of zero means that the differential detector output for the corresponding finger is assigned for combining by the moving sum/circular buffer 324 but does not contribute to the sum for the phase estimation.

In some implementations, the differential detector output for each finger may be switched (s_i) “off” or “on” for combining by the moving sum/circular buffer 324. When a finger is switched off (e.g., s_i=0), the differential detector output for that finger is not combined by the moving sum/circular buffer 324 for the phase estimation. The finite impulse response (FIR) buffer size of the moving sum/circular buffer 324 may be up to P taps. Every time the differential detector generates a new sample, it is filled by, e.g., 1, 2, or up to k samples depending on the number of fingers assigned and/or selected. For example, the FIR buffer fills up three times faster if three fingers (k=3) are switched “on” than if only one finger is switched “on.” This enables support for dynamic finger assignment.

The summation of the applied fingers (and thus the phase estimation) is synchronized to a single finger. For example, the summation by the moving sum/circular buffer 324 may be synchronized with the finger having the largest delay. This allows for the samples for all of the currently applied fingers to be received before processing by the moving sum/circular buffer 324. If the sample accumulation for a finger is not completed before accumulation of the synchronizing finger samples, then the preceding set of samples for that finger may be used. The finger used for synchronization may be a selectable parameter. In addition, a symbol count may be provided to and/or from the moving sum/circular buffer 324 to synchronize the processing.

The moving sum/circular buffer 324 sums the conjugate multiply results associated with each of the fingers to determine the phase estimation corresponding to the frequency offset of the transmitted RF signal. The I-component and Q-component from the moving sum/circular buffer 324 are used for phase estimation by a cordic polar circuit 330. The cordic polar output is a real number from −pi to pi. A phase accumulator 336 receives the estimated phases corresponding to the frequency offset from the cordic polar circuit 330 and accumulates the phase estimation to compensate the channel estimation 312. The phase accumulator 336 uses the phase accumulation to provide rotation and derotation adjustments to the channel estimation 312 for each of the plurality of fingers.

Referring to FIG. 4, shown is a graphical representation of an example of the phase accumulator 336 and channel estimation 312 of FIGS. 3A and 3B. The phase accumulator 336 receives the estimated phases from the cordic polar circuit 330 as a series of inputs. The phase accumulator 336 sums the estimated phases for frequency offset compensation of the channel estimation 312 of each finger. The channel estimation 312 can include a phase rotator 339 such as, e.g., a cordic rotator, a ChEst filter 342 to estimate the channel, and a phase derotator 345 such as, e.g., a cordic derotator. The channel estimation 312 may receive samples from the accumulator 309 (FIG. 3A).

Given that the effect of the carrier frequency offset is cumulative, the phase accumulator 336 sums the estimated phases to determine the phase accumulation for adjustment of both the pre-ChEst cordic rotation by the phase rotator 339 and the post-ChEst cordic derotation by the phase derotator 345 that correspond to the frequency offset of the RF signal. The rotation offset for the pre-ChEst cordic rotation is the phase accumulation output of a simple 1-tap infinite impulse response (IIR) filter 406 where the current output y(n) is based upon a sum of the preceding output y(n−1) and the current input x(n) from the cordic polar circuit 330, which may be expressed as y(n)=x(n)+y(n−1). Due to the modulo nature of angles, the sum of the phase estimation is wrapped around between the equivalent of −pi to pi. The cordic polar 330 may include a cordic iteration select from firmware to define the number of iterations performed during the cordic polar determination.

For example, the default number of iterations may be eight. A cutoff integer may also be provided to prevent cordic polar computation of 0+j0. The ChEst Filter 342 then estimates the channel with an N-tap FIR filter having a constant group delay using the rotated samples.

For the post-ChEst cordic rotation by the phase derotator 345, the group delay of the ChEst filter 342 is taken into account. The output of the N-tap FIR ChEst filter 342 is delayed by a filter group delay of (N−1)/2. Thus, the derotation offset is determined by subtracting the angle that was accumulated during the group delay from the currently accumulated value, which is the sum of (N−1)/2 samples in the past. For simplicity, it is assumed that the carrier frequency offset (f) remains constant during the group delay. Thus, the angle accumulated during the delay may be considered to be f×(N−1)/2. As shown in FIG. 4, circuitry 409 multiples the current input x(n) from the cordic polar 330 by (N−1) and divides the result by two before being subtracted from the current output y(n) from the IIR filter 406. The resulting output of y(n)−x(n)(N−1)/2 is wrapped around between the equivalent of −pi to pi and used as the input to the phase derotator 345. Derotation after the frequency offset correction places the channel estimate in-phase with the RF signal data. The phase rotator 339 and phase derotator 345 may include a cordic iteration select to define the number of iterations performed during the cordic rotation/derotation, which may be eight as a default. The in-phase channel estimation may then be used, e.g., to track the neighbor cell BCH for soft handover, to cancel out interference from other cells, and/or monitoring other cells within the active set. Typically, these examples have a large frequency offset of about a hundred Hertz to a few hundred Hertz, or more.

In some embodiments, the channel estimate may be utilized without derotation by the phase derotator 345. For example, if the ChEst of a neighbor cell is used for interference suppression within the serving cell received signal, then derotation may not be carried out. The interference is removed from the serving cell signal using the ChEst information from the interfering neighbor cell, which can be obtained directly from the output of the ChEst Filter module 342.

The circuitry of FIGS. 3A and 3B may be implemented in hardware to improve processing time. Hardware implemented frequency offset correction using phase rotation may be carried out at the symbol rate, where the symbol time period may be defined as the number of chips accumulated by the accumulator 227 (e.g., 512 chips, where the chip rate is equal to 3.84 Mega chips per second). If the hardware processing is sufficiently fast, the current phase estimate may be used to adjust the cordic rotation/derotation. In some embodiments, portions of the circuitry may be implemented in firmware (FW), however this will slow performance. For example, FIG. 3B shows that provisions may be included at the output of the differential detectors 315 and the input to the phase accumulator 336 for firmware to perform the phase estimation. The output of the differential detectors 315 may be provided to the firmware via time slot averaging 348. The phase estimated by the firmware may then be returned to the phase accumulator 336 to determine the rotation and derotation offsets. In some implementations, the phase accumulation adjustments can be calculated from the phase estimate of the previous symbol to enable the hardware to satisfy timing constraints.

Phase estimation based upon samples from a plurality of fingers of the transmitted signal may also be used for frequency offset correction in other applications such as, e.g., adjusting the tracking of the crystal oscillator (XO) 203 and/or the PLL 206. Referring to FIG. 5, shown is a graphical representation of an example of another portion of the system for frequency offset correction. For example, a plurality of fingers of a serving cell transmission may be monitored and used to determine a phase estimation to adjust the XO 203 and/or PLL 206. The plurality of fingers are received from the front end cordic rotator 218 and processed by frequency offset front ends 551 including a descrambler 254, an accumulator 257, and a differential phase detector 260 as described with respect to FIG. 2. The frequency offset front ends 551 provide the conjugate multiply results associated with each finger to an averaging filter 572, where they are summed. As the results of each finger have the same frequency offset (f), they add coherently. The components from the averaging filter 572 may then be used for phase estimation 575 by, e.g., a cordic polar circuit. The estimated phase may be sent to the XO 203 and/or PLL 206 via an averaging filter 578 to adjust the operating frequency of the XO 203 and/or PLL 206. By adjusting the accumulator length and output, the reference frequency of the XO 203/PLL 206 may be adjusted to a point where the front end cordic rotation 218 may be eliminated.

In some implementations, receive diversity may be accommodated by using a multiplexer to select one or two desired antenna(s) of the UE 106 for processing. In other embodiments, signals from multiple antennas may be summed for averaging and phase estimation in a way similar to fingers of the RF signal. For example, with space-time transmit diversity (STTD), a front end RX signal 603 may be provided to a descrambler 606 for each transmit antenna (e.g., 606A for antenna 1 and 606B for antenna 2) as illustrated in FIG. 6. For the second transmit antenna, the descrambled output is further passed through a CPICH pilot pattern remover 609, corresponding to the pattern transmitted by the second transmit antenna. Samples are provided from the descrambler 606A and pilot pattern remover 609 to an accumulator 612 where they are accumulated over a given number L of chips prior to performing channel estimation 615 with frequency offset correction. An output from each accumulator 612 (e.g., after accumulation over M chips where M<=L) associated with one of the transmit antennas provides a series of despread samples to a corresponding differential detector 618, the output of which is then summed 621 across the transmit antennas for determination of a phase estimation corresponding to the carrier frequency offset associated with the received signal. The accumulator length L and output accumulated length M may be varied with the frequency offset of the application. The summed outputs of the differential detectors 618 may be used for phase estimation. The summed outputs of the differential detectors 618 may also be provided to firmware via time slot averaging 624. A plurality of differential detectors 618 may be used, one for each transmit and/or receive antenna pair and/or finger, and indexed by (t, r, f) where t refers to the transmit antenna, r refers to the receive antenna, and f refers to the finger. The sum 621 may be determined for all three dimensions (t, r, f) and over time.

The frequency offset correction may operate in various modes. For example, the frequency offset correction may be enabled or disabled based upon, e.g., a user selectable setting. In some embodiments, the rotation/derotation of the channel estimation may be enabled or disabled by the user. Whether portions of the circuitry are implemented in firmware may also be defined by the user of the UE 106 using a selectable setting.

The circuitry of certain embodiments of the present disclosure can be implemented in hardware, software, firmware, or a combination thereof. In some embodiments, portions of the circuitry may be implemented in software or firmware that is stored in a memory and that is executed by a suitable instruction execution system such as, e.g., a processor. If implemented in hardware, the circuitry can be implemented with any or a combination of the following technologies, which are all well known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit (ASIC) having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.

Referring now to FIG. 7, shown is a flowchart illustrating an example of frequency offset correction for channel estimation. Beginning with 703, one or more RF signals received from, e.g., a serving cell, a neighbor cell, an interfering cell, and/or other UE. In some cases, one or more fingers of the transmitted RF signal may be received by the UE 106 (FIG. 1). A phase estimation is determined in 706 based upon samples corresponding to the received RF signal. In some implementations, the phase estimation may be determined based upon samples corresponding to each of the plurality of fingers. The phase estimation corresponds to a frequency offset associated with the received RF signal. A channel estimate may also be determined based upon samples of the received RF signal. In 709, a sample corresponding to the RF signal is rotated based at least in part upon the determined phase estimation. In other embodiments, a sample corresponding to at least one finger of the RF signal is rotated based at least in part upon the determined phase estimation. The channel estimation corresponding to the RF signal, or the channel estimation corresponding to the at least one finger, may be determined based upon the rotated sample in 712. The channel estimation may then be derotated in 715 based at least in part upon the determined phase estimation so that the channel estimation is in phase with data of the RF signal.

The flowchart of FIG. 7 shows the functionality and operation of an implementation of portions of frequency offset correction of channel estimation. If embodied in software, each block may represent a module, segment, or portion of code that comprises program instructions to implement the specified logical function(s). The program instructions may be embodied in the form of source code that comprises human-readable statements written in a programming language or machine code that comprises numerical instructions recognizable by a suitable execution system such as a processor in a communication device or other system. The machine code may be converted from the source code, etc. If embodied in hardware, each block may represent a circuit or a number of interconnected circuits to implement the specified logical function(s).

Although the flowchart of FIG. 7 shows a specific order of execution, it is understood that the order of execution may differ from that which is depicted. For example, the order of execution of two or more blocks may be scrambled relative to the order shown. Also, two or more blocks shown in succession in FIG. 7 may be executed concurrently or with partial concurrence. Further, in some embodiments, one or more of the blocks shown in FIG. 7 may be skipped or omitted. In addition, any number of counters, state variables, warning semaphores, or messages might be added to the logical flow described herein, for purposes of enhanced utility, accounting, performance measurement, or providing troubleshooting aids, etc. It is understood that all such variations are within the scope of the present disclosure.

Also, any logic or application described herein that comprises software or code can be embodied in any non-transitory computer-readable medium for use by or in connection with an instruction execution system such as, for example, a processor 206 in a computer system or other system. In this sense, the logic may comprise, for example, statements including instructions and declarations that can be fetched from the computer-readable medium and executed by the instruction execution system. In the context of the present disclosure, a “computer-readable medium” can be any medium that can contain, store, or maintain the logic or application described herein for use by or in connection with the instruction execution system.

The computer-readable medium can comprise any one of many physical media such as, for example, magnetic, optical, or semiconductor media. More specific examples of a suitable computer-readable medium would include, but are not limited to, magnetic tapes, magnetic floppy diskettes, magnetic hard drives, memory cards, solid-state drives, USB flash drives, or optical discs. Also, the computer-readable medium may be a random access memory (RAM) including, for example, static random access memory (SRAM) and dynamic random access memory (DRAM), or magnetic random access memory (MRAM). In addition, the computer-readable medium may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or other type of memory device.

It should be emphasized that the above-described embodiments of the present disclosure are merely possible examples of implementations set forth for a clear understanding of the principles of the disclosure. Many variations and modifications may be made to the above-described embodiment(s) without departing substantially from the spirit and principles of the disclosure. All such modifications and variations are intended to be included herein within the scope of this disclosure and protected by the following claims.

It should be noted that ratios, concentrations, amounts, and other numerical data may be expressed herein in a range format. It is to be understood that such a range format is used for convenience and brevity, and thus, should be interpreted in a flexible manner to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited. To illustrate, a concentration range of “about 0.1% to about 5%” should be interpreted to include not only the explicitly recited concentration of about 0.1 wt % to about 5 wt %, but also include individual concentrations (e.g., 1%, 2%, 3%, and 4%) and the sub-ranges (e.g., 0.5%, 1.1%, 2.2%, 3.3%, and 4.4%) within the indicated range. The term “about” can include traditional rounding according to significant figures of numerical values. In addition, the phrase “about ‘x’ to ‘y’” includes “about ‘x’ to about ‘y’”.

Claims

1. A method, comprising:

receiving a plurality of fingers of a radio frequency (RF) signal;

determining a phase estimation based upon samples corresponding to each of the plurality of fingers, the phase estimation corresponding to a carrier frequency offset associated with the received RF signal;

rotating a sample corresponding to at least one finger of the RF signal based at least in part upon the determined phase estimation; and

determining a channel estimation corresponding to the at least one finger based upon the rotated sample.

2. The method of claim 1, comprising determining conjugate multiply results for the at least one finger based upon the samples corresponding to the at least one finger, wherein the phase estimation is determined based at least in part upon a sum of the conjugate multiply results.

3. The method of claim 2, comprising determining conjugate multiply results for each of the plurality of fingers based upon the samples corresponding to the corresponding one of the plurality of fingers, wherein the phase estimation is determined based at least in part upon a sum of the conjugate multiply results for each of the plurality of fingers.

4. The method of claim 3, wherein the conjugate multiply results for each of the plurality of fingers is weighted before summing.

5. The method of claim 4, wherein the weighting is determined based at least in part upon a signal-to-noise ratio of the corresponding one of the plurality of fingers.

6. The method of claim 1, comprising determining a phase accumulation based at least in part upon a series of determined phase estimations, wherein rotating the sample corresponding to at least one finger of the RF signal is based at least in part upon the phase accumulation.

7. The method of claim 1, comprising derotating the channel estimation based at least in part upon the determined phase estimation.

8. The method of claim 7, wherein derotating the channel estimation is based at least in part upon a phase accumulation based at least in part upon a series of determined phase estimations and a phase rotation corresponding to a group delay associated with the channel estimation.

9. The method of claim 8, wherein the channel estimation is determined by a N-tap finite impulse response (FIR) filter with a group delay of (N−1)/2.

10. The method of claim 1, wherein the RF signal is from a neighbor cell.

11. A communication device, comprising:

a circuit that determines a channel estimation for a finger of a received radio frequency (RF) signal, the circuit comprising: a phase rotator configured to rotate samples of the finger of the RF signal based upon a first rotation offset corresponding to a carrier frequency offset associated with the received RF signal; a channel estimation filter configured to determine channel estimates based upon the rotated samples; and a phase derotator configured to rotate the channel estimates based upon a second rotation offset corresponding to the carrier frequency offset.

12. The communication device of claim 11, wherein the circuit comprises a phase accumulator configured to determine the first rotation offset and the second rotation offset based at least in part upon a series of phase estimates corresponding to the carrier frequency offset associated with the received RF signal.

13. The communication device of claim 12, wherein the phase accumulator comprises an infinite impulse response (IIR) filter configured to determine the first rotation offset based upon the series of phase estimates.

14. The communication device of claim 13, wherein the first rotation offset is wrapped around between −pi to pi.

15. The communication device of claim 13, wherein the phase accumulator determines the second rotation by scaling a current phase estimate by a group delay associated with the channel estimation filter and adding the scaled phase estimate to a current output of the IIR filter.

16. A communication device, comprising:

a circuit that provides a phase estimation based upon a carrier frequency offset associated with a received radio frequency (RF) signal, the circuit comprising: a differential detector configured to determine a series conjugate multiply results for a series of samples associated with the received RF signal; an averaging filter configured to sum the series of conjugate multiply results; and a phase estimator configured to determine the phase estimation based upon the sum of the conjugate multiply results.

17. The communication device of claim 16, wherein the circuit comprises an accumulator configured to provide the series of samples associated with the received RF signal to the differential detector.

18. The communication device of claim 16, wherein the circuit comprises a plurality of differential detectors, each differential detector corresponding to a finger of the RF signal, and wherein the averaging filter is configured to sum a series of conjugate multiply results from each of the plurality of differential detectors.

19. The communication device of claim 16, wherein the circuit comprises a plurality of differential detectors, each differential detector corresponding to an antenna of the communication device, wherein conjugate multiply results of the plurality of differential detectors are summed to determine the series conjugate multiply results.

20. The communication device of claim 16, wherein the phase estimator comprises a cordic polar circuit configured to determine the phase estimation based upon the sum of the conjugate multiply results.