Method for preventing an increase in contact hole width during contact formation
According to one exemplary embodiment, a method for forming a contact over a silicide layer situated in a semiconductor die comprises a step of depositing a barrier layer on sidewalls of a contact hole and on a native oxide layer situated at a bottom of the contact hole, where the sidewalls are defined by the contact hole in a dielectric layer. The step of depositing the barrier layer on the sidewalls of the contact hole and on the native oxide layer can be optimized such that the barrier layer has a greater thickness at a top of the contact hole than a thickness at the bottom of the contact hole. According to this exemplary embodiment, the method further comprises a step of removing a portion of the barrier layer and the native oxide layer situated at the bottom of the contact hole to expose the silicide layer.
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The present invention is generally in the field of semiconductor device fabrication. More particularly, the present invention is in the field of contact formation for semiconductor devices in a semiconductor die.
BACKGROUND ARTContacts are utilized, among other things, to provide connections between a transistor region of a semiconductor die and an interconnect metal layer situated above the transistor region. To achieve high circuit density, these contacts, which generally have a high aspect ratio, must fit within a small area of the semiconductor die without touching or otherwise interfering with each other. As such, it is important to control contact hole width during contact formation to achieve a contact having a sufficiently small width.
During a conventional contact fabrication process, a contact hole is typically defined by lithography and etched in an oxide layer, which can be situated, for example, over a transistor region of a semiconductor die. The resulting contact hole can be formed over a silicide layer, which can be connected to, for example, a source or drain area in the transistor region of the semiconductor die. The contact hole is then lined with a barrier layer comprising a metal, such as titanium, and filled with a metal, such as tungsten, to form a contact. However, before the barrier layer can be deposited on the sidewalls of the contact hole and on the silicide layer situated at the bottom of contact hole, a native oxide layer that forms over the silicide layer must first be removed. In the conventional contact fabrication process, the native oxide layer is typically removed by utilizing a sputter etch process comprising argon.
However, during the sputter etch process, top corner portions of the oxide layer than defines the contact hole are also etched in addition to the native oxide layer, which causes the top of the contact hole to increase in width. As a result, the contact that is formed after the contact hole has been filled with tungsten has an undesirable increased width compared to the initial width of the patterned contact hole.
Thus, there is a need in the art for a method for forming a contact over a transistor region of a semiconductor die that prevents an undesirable increase in contact hole width during contact formation.
SUMMARYThe present invention is directed to method for preventing an increase in contact hole width during contact formation. The present invention addresses and resolves the need in the art for a method for forming a contact over a transistor region of a semiconductor die that prevents an undesirable increase in contact hole width during contact formation.
According to one exemplary embodiment, a method for forming a contact over a silicide layer situated in a semiconductor die comprises a step of depositing a barrier layer on sidewalls of a contact hole and on a native oxide layer situated at a bottom of the contact hole, where the sidewalls are defined by the contact hole in a dielectric layer. For example, the barrier layer may be titanium/titanium nitride and dielectric layer may be PECVD oxide. The step of depositing the barrier layer on the sidewalls of the contact hole and on the native oxide layer can be optimized such that the barrier layer has a greater thickness at a top of the contact hole than a thickness at the bottom of the contact hole.
According to this exemplary embodiment, the method further comprises a step of removing a portion of the barrier layer and the native oxide layer situated at the bottom of the contact hole to expose the silicide layer. For example, the portion of the barrier layer and the native oxide layer situated at the bottom of the contact hole can be removed by utilizing a sputter etch process. The contact hole comprises an electrical contact width, where the electrical contact width is not increased by the sputter etch process. The dielectric layer comprises top corner regions situated adjacent to the contact hole, where the top corner regions of the dielectric layer are not etch during the step of removing the portion of the barrier layer and the native oxide layer situated at the bottom of the contact hole. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.
The present invention is directed to method for preventing increased contact hole width during contact formation in a semiconductor die. The following description contains specific information pertaining to the implementation of the present invention. One skilled in the art will recognize that the present invention may be implemented in a manner different from that specifically discussed in the present application. Moreover, some of the specific details of the invention are not discussed in order not to obscure the invention.
The drawings in the present application and their accompanying detailed description are directed to merely exemplary embodiments of the invention. To maintain brevity, other embodiments of the present invention are not specifically described in the present application and are not specifically illustrated by the present drawings.
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From the above description of exemplary embodiments of the invention it is manifest that various techniques can be used for implementing the concepts of the present invention without departing from its scope. Moreover, while the invention has been described with specific reference to certain embodiments, a person of ordinary skill in the art would recognize that changes could be made in form and detail without departing from the spirit and the scope of the invention. The described exemplary embodiments are to be considered in all respects as illustrative and not restrictive. It should also be understood that the invention is not limited to the particular exemplary embodiments described herein, but is capable of many rearrangements, modifications, and substitutions without departing from the scope of the invention.
Thus, method for preventing an increase in contact hole width during contact formation has been described.
Claims
1. A method for forming a contact over a silicide layer situated in a semiconductor die, said method comprising steps of:
- depositing a barrier layer on sidewalls of a contact hole and on a native oxide layer situated at a bottom of said contact hole, said sidewalls being defined by said contact hole in a dielectric layer, said native oxide layer being situated over said silicide layer;
- removing said native oxide layer situated over said silicide layer at said bottom of said contact hole by utilizing a sputter etch/deposition process.
2. The method of claim 1 wherein said step of removing said native oxide layer situated over said silicide layer at said bottom of said contact hole comprises simultaneously sputter etching said barrier layer and said native oxide layer and depositing titanium/titanium nitride on said barrier layer.
3. The method of claim 1 wherein said sputter etch/deposition process has a sputter etch/deposition ratio greater than 1.0.
4. The method of claim 1 wherein said dielectric layer comprises top corner regions situated adjacent to said contact hole, wherein said sputter etch/deposition process does not etch said top corner regions of said dielectric layer.
5. The method of claim 1 wherein said contact hole has an electrical contact width, wherein said electrical contact width is not increased by said sputter etch/deposition process.
6. The method of claim 1 wherein said sputter etch/deposition process comprises an argon sputter etch.
7. The method of claim 1 wherein said dielectric layer comprises PECVD oxide.
8. A method for forming a contact over a silicide layer situated in a semiconductor die, said method comprising steps of:
- depositing a barrier layer on sidewalls of a contact hole and on a native oxide layer situated at a bottom of said contact hole, said sidewalls being defined by said contact hole in a dielectric layer;
- removing a portion of said barrier layer and said native oxide layer situated at said bottom of said contact hole to expose said suicide layer, wherein said step of depositing said barrier layer on said sidewalls of said contact hole is optimized such that said barrier layer has a greater thickness at a top of said contact hole than a thickness at said bottom of said contact hole.
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Type: Grant
Filed: Nov 8, 2003
Date of Patent: Feb 28, 2006
Patent Publication Number: 20050101148
Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA)
Inventors: Dawn Hopper (San Jose, CA), Hiroyuki Kinoshita (Sunnyvale, CA), Christy Woo (Cupertino, CA)
Primary Examiner: Duy-Vu N. Deo
Attorney: Farjami & Farjami LLP
Application Number: 10/705,631
International Classification: H01L 21/302 (20060101); H01L 21/461 (20060101);