Flat panel display with photosensitive glass spacer
A flat panel display includes a vacuum container having a pair of flat panels disposed facing each other at a predetermined gap, and a spacer disposed between the panels to maintain the gap. The spacer includes plural sub-spacers bonded to each other at least one bonding portion.
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This application claims priority to and the benefit of Korean Application No. 2001-63449, filed on Oct. 15, 2001 in the Korean Patent Office, the entire disclosure of which is incorporated herein by reference.
FILED OF THE INVENTIONThe present invention relates to a flat panel display, and more particularly, to a flat panel display with a photosensitive glass spacer for maintaining a cell gap.
BACKGROUND OF THE INVENTIONGenerally, a flat panel display (FPD) has an advantage of saving space as it can be designed to be thin and be driven by a relatively low voltage. Well known FPDs include: a field emission display (FED), a vacuum fluorescent display (VFD), a liquid crystal display (LCD), and a plasma display panel (PDP).
Such FPDs are generally formed of a vacuum container having a pair of facing panels and a spacer for maintaining a gap between the panels. When the panels are sealed in a high vacuum state, the panel may be deformed or damaged by the pressure difference between the inner and outer sides of the panels. The spacer prevents such deformation and damage to the panels. In addition, the spacer maintains the cell gap between the panels to uniformly realize the brightness when an image is displayed by exciting phosphors. The spacer is generally formed through screen-printing. That is, a screen mask having a predetermined pattern of mesh holes and a panel on which the spacer is to be formed are first fixed on a printing device. Paste is provided on the screen mask and squeezed onto the panel through the screen mask. However, screen-printing has a limitation in precisely forming the spacer and in increasing the aspect ratio (i.e., the height with respect to the width).
Accordingly, in recent years, a photosensitive glass spacer has been proposed to solve the above problems. U.S. Pat. Nos. 5,894,193 and 6,149,484 disclose a field emission display having such a photosensitive glass spacer and a method for manufacturing the same. As taught by these patents, a photosensitive glass having a predetermined thickness is crystallized in a predetermined pattern, and the crystallized pattern is removed to form a single spacer frame assembly. However, the spacer may deteriorate the quality of the flat display, due to the following reasons.
First, when the light exposure for crystallizing the photosensitive glass is not fully realized, the crystallization on the opposite surface, which is not directly exposed to the light, is realized less than at the light-exposing surface during the heat-treatment process for baking the spacer. This causes the aspect ratio of the completed spacer to be reduced. This will be described in more detail with reference to the accompanying drawings. As shown in
Secondly, the spacer is designed not to discriminate as to the upper and lower portions. This structure makes it difficult for the spacer to be easily arranged on the panels as the patterns of electrode and phosphor layers are differently formed on the facing panels. For example, a cathode panel is provided with plural stripe-type electrodes and an anode panel is provided with a dot-type phosphor layer. Therefore, it is difficult to effectively arrange the spacer on the non-display area of the panels.
Thirdly, while a rectangular frame-type or cross-type spacer can be easily arranged, however to obtain the effective function of the spacer, the number of spacers should be increased, making it difficult to arrange the spacers. A rib- or sheet-type spacer can be arranged in the longitudinal direction of the panel, reducing the number of spacers. However, a special member for stably supporting the spacers becomes required.
The present invention provides a solution to the above-described problems.
SUMMARY OF THE INVENTIONIn accordance with the present invention a spacer for a flat panel display is provided that has a high aspect ratio and that can be easily arranged in response to various patterns of a variety of elements such as a cathode electrode and a phosphor layer that are formed on panels defining a vacuum container.
A flat panel display is accordingly provided which includes a vacuum container having a pair of flat panels disposed facing each other at a predetermined gap and a spacer disposed between the panels to maintain the gap, wherein the spacer includes plural sub-spacers bonded to each other at least one bonding portion. The spacer can be formed of a photosensitive glass. The bonding portion can be formed by a thermal diffusion bonding process. The sub-spacers can have different shapes from each other. One of the sub-spacers is formed as a cross-type pillar, in a rectangular pillar shape, or in a bar shape. The sub-spacers can be symmetrically formed on the basis of the bonding portion. The flat panel display further includes a cathode electrode formed on a surface of one of the panels. An emitter is formed on the surface of the cathode electrode. An anode electrode is formed on a surface of the other panel. A phosphor layer is formed on the surface of the anode electrode.
An embodiment of the present invention and a variety of modified examples will now be described in more detail, in conjunction with the accompanying drawings.
As shown in the drawing, a desired mask pattern is first formed on each of more than two photosensitive glasses (ST 10). The photosensitive glasses are exposed to an exposing lamp (ST 20). Then, after the mask pattern is removed, the photosensitive glasses are aligned/stacked in a multi-layer (ST30). Next, the stacked glasses are bonded to each other through a thermal diffusion process (ST40). The bonded glasses are crystallized through a baking process for making the light-exposed portion and the non-light-exposed portion different (ST50). Finally, a portion of the photosensitive glasses is selectively removed (ST 60).
The above steps are described in more detail with reference to
Referring now to
After the above alignment/stacking, the thermal diffusion bonding process and the crystallization process are performed according to the temperature profile shown in
When crystallization step ST50 is completed, and the exposed portion of photosensitive glasses 10 and 12 are crystallized, the crystallized portion is etched with an HF solution.
Referring now to
Lower sub-spacer 24′ can be formed as a cross-shape pillar; and an upper sub-spacer 24″ can be formed: in a rectangular bar shape arranged in an opposite direction to one of the cross-shape arms of lower sub-spacer 24′ (see
The reference numeral 26 in the drawings indicates a bonding portion formed through the thermal diffusion bonding process. Bonding portion 26 is formed at more than one location of spacer 24. For example, when spacer 24 is formed of upper and lower sub-spacers 24′ and 24″, the bonding portion is provided at one location of spacer 24. When spacer 24 is formed of more than three sub-spacers, bonding portion 26 is formed at two locations of spacer 24.
In addition, spacer 24 shown in
In
Cathode electrodes 32 formed in plural line patterns are formed on an inner surface of cathode panel 28. Gate electrodes 36 formed in plural line patterns at right angles to the line patterns of cathode electrode 32 are formed on an insulating layer 34 formed on the inner surface of cathode panel 28 to cover cathode electrodes 32.
Anode electrodes 38 formed in plural line patterns arranged in an identical direction to the line patterns of cathode electrodes 32 are formed on anode panel 30.
Plural holes are formed on pixel regions where the line patterns of cathode electrodes 32 intersect the line patterns of gate electrodes 36. Planar emitter 40 formed of carbon-based material such as carbon nanotubes is formed on cathode electrodes 32 through the holes.
Here, an electron-emission material such as molybdenum can be used instead of planar emitter 40.
On a surface of each anode electrode 38, opposing emitter 40, patterns of phosphor layer 42 excited by the electrons emitted from emitter 40 are formed. One end of each spacer 24 for supporting anode electrode 38 is formed on anode electrode 38 between the patterns of phosphor layer 42. The other end of the spacer is supported on gate electrode 36.
Here, lower sub-spacer 24′ of spacer 24 is formed in a cross shape, and upper sub-spacer 24″ is formed in a stripe shape (see
The spacer 24 can be modified to the above-described modified examples according to the patterns of phosphor layer 42 and cathode electrode 32.
In the above described flat panel display, since the spacer is formed in a multi-layer having upper and lower sub-spacers, the aspect ratio thereof can be increased, thereby improving the quality of the display. Furthermore, since the upper and lower sub-spacers can be variably designed according to the pattern of the electrode and the phosphors, it is easy to set the location of the spacer.
Particularly, in a flat panel display having a cathode panel provided with a stripe pattern electrode and an anode panel provided with a dot pattern phosphor, it is possible to effectively locate the spacer on the non-display area.
Furthermore, since plural spacers are bonded by bar-type sub-spacers, the manufacturing process can be simplified.
While this invention has been described in connection with what is presently considered to be practical embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims
1. A flat panel display comprising:
- a vacuum container having a pair of flat panels disposed facing each other at a predetermined gap, the pair of flat panels including a first panel and a second panel, the first panel having patterns of phosphor layer formed; and
- a spacer disposed between the pair of panels to maintain the gap,
- wherein the spacer includes plural sub-spacers bonded to each other at a bonding portion,
- wherein the spacer is formed of a photosensitive glass,
- wherein one end of the spacer is disposed between the patterns of phosphor layer,
- wherein a first group of sub-spacers are formed on the first panel and a second group of sub-spacers are formed on the second panel,
- wherein the first group of sub-spacers has a different shape compared with the second group of sub-spacers, and
- wherein a surface area of the first group of sub-spacers at the first panel is smaller than a surface area of the second group of sub-spacers at the second panel.
2. The flat panel display of claim 1, wherein one of the sub-spacers is formed as a cross-type pillar.
3. The flat panel display of claim 1, wherein one of the sub-spacer is formed in a bar shape.
4. The flat panel display of claim 1, wherein one of the sub-spacer is formed in a cylinder shape.
5. The flat panel display of claim 1, wherein one of the sub-spacers is formed in a pillar shape.
6. The flat panel display of claim 1, wherein one of the sub-spacer is formed in a cube shape.
7. The flat panel display of claim 1, wherein the sub-spacers are symmetrically formed on the basis of the bonding portion.
8. The flat panel display of claim 1, further comprising:
- a cathode electrode formed on a surface of one of the panels;
- an emitter formed on the surface of the cathode electrode;
- an anode electrode formed on a surface of the other panel; and
- the patterns of phosphor layer formed on the surface of the anode electrode.
5347292 | September 13, 1994 | Ge et al. |
5548181 | August 20, 1996 | Jones |
5565742 | October 15, 1996 | Shichao et al. |
5703611 | December 30, 1997 | Kishino et al. |
5834891 | November 10, 1998 | Novich |
5894193 | April 13, 1999 | Amrine et al. |
5894194 | April 13, 1999 | Lu et al. |
5997377 | December 7, 1999 | Sagara et al. |
6144153 | November 7, 2000 | Nakatani |
6149484 | November 21, 2000 | Amrine et al. |
6285127 | September 4, 2001 | Khan et al. |
6501526 | December 31, 2002 | Oh |
Type: Grant
Filed: May 31, 2002
Date of Patent: Oct 2, 2007
Patent Publication Number: 20030071553
Assignee: Samsung SDI Co., Ltd. (Suwon-si)
Inventors: Kyung-Sun Ryu (Seoul), Eung-Joon Chi (Seoul)
Primary Examiner: David Nelms
Assistant Examiner: Michael H. Caley
Attorney: Christie, Parker & Hale, LLP
Application Number: 10/160,696
International Classification: H01J 1/88 (20060101); H01J 19/42 (20060101);