Patents Issued in May 31, 2001
  • Publication number: 20010002283
    Abstract: The disclosure relates to an apparatus for electrostatically adhering grains to a planar substrate comprising:
    Type: Application
    Filed: January 25, 2001
    Publication date: May 31, 2001
    Inventors: Hoi Cheong Steve Sun, Bogdan Brycki
  • Publication number: 20010002284
    Abstract: The present invention provides a method for the formation of an organic coating on a substrate. The method includes: providing a substrate in a vacuum; providing at least one vaporized organic material comprising at least one component from at least one source, wherein the vaporized organic material is capable of condensing in a vacuum of less than about 130 Pa; providing a plasma from at least one source other than the source of the vaporized organic material; directing the vaporized organic material and the plasma toward the substrate; and causing the vaporized organic material to condense and polymerize on the substrate in the presence of the plasma to form an organic coating.
    Type: Application
    Filed: January 12, 2001
    Publication date: May 31, 2001
    Applicant: Minnesota Mining and Manufacturing Company
    Inventors: Gunter A. Kohler, William H. Esswein, Seth M. Kirk, Brian J. Gates
  • Publication number: 20010002285
    Abstract: A surface treatment method wherein one or more active particle streams are generated and aimed at a surface to be treated so that the particle stream interacts therewith. The active particle stream consists of activated particles forming chemically active sites on the surface, and modifying particles occupying said sites. The energy of the activated particles is greater than the energy at break of the inhibited surface bonds of the surface, and lower than the radiative flaw formation energy on the surface. The strength of the particle stream at the treated surface is greater than a quantity N/t where N is the surface density of the inhibited bonds to be broken and t is the duration of exposure of any point on the treated surface to the stream. A device for carrying out the method is also provided.
    Type: Application
    Filed: May 13, 1998
    Publication date: May 31, 2001
    Inventors: PAVEL KOULIK, EVGENIA ZORINA
  • Publication number: 20010002286
    Abstract: A process for coating a moving length of sheet metal is disclosed that includes the steps of 1) cleaning the moving length of sheet metal to remove surface contaminants that may interfere with the coating adhering to the sheet metal; 2) applying an electron beam curable coating to the moving length of sheet metal; and, 3) exposing the coating on the moving length of sheet metal to an electron beam to cure the coating, the cleaning, coating and curing resulting in no emission of pollutants that need to be removed before the emission is released into the atmosphere.
    Type: Application
    Filed: October 13, 1999
    Publication date: May 31, 2001
    Inventor: WILLIAM V. MADIGAN
  • Publication number: 20010002287
    Abstract: A one-step rapid manufacturing process is used to create three dimensional prototyping parts. Material such as metal, ceramics and the like powder, and wire, and the like, is delivered to a laser beam-material interaction region where it is melted and deposited on a substrate. The melted and deposited material is placed on a XYZ workstation. Three dimensional parts are created by moving the XYZ workstation relative to the laser beam while simultaneously feeding powdered alloys, first in the XY and then in the Z plane. Beam shaping focussing optics can be used to tailor the intensity distribution of the laser beam to the requirements of the deposition layers, and can be used to create parts with desired mechanical or thermodynamic properties. Additional beam splitting and recombining optics can be used to allow powder to be fed at a perpendicular angle to the substrate.
    Type: Application
    Filed: December 7, 2000
    Publication date: May 31, 2001
    Applicant: University of Central Florida
    Inventors: Aravinda Kar, Srikanth Sankaranarayanan, Franz-Josef Kahlen
  • Publication number: 20010002288
    Abstract: Device for the surface treatment of a substrate (3) by an electrical discharge between two electrodes in a gas mixture liable to generate by-products (powders, for example) which may be deposited on the electrodes, in which device one (9) of the electrodes is a roller against which the substrate may be applied, means being provided for rotating the roller and the substrate and for injecting the gas mixture between the electrodes, the device being noteworthy in that the second electrode is a roller electrode (11) against which the running substrate may also be applied, this roller (11) being placed parallel to the other roller (9) with a suitable gap. By virtue of this arrangement, the substrate (3) protects each electrode (11) and prevents it from being covered with powder during the treatment, as well as preventing the corresponding contamination, thereby allowing the device to operate continuously.
    Type: Application
    Filed: November 5, 1998
    Publication date: May 31, 2001
    Inventors: ALAIN VILLERMET, FRANCOIS COEURET, PANAYOTIS COCOLIOS, BERND MARTENS, ECKHARD PRINZ, JURGEN SALGE
  • Publication number: 20010002289
    Abstract: Process for the at least partial, direct coating of an extensible backing material with a pressure-sensitive adhesive composition, the backing material being guided by a transporting apparatus against a coating apparatus in such a way that the latter applies the pressure-sensitive adhesive composition to the backing material, characterized in that there are adhesion devices or holding devices present on the transporting apparatus so that the properties of the backing are not altered in the course of coating.
    Type: Application
    Filed: December 4, 1998
    Publication date: May 31, 2001
    Inventors: PETER HIMMELSBACH, PETER JAUCHEN, KLAUS KEITE-TELGENBUSCHER, MATTHIAS LEHDER
  • Publication number: 20010002290
    Abstract: An allantoin-containing skin cream composition can comprise allantoin and at least one anionic or nonionic emulsifier that is substantially hydrophilic and is soluble in water. The pH of the composition is in a range of from about 3.0 to about 6.0; preferably, the pH of the composition is from about 5.0 to about 6.0. The composition can further comprise an acidic anionic polymer. A preferred acidic anionic polymer is a carboxypolymethylene polymer. The composition can further comprise a carbohydrate polymer such as galactoarabinan, polygalactose or polyarabinose. The composition can additionally comprise other ingredients such as herbal extracts, an antioxidant component, an emollient component, a chelator, a solvent component, or a preservative component. The composition is useful as a skin protectant.
    Type: Application
    Filed: January 11, 2001
    Publication date: May 31, 2001
    Inventor: Elliott Farber
  • Publication number: 20010002291
    Abstract: Glass containers having a coating of a plastics material over at least a portion of their exterior surface are disclosed. The coatings are duroplastic powder lacquer or acrylic resin lacquer applied by a process including the steps of heating the containers, moving them into a vessel containing a coating medium, allowing the coating to adhere, transferring the containers onto a conveyor and moving the containers through a setting zone. The containers have volumes ranging between 1 liter and 0.33 liters and the ratio V, which is defined as the ratio of the glass mass of a glass container coated in accordance with the aforementioned process to the glass mass of an uncoated glass container having the same filling volume and same filled product, ranging between 0.64 to 0.87.
    Type: Application
    Filed: December 13, 2000
    Publication date: May 31, 2001
    Inventors: Ulrich Buschmeier, Jurgen Bulow, Hilmar Schulze-Bergkamen
  • Publication number: 20010002292
    Abstract: A thin glaze layer 2 is formed on a relief surface 1R to a thickness which leaves recesses on the relief surface 1R. A glaze-repellent layer 4 capable of repelling the glaze slurry is then formed on the surface of the thin glaze layer 2 to form a coated substrate. The glaze slurry is affixed to the coated substrate for forming a glaze slurry layer 5 for completing the glazing.
    Type: Application
    Filed: December 26, 2000
    Publication date: May 31, 2001
    Inventors: Takagi Hiroshi, Yoshimi Mori, Kouichi Ueda, Norihito Sakamoto
  • Publication number: 20010002293
    Abstract: A method for making a surface covering is disclosed which includes providing a surface covering having a backing layer, a foamable layer, and a design layer, wherein the design layer includes a portion of a pattern printed with at least one retarder composition. A wear layer is then provided on the design layer and the wear layer is cured. The foamable layer is thereby expanded to form a foam layer, and the pattern printed with at least one retarder composition is chemically embossed. The cured product is subsequently cooled to ambient temperature and then the top surface of the wear layer is subjected to a sufficient temperature to soften the wear layer. After being softened the wear layer is mechanically embossed with a surface texture, the embossed surface texture is set in the wear layer, and a top coat may then be provided on the embossed set wear layer. A surface covering having the various features described above is also disclosed.
    Type: Application
    Filed: December 28, 2000
    Publication date: May 31, 2001
    Applicant: Mannington Mills of Delaware, Inc.
    Inventors: John M. Eby, Hao A. Chen, Alonzo M. Burns
  • Publication number: 20010002294
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 31, 2001
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Publication number: 20010002295
    Abstract: The invention relates to a glass substrate having on at least one of its faces an antireflection coating formed by a stack of thin dielectric material layers having alternately high and low refractive indices. To prevent the modification of the optical properties of the coating in the case where the substrate is subject to a heat treatment such as tempering, bending or annealing, the layer or layers of the stack which are liable to deteriorate on contact with alkali ions such as sodium ions are separated form the substrate by at least one layer forming part of the antireflection coating and forming a “shield” with respect to the diffusion of alkali.
    Type: Application
    Filed: January 22, 2001
    Publication date: May 31, 2001
    Inventors: Charles-Edward Anderson, Philippe Macquart
  • Publication number: 20010002296
    Abstract: An iron aluminide coating consists essentially of: 1 5-35% by weight aluminum 15-25% by weight chromium 0.5-10% by weight molybdenum, tungsten, tantalum and niobium 0-0.
    Type: Application
    Filed: December 14, 2000
    Publication date: May 31, 2001
    Inventors: Mohamed Nazmy, Markus Staubli
  • Publication number: 20010002297
    Abstract: A data carrier, such as a memory disk, is provided with a pyrotechnic layer which can be ignited to destroy the data on the carrier. The pyrotechnic layer has an inert lining and can be triggered by a conventional electrical ignitor. The layer is based on a thermite mixture having an excess reducing agent.
    Type: Application
    Filed: December 22, 2000
    Publication date: May 31, 2001
    Inventors: Philemon Schweizer, Carl Hug, Georgios Karametaxas, Jorg Kutzli, Markus Tobler
  • Publication number: 20010002298
    Abstract: The battery has two legs of equal voltage (expressed as Volts DC or VDC) and equal electrochemical capacity (expressed as Ampere-Hours or AH). Each leg has one or more hinged and electrically connected modules. Both legs are hinged to each other but are not electrically connected. The modules of the battery can be folded into four basic prismatic shapes and an infinite number of non-prismatic shapes. Each shape is basically two batteries because the equal voltage legs can be connected to the load equipment in electrical series or electrical parallel. An adapter can be connected to the battery to provide additional battery footprints.
    Type: Application
    Filed: January 11, 2001
    Publication date: May 31, 2001
    Inventors: Fee Chan Leung, Mary A. Hendrickson
  • Publication number: 20010002299
    Abstract: A gas injection method for treating an electrochemical fuel cell stack assembly, the fuel cell stack assembly being repeatedly injected with an oxidizing gas at critical locations along the fuel cell stack assembly so that the fuel supply and the oxidizing gas will chemically react to reduce at least one harmful contaminant within the fuel supply. The preferred gas injection method treats a fuel cell stack assembly to reduce the debilitating effects of extraneous carbon monoxide within the fuel supply and thus preserves the efficient operation of the fuel cell stack assembly.
    Type: Application
    Filed: January 25, 2001
    Publication date: May 31, 2001
    Inventor: Carl A. Reiser
  • Publication number: 20010002300
    Abstract: A cylindrical metal-air cell has a cylindrical housing, an axially extending cylindrical air cathode adjacent an interior surface of the housing, and a plurality of elongate plenums defined between the oxygen electrode and the interior surface of the housing. Isolating passageway are positioned between the ambient environment and each of the plenums, and an air moving device is operable to force air through the isolating passageways and into at least one of the plenums. The air moving device may be a micromachined blower controlled by a circuit integrated into the housing of the blower.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Applicant: AER Energy Resources, Inc.
    Inventors: Lawrence A. Tinker, R. Dennis Bentz
  • Publication number: 20010002301
    Abstract: Projection-exposure apparatus and methods are disclosed that exhibit increased throughput by providing improved schemes by which the reticle stage and wafer stage move to accomplish exposure. Portions of a die pattern on a “pattern original” (e.g., reticle) are sequentially illuminated by an energy beam (e.g., beam of electromagnetic radiation or charged particles). The energy beam passes through the pattern portions and forms a demagnified image on a substrate through a projection-optical system. While moving the pattern original and the substrate, the entire die pattern is sequentially illuminated according to an exposure order, and the die pattern is demagnifyingly transferred to the substrate on which the images of the illuminated pattern portions are stitched together. When transferring and exposing the die pattern to multiple locations on the substrate, the exposure order is reversed after exposing each die pattern.
    Type: Application
    Filed: March 9, 1999
    Publication date: May 31, 2001
    Inventor: KAZUAKI SUZUKI
  • Publication number: 20010002302
    Abstract: Disclosed are a phosphor pattern which comprises a calcination product of a phosphor pattern precursor containing
    Type: Application
    Filed: January 8, 2001
    Publication date: May 31, 2001
    Inventors: Naoki Kimura, Seiji Tai, Hiroyuki Tanaka, Takeshi Nojiri, Kazuya Satou, Yoshiyuki Horibe, Mariko Shimamura, Toranosuke Ashizawa, Eiji Fujita, Seikichi Tanno
  • Publication number: 20010002303
    Abstract: A method and apparatus for controlling the leveling table of a wafer stage is described. More generally, the invention includes control circuitry for controlling motion of a stage, where the stage is adapted to support a workpiece. The control circuitry measures position in a vicinity of the workpiece. Based upon the measured position, the control circuitry drives the stage toward a target position while accounting for nonlinear dynamics of the stage. The nonlinear dynamics may include inertia, in which case the control circuitry adaptively estimates the inertia of the stage. The nonlinear dynamics may also include tilt due to acceleration or deceleration of the stage, in which case the circuitry adaptively estimates the tilt of the stage. The stage may generally travel in a plane, and the circuitry measures position in a direction orthogonal to the plane. The circuitry may measure the position of the workpiece itself, or the position of an upper surface of the stage.
    Type: Application
    Filed: September 16, 1998
    Publication date: May 31, 2001
    Inventor: BAUSAN YUAN
  • Publication number: 20010002304
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Application
    Filed: January 24, 2001
    Publication date: May 31, 2001
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Publication number: 20010002305
    Abstract: The present invention provides a toner comprising a binding resin, a colorant, and an ester based wax having an iodine value of not more than 25 and a saponification value of 30 to 300 (for example, at least one selected from the group consisting of meadowfoam oil and derivatives thereof and jojoba oil and derivatives thereof) and a method for producing the same. The present invention also provides a toner comprising silica fine powder containing a component having a polydimethyl siloxane skeleton extracted by an organic solvent at a content of not more than 2.5 wt %, and a method for producing the same. This stabilizes the chargeability and flowability of the toner during long period use, and eliminates the filming on a photoconductive member or a transfer medium, Moreover, toner that provides good fixability, anti-offset properties, waste toner recycle properties, and transfer efficiency can be obtained with good reproducibility.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhito Yuasa, Noriaki Hirota, Masahisa Maeda
  • Publication number: 20010002306
    Abstract: There is provided a carrier, for an electrostatographic developer, comprising particles of a hard magnetic ferrite material as the core, the core having a coating of a polymer resin, said resin in turn having a coating of an organic conductive material. The organic conductive material can be a charge control agent and can be present in very small amounts. The developer compositions have no need for preconditioning since they have stable charging characteristics. Further, they exhibit low levels of “dusting”.
    Type: Application
    Filed: June 12, 1998
    Publication date: May 31, 2001
    Applicant: Dinesh Tyagi et al
    Inventors: DINESH TYAGI, DONNA A DIPRIMA, JAMES H ANDERSON
  • Publication number: 20010002307
    Abstract: A method of fabricating a contact window. On semiconductor substrate having a conductive region, a dielectric layer is formed to cover the substrate and the conductive region. A gettering layer is formed on the dielectric layer. A hard mask layer is formed on the gettering layer. The hard mask layer is patterned to expose a part of the gettering layer which is right on top of the conductive region. The exposed gettering layer and the dielectric layer under the exposed gettering layer are removed to form the contact window.
    Type: Application
    Filed: August 7, 1998
    Publication date: May 31, 2001
    Inventors: TZUNG-HAN LEE, LI-CHIEH CHAO, CHUN-TE CHEN
  • Publication number: 20010002308
    Abstract: A revolving drum containing a rolling element is provided that includes a member for the cleaning of the inner wall areas of the revolving drum which has at least two cleaning zones. The cleaning zones include projecting cleaning elements and lie in tandem in an axial direction of the revolving drum. They include a fastening apparatus disposed on a front end pointing toward the infeed side of the drum and include a revolving articulation by which the rolling element can be fastened to a non-revolving component of a head of the revolving drum. The cleaning zones comprise generated surfaces of the revolving drum which are at an angle to one another.
    Type: Application
    Filed: December 27, 2000
    Publication date: May 31, 2001
    Applicant: Veba Oel Technologie Und Automatisierung GmbH
    Inventors: Andreas Schleiffer, Peter Wenning
  • Publication number: 20010002309
    Abstract: A ligature for securing an orthodontic bracket to an orthodontic archwire is formed from nylon and comprises a thin, elongate member having sufficient tensile strength to withstand orthodontic forces. A locking member receives the ligature therethrough and prevents disengagement of the ligature from an orthodontic bracket and an orthodontic archwire following installation. In one embodiment the ligature has locking teeth at one end and a locking member at the other end for cooperation with the locking teeth to prevent disengagement of the ligature. In another embodiment the ligature has locking teeth at both ends which engage one another and a locking tube to prevent disengagement of the ligature. In another embodiment the locking member is initially open and is closable to secure the ligature therein, thereby preventing disengagement of the ligature from an orthodontic bracket and an orthodontic archwire following installation.
    Type: Application
    Filed: January 19, 2001
    Publication date: May 31, 2001
    Inventor: John W. Birkel
  • Publication number: 20010002310
    Abstract: A computer is used to create a plan for repositioning an orthodontic patient's teeth. The computer receives an initial digital data set representing the patient's teeth at their initial positions and a final digital data set representing the teeth at their final positions. The computer then uses the data sets to generate treatment paths along which teeth will move from the initial positions to the final positions.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 31, 2001
    Applicant: Align Technology, Inc.
    Inventors: Muhammad Chishti, Andrew Beers, Huafeng Wen, Phillips Alexander Benton
  • Publication number: 20010002311
    Abstract: A Treponema pallidum fused antigen in which at least two surface antigens of Treponema pallidum are fused and an assay for anti-Treponema pallidum antibodies, using the above Treponema pallidum fused antigen.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Applicant: FUJIREBIO INC.
    Inventors: Nobuyuki Ise, Takeya Hori, Katsuya Fujimura, Tetsuji Tanimoto, Masahisa Okada
  • Publication number: 20010002312
    Abstract: Disclosed is an improved process for using iron-oxidizing bacteria to reactivate the raffinate ferrous sulfate solution in chemical leach operations. The process uses a biological raffinate converter, or BRC, as a key feature of the process. The invention process provides enhanced efficiency and commercial utility over the best known biological process for converting raffinate ferrous sulfate. The resulting ferric sulfate then can be recycled back into the bioleaching process of, for example, copper from chalcocite.
    Type: Application
    Filed: January 16, 2001
    Publication date: May 31, 2001
    Inventors: James E. Sharp, Kevin L. Stuffle, Margaret L. Jensen
  • Publication number: 20010002313
    Abstract: Disclosed is a bioreactor apparatus having a bed of buoyant media pellets floating within a filtrate to be processed. The apparatus includes a tank having a peripheral wall for containing filtrate and a bed of media pellets. A central manifold is rotatably supported within the tank, the central manifold being mounted for rotation about a vertical axis and having a plurality of longitudinally spaced openings intermediate its ends, the openings adapted to eject filtrate in a generally horizontal direction and along a substantially vertical plane toward the wall of the tank. A thrust manifold, generally parallel to the axis of the central manifold has a plurality of longitudinally spaced openings intermediate its ends directed horizontally and generally perpendicularly to the plane. The thrust manifold is supported in association with the central manifold inwardly adjacent the tank wall and offset rearwardly of the plane to rotate with the central manifold.
    Type: Application
    Filed: January 16, 2001
    Publication date: May 31, 2001
    Inventor: James W.VanToever
  • Publication number: 20010002314
    Abstract: Probes and processes for their use for specific recognition and/or cleavage of double-stranded DNA or RNA at sequence specific desired loci through the intermediacy of a triple helix are disclosed. These probes may also be used as diagnostic chemotherapeutic agents through incorporation of a radiolabeled, fluorescing, or otherwise detectable molecule. Preferred assay conditions are also provided for recognition of homopurine-homopyrimidine double-helical tracts within large DNA by triple helix formation under physiological conditions. Hybridization probes for double-stranded recognition with binding site sizes that range >8 base pairs are also provided.
    Type: Application
    Filed: August 4, 1998
    Publication date: May 31, 2001
    Applicant: FLEHR HOHBACH TEST ALBRITTON & HERBERT LLP
    Inventors: PETER B. DERVAN, HEINZ E. MOSER
  • Publication number: 20010002315
    Abstract: A method and apparatus for interrogating a target having a plurality of plasmon resonant particles (PREs) distributed in the target are disclosed. In the method, a field containing the target is illuminated, and one or more spectral emission characteristics of the light-scattering particles in the field are detected. From this data, an image of positions and spectral characteristic values in the field is constructed, allowing PREs with a selected spectral signature to be discriminated from other light-scattering entities, to provide information about the field. Also disclosed are a novel PRE composition for use in practicing the method, and a variety of diagnostic applications of the method.
    Type: Application
    Filed: December 18, 2000
    Publication date: May 31, 2001
    Applicant: The Regents of the University of California
    Inventors: Sheldon Schultz, David A. Schultz, David R. Smith, Jack J. Mock, Thomas J. Silva
  • Publication number: 20010002316
    Abstract: Disclosed are an optical flow particle apparatus and method for conducting a particle light scatter-based immunoassay for simultaneously measuring the presence or amount of one or more analytes in a fluid sample, which involves the steps of:
    Type: Application
    Filed: December 28, 2000
    Publication date: May 31, 2001
    Inventors: W. Peter Hansen, Michael Cennerazzo, Carl Theodore Edens, Manish Kochar
  • Publication number: 20010002317
    Abstract: In one aspect, the invention includes a method of forming a material comprising tungsten and nitrogen, comprising: a) providing a substrate; b) depositing a layer comprising tungsten and nitrogen over the substrate; and c) in a separate step from the depositing, exposing the layer comprising tungsten and nitrogen to a nitrogen-containing plasma. In another aspect, the invention includes a method of forming a capacitor, comprising: a) forming a first electrical node; b) forming a dielectric layer over the first electrical node; c) forming a second electrical node; and d) providing a layer comprising tungsten and nitrogen between the dielectric layer and one of the electrical nodes, the providing comprising; i) depositing a layer comprising tungsten and nitrogen; and ii) in a separate step from the depositing, exposing the layer comprising tungsten and nitrogen to a nitrogen-containing plasma.
    Type: Application
    Filed: December 29, 2000
    Publication date: May 31, 2001
    Inventors: Vishnu K. Agarwal, Gurtej S. Sandhu
  • Publication number: 20010002318
    Abstract: A method for manufacturing a power bus on a chip, where the power bus has slits generated therein. The present invention relates to a method to manufacture a power bus in which the reference to a layout data base shows the coordinate location of the power buses in the chip. A height and width for the power bus is calculated based on its coordinates. Based on the height and width of the power buses and the predetermined size and spacing between power slits, a number of power slits to be generated is determined. These power slits are then generated by adding the power slits to the power bus in the coordinates of the layout database. The method of the present invention also generates power slits for use in manufacturing power buses on a chip for cases in which the power buses overlap.
    Type: Application
    Filed: January 12, 2001
    Publication date: May 31, 2001
    Inventors: Chong M. Lin, Tatao Chuang, Tran Long, Hy Hoang
  • Publication number: 20010002319
    Abstract: A method for producing a thermoelectric semiconductor includes an ingot production step for producing an ingot of a thermoelectric semiconductor and an integrating step for integrating a plurality of the ingots by plastic deforming the ingots to produce an integrated ingot of the thermoelectric semiconductor. The large size of the thermoelectric semiconductor ingot having uniform performance and mechanical strength can be produced by integration of two or more ingots. Therefore, many wafers can be produce at one time in the slicing step, and productivity is improved. Further, two or more ingots are integrated by plastic deformation so that the connecting strength of the connecting interface is strong.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Inventors: Hitoshi Tauchi, Satoru Hori, Hirotsugu Sugiura, Hiroyasu Kojima
  • Publication number: 20010002320
    Abstract: This invention provides an extended lead package and method of forming the extended lead package for electronic circuit packages. A lead frame having extended leads is used. The extended leads extend under the bottom side of an integrated circuit element or chip. The bottom side of the chip is attached to the extended leads using bonding material which is a thermal conductor and an electrical insulator. Electrical connections between the chip input/output pads and the leads are provided by wire bonds using standard wire bonding techniques. The bonding material can be a tape having adhesive on one or both sides which attaches the chip to the lead frame using mechanical pressure, and/or other means such as curing or the addition of heat. Thermal energy is removed from the package by the thermal conduction path provided by the bonding material. The completed assembly can be encapsulated using standard methods.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Applicant: ST ASSEMBLY TEST SERVICES PTE LTD
    Inventors: Tonglong Zhang, John Briar
  • Publication number: 20010002321
    Abstract: A package substrate suitable for use with a ball grid array according to the invention includes an electrically and thermally conductive heat sink having a top surface and a bottom surface, the heat sink having a slot formed therethrough which opens onto the top and bottom surfaces. A dielectric layer is formed on the bottom surface of the heat sink proximate the slot, preferably directly thereon without an intervening adhesive layer. A circuit is selectively formed in a circuit pattern on the dielectric layer. An electrically resistive soldermask is disposed on the dielectric layer and the circuit, which soldermask has openings therethrough which expose bond pads of the circuit. Such a substrate according to the invention permits the integrated circuit die to be mounted over the slot in the manner of a lead-on-chip package, but provides bond pads to which solder balls can be mounted in order to form a ball grid array.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Inventor: Abram M. Castro
  • Publication number: 20010002322
    Abstract: A metal silicide fuse for a semiconductor device. The fuse includes a conductive region positioned adjacent a common well of a first conductivity type, a terminal region positioned adjacent a well of a second conductivity type, and a narrowed region located between the terminal region and the conductive region and positioned adjacent a boundary between the two wells. Upon applying at least a programming current to the fuse, the fuse “blows” at the narrowed region. The diode or diodes between wells of different conductivity types wells and the Schottky diode or diodes between the remaining portions of the fuse and wells adjacent thereto control the flow of current through the remainder of the fuse and through the associated wells of the semiconductor device. When the fuse has been “blown”, the diodes and Schottky diodes prevent current of a normal operating voltage from flowing through the wells of the semiconductor device.
    Type: Application
    Filed: January 12, 2001
    Publication date: May 31, 2001
    Inventors: Kenneth W. Marr, Michael P. Violette
  • Publication number: 20010002323
    Abstract: This invention pertains to a method for forming thin films on substrates wherein the films are produced by applying a solution of an electrically insulating, heat-curing resin onto the substrate, evaporating the solvent and exposing the resin to high energy radiation to cure the resin. The resin solution contains a substance selected from solvents and gas generating additives that causes the dedensification of the film during the cure of the resin. This results in a film having a dielectric constant of below 2.7. This invention also pertains to a semiconductor device having an interconnect structure comprising at least one electrically conductive layer with an interposed insulating layer having a dielectric constant of less than 2.7 wherein the insulating layer is produced by the method of this invention.
    Type: Application
    Filed: December 19, 2000
    Publication date: May 31, 2001
    Inventors: Akihiko Kobayashi, Katsutoshi Mine, Takashi Nakamura, Motoshi Sasaki, Kiyotaka Sawa
  • Publication number: 20010002324
    Abstract: A method has been provided to form a sheet of large grain crystallized silicon, in an early stage of transistor production, before the areas of the source and drain are defined. The method takes advantage of high annealing temperatures and transition metals to speed the lateral growth of silicide. By using higher temperatures, the number of amorphous enclaves is minimized and the transition metal nucleation site can be made small. A small transition metal nucleation site, in turn, can be more easily located near the center of a transistor, or where it is convenient. After annealing, the areas close to the silicide nucleation site are transformed into polycrystalline with a high electron mobility, desirable for the formation of source/drain and channel regions. Silicide products, away from the transistor active areas, are etched away when the area of the source and drain are defined. A product by process using the method of the above-described invention is also provided.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Inventors: Masashi Maekawa, Yukihiko Nakata
  • Publication number: 20010002325
    Abstract: On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 31, 2001
    Inventors: Nobuhiko Oda, Shiro Nakanishi, Shinji Yuda, Tsutomu Yamada
  • Publication number: 20010002326
    Abstract: A nitridization process to form a barrier layer on a substrate is described. The nitridization process includes depositing a layer of metal or metal silicide on a surface of the substrate, placing the substrate into a high density, low pressure plasma reactor, introducing into the high density, low pressure plasma reactor a gas including nitrogen, and striking a plasma in the high density, low pressure plasma reactor under conditions that promote nitridization of at least a portion of the layer of metal or metal silicide to produce a composition of metal nitride or metal silicon nitride, respectively.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Inventors: Yun-Yen Jack Yang, Ching-Hwa Chen, Yea-Jer Arthur Chen
  • Publication number: 20010002327
    Abstract: A power MOS device that has increased channel width comprises a semiconductor substrate and a doped upper layer of a first conduction type disposed on the substrate. The upper layer comprises a plurality of doped well regions of a second, opposite conduction type and a plurality of heavily doped source regions of the first conduction type at an etched upper surface of the upper layer that comprises parallel corrugations disposed transversely to the source regions. A gate that separates one source region from another comprises an insulating layer and a conductive material. The corrugations provide an increase in width of a channel underlying the gate and the well and source regions.
    Type: Application
    Filed: January 18, 2001
    Publication date: May 31, 2001
    Applicant: HARRIS CORPORATION
    Inventors: Dexter Elson Semple, Jun Zeng
  • Publication number: 20010002328
    Abstract: In a fabrication process, photoresist is disposed over a semiconductor substrate (10), covering a front surface (11) of the substrate (10) and filling trenches (12, 14, 16, 18) therein. The photoresist is planarized in chemical mechanical polishing to achieve a uniform thickness throughout the substrate (10). An anisotropic etching process partially removes the photoresist in the trenches (12, 14, 16, 18), thereby creating recesses in the trenches (12, 14, 16, 18). Because the thickness of the photoresist is uniform throughout the substrate (10) before the etching process, the depths of the recesses in different trenches (12, 14, 16, 18) are substantially equal to each other. A uniform recess depth throughout the substrate (10) is thereby achieved. The uniform recess depth facilitates in ensuring the semiconductor devices fabricated on the substrate (10) to have consistent parameters, characteristics, and performances.
    Type: Application
    Filed: June 28, 1999
    Publication date: May 31, 2001
    Inventors: GARY J. BEARDSLEY, ZHONG X. HE, CUC K. HUYNH, MICHAEL P. MCMAHON
  • Publication number: 20010002329
    Abstract: The present invention discloses a wafer which includes a semiconductor substrate having a top surface and a device layer disposed near the top surface for fabrication of integrated circuits (ICs) therein. The wafer also includes an insulating layer beneath the device layer for insulating the device layer with the ICs to be fabricated therein. The wafer further includes a doped region in the substrate. The doped region may be a layer beneath the insulating layer. The doped region is a region of sufficient volume whereby the doped region may be used as a charge sink for protecting the IC devices to be fabricated on the device layer from being damaged by the electric static discharge (ESD) and electric over stress (EOS). Furthermore, the doped region is a region of sufficient dopant concentration whereby the doped region may be used as an electrical connecting means for the IC devices to be fabricated in the device layer such that the doped region becomes a part of integration of the IC devices.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Applicant: Advanced Materials Engineering Research, Inc.
    Inventor: Peiching Ling
  • Publication number: 20010002330
    Abstract: An integrated circuit assembly has pads of a chip electrically connected to pads of a substrate with rolling metal balls. A pliable material bonds the balls in movable contact with pads of the chip and substrate. Because the balls are relatively free to move, thermal expansion differences that would ordinarily cause enormous stresses in the attached joints of the prior art, simply cause rolling of the balls of the present invention, avoiding thermal stress altogether. Reliability of the connections is substantially improved as compared with C4 solder bumps, and chips can be safely directly mounted to such substrates as PC boards, despite substantial thermal mismatch.
    Type: Application
    Filed: January 23, 2001
    Publication date: May 31, 2001
    Inventors: Joseph A. Benenati, Claude L. Bertin, William T. Chen, Thomas E. Dinan, Wayne F. Ellis, Wayne J. Howell, John U. Knickerbocker, Mark V. Pierson, William R. Tonti, Jerzy M. Zalesinski
  • Publication number: 20010002331
    Abstract: A method for fabricating dual-damascene structure based on the double-layered mask process, in which the etching mask is successfully prevented from being recessed thereby to improve the process accuracy is provided. The method is such that for fabricating multi-layered wiring in which a wiring groove 22 for forming a wiring and a connection hole 21 for forming a plug for connecting such wiring filled in such wiring groove 22 and another wiring provided in the lower layer of such wiring are formed to a first and second interlayer insulating films 12, 14 using a first mask 15 and a second mask 16 provided in the upper layer of such first mask 15, wherein an opening 17 is formed to the second mask 16, and on the lateral wall of such opening 17 a sidewall 19 made of a material, which is higher in etching resistance than the second mask 16, is formed.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 31, 2001
    Applicant: Sony Corporation
    Inventor: Koji Miyata
  • Publication number: 20010002332
    Abstract: A mask (10) includes a pattern (14) having a plurality of substantially rectangular shapes (20) arranged longitudinally in each of a plurality of substantially parallel rows (22). The rows (22) are evenly spaced apart from each other. The substantially rectangular shapes (20) in each row (22) are evenly spaced apart from each other and offset from the substantially rectangular shapes (20) in neighboring rows (22). The substantially rectangular shapes (20) define a plurality of T-shapes (24) connected to and offset from each other.
    Type: Application
    Filed: January 4, 2001
    Publication date: May 31, 2001
    Inventors: Michael P. Keleher, Jeffrey A. McKee, Troy H. Herndon, Jing-Shing Shu