Abstract: The present invention relates to a valve member for a valve of the ball valve type, including two shell parts rigidly joined together to form a valve member and generally snap-fitted over a frame. The two shells have opposed sealing surfaces and a flow passage extends through the shells and the frame. The valve member includes a means for engagement of a drive mechanism to enable rotation of the valve assembly, wherein said valve member can be rotated to present a sealing surface or alternatively rotated to present a flow path to a water supply when said valve member is located in a sealed fluid passage such as a pipe.

Abstract: An improved process for producing optical materials with minimized yellowing is described. The process is characterized by polymerizing/curing a composition for optical materials after adding a bluing agent. With the use of the bluing agent, the yellowing is minimized even when a large amount of an ultraviolet light absorber is used to improve a light resistance of the resultant optical material, thereby enabling the production of optical materials having a colorless and transparent appearance and excellent optical properties.

Abstract: An axial support of a winding drum, i.e. a support in the direction of the longitudinal axis of the winding drum, in a hoisting apparatus comprising a frame, a grooved winding drum supported substantially perpendicular to its longitudinal axis against the frame by bearings, a hoisting rope and machinery. The winding drum comprises at least one axial support element and the frame comprises at least another axial support element, and at least either the axial support element of the winding drum or the axial support element of the frame substantially extends round the circumference of the winding drum. The axial support element of the winding drum and the axial support element of the frame are arranged in respect of each other such that the movement of the winding drum in the direction of its longitudinal axis, which is caused by the axial component of the rope force of the hoisting rope, is hindered at least in one direction.

Abstract: The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control circuit disables an operation of the memory core corresponding to the command control signal when the mask signal is activated. Illegal commands are decided by the mask circuit alone. On this account, the control circuit need not be provided with a circuit for individually determining commands as illegal in accordance with actual operating states. Therefore, using the mask circuit makes it possible to prevent malfunctions resulting from illegal commands with facility and reliability. The intrinsic functions of the control circuit have only to be verified at the time of design and circuit modifications, which results in improving design efficiency.

Abstract: A semiconductor memory device that performs a flash write operation without increasing the circuit area. Column selection lines CL0-CL7 extend parallel to word lines at locations corresponding to where column gates are formed. During a flash write mode, the subcolumn decoder 14 simultaneously selects the column selection lines. This writes cell information to every memory cell connected to the selected word line.

Abstract: A semiconductor memory device, such as a SDRAM operating in a multi-bit prefetch mode, having reduced on chip noise associated with the switching of signal lines is disclosed. According to one embodiment, the semiconductor memory device may include first and second memory cell segments (201 and 202). A first Y-address buffer decoder 100-1 can be connected to the first memory cell segment 201 and a second Y-address buffer decoder 100-2 can be connected to the second memory cell segment 202. The first Y-address decoder 100-1 receives a Y-address and a first latch signal CLK1. The second Y-address decoder 100-2 receives a Y-address and a second latch signal CLK2. A clock generating circuit 400 receives an external clock signal CLK and synchronously generates the first and second latch signals (CLK1 and CLK2).

Abstract: An improved semiconductor chip package capable of independently aligning with testing equipment during the manufacturing phase of electrical testing. Independent alignment is realized by directly connecting the semiconductor chip package to the test alignment apparatus by fitting together two substantially conforming surfaces, one on the chip package and one on the alignment apparatus. The conforming surfaces are arranged so that only one matable position is achievable. The substantially conforming surfaces can equate to three substantially conical indentations on the chip package and three substantially conical protrusions or protuberances of substantially conforming size and depth extending from the alignment apparatus.

Abstract: A BICMOS integrated circuit is formed with CMOS transistors on an SOI substrate in a silicon layer having a standard thickness of 0.1 &mgr;m to 0.2 &mgr;m and with Bipolar SiGe transistors formed in an epitaxial layer nominally 0.5 &mgr;m thick. The CMOS transistors are formed first with standard processing, then covered with an insulating film. The insulating film is stripped in the bipolar areas and an epitaxial SiGe layer is deposited on the Si substrate. The bipolar transistors are formed using the SiGe epi layer for the base and having an encapsulated structure for device isolation using shallow isolation trenches and the buried oxide.

Abstract: The method for producing a semiconductor of the present invention grows a compound semiconductor on a substrate held by a susceptor provided, in a reaction chamber in accordance with a metalorganic vapor phase epitaxy technique. The method includes the steps of: supplying a Group III source gas containing indium and a Group V source gas containing nitrogen into the reaction chamber; and mixing the Group III and Group V source gases, supplied into the reaction chamber, with each other, and supplying a rare gas as a carrier gas into the reaction chamber so as to carry the mixed source gas onto the upper surface of the substrate.

Abstract: An n-channel type MIS field effect transistor is fabricated on a p-type well defined in a standard p-type silicon substrate, and is expected to respond to a high- frequency signal, wherein a heavily- doped p-type well contact region is formed outside of the p-type well for increasing the substrate resistance, and a capacitor is coupled to the heavily-doped p-type well contact region for increasing the impedance so that the insertion loss is reduced by virtue of the large impedance of the silicon substrate.

Abstract: The invention concerns a photodetector for detecting electromagnetic waves, especially in the UV range, and a method of forming it. The photodetector has at least one substrate layer consisting essentially of silicon. The substrate layer has a surface that is (1) at least partially covered with a cover layer transparent to electromagnetic waves and (2) covered by a cover layer surface. The cover layer has an essentially saw-tooth, trapezoidal and/or V-shaped in a cross-sectional cut through the substrate layer and the cover layer thickness is inhomogeneous.

Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.

Abstract: A DRAM device with increased surface area includes a pair of storage nodes arranged in a square configuration, and the square configurations are repeatedly arranged to form matrix cell array region. One of the storage node exhibits an “L” shaped pole and the other storage node exhibits a “reverse L” shaped pole. The “reverse L” shaped pole is rotated 180 degrees from the “L” shaped pole, thereby collectively forming a square configuration as viewed from a top plan view.

Abstract: Semiconductor memory and a method for fabricating the same, in which sides of a floating gate is formed to have a streamlined profile, for improving a device performance, the semiconductor memory including a semiconductor substrate, a plurality of field oxide films formed at fixed intervals in one direction for isolating an active region between adjacent field oxide films, a plurality of control gates formed at fixed intervals in a second direction perpendicular to the field oxide films, a plurality of floating gates respectively formed under the control gates spaced a distance from each other each having edge portions in the second direction with moderate slopes, an interlayer insulating layer formed at interfaces between the floating gate and the control gate, and source/drain formed in surfaces of a semiconductor substrate on both sides of the control gate.

Abstract: A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film is composed of a first portion disposed on a side wall portion of the trench and a second portion disposed on upper and bottom portions of the trench. The first portion is composed of a first oxide film, a nitride film, and a second oxide film. The second portion is composed of only an oxide film and has a thickness thicker than that of the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be mitigated, and a decrease in withstand voltage at that portions can be prevented.

Abstract: A process for making a SOI region and a bulk region in a semiconductor device. The process includes providing a SOI structure. The SOI structure has a thin silicon layer, a buried insulating oxide layer underlying the thin silicon layer, and a silicon substrate underlying the buried insulating oxide layer. Next, a nitride layer is deposited on top of the SOI structure. The SOI structure is exposed by selectively etching portions of the nitride layer. The portion of the nitride layer which is not etched forms the SOI region. The silicon substrate is exposed by selectively etching the remaining portion of the exposed SOI structure. An epitaxial layer is grown on top of the exposed silicon substrate to form the bulk region. The nitride portion above the SOI structure is finally removed.

Abstract: This invention provides a MIS transistor with less electrical short between a gate and source/drain electrodes. A sidewall spacer 15 has a two-layer structure including a buffer layer 13 which consists of nitrided oxide silicon and a silicon nitrided layer 14 formed on the buffer layer 13. The sidewall spacer 15 serves as a mask to form a silicide film 10.

Abstract: A CMOS transistor is provided having a relatively high breakdown voltage. The CMOS transistor includes an N-type epitaxial layer on a P-type substrate. Between the substrate and epitaxial layer are a heavily doped N-type buried layer and a heavily doped P-type base layer. An N-type sink region is proximate the edge of the NMOS region, and twin wells are in the area surrounded with the sink region. N+ source and drain regions are formed in respective wells. As the sink region is interposed between the drain and isolation regions, a breakdown occurs between the sink and isolation regions when a high voltage is applied. Twin wells are also formed in the PMOS region P+ source and drain regions are formed in respective wells. As the N-type well surrounds the source and bulk regions, a breakdown occurs between a buried region and the isolation region when a high voltage is applied.

Abstract: This invention provides a photovoltaic semiconductor device of high efficiency capable of maintaining good interface characteristics of an amorphous semiconductor layer and a transparent electrode by eliminating damage caused by plasma of a plasma doping layer formed by doping impurity to the i-type amorphous semiconductor layer. The i-type amorphous semiconductor layer substantially not containing impurity for reducing electric resistance on a textured surface of an n-type single crystalline substrate. Then, the plasma doping layer is formed by exposing the n-type single crystalline substrate with the amorphous semiconductor layer formed thereon in an atmosphere of excited gas containing p-type impurity and diffusing the impurity to the amorphous semiconductor layer. A p-type amorphous semiconductor thin film layer containing p-type impurity is formed on the plasma doping layer by chemical vapor deposition and a transparent electrode 5 is formed on the p-type amorphous semiconductor thin film.

Abstract: A semiconductor device comprising an integrated circuit and an information unit, said unit being electrically separate from said integrated circuit; an integrated antenna electrically connected with said unit; and an electronic data bank integral with said unit. A method of fabricating an information unit into an integrated circuit chip comprising forming an integrated circuit into a semiconductor substrate using a plurality of process steps; concurrently forming an information unit using a selection of said process steps so that said unit becomes integrated into said chip but remains electrically separate from said integrated circuit; concurrently forming an antenna using a selection of said process steps so that said antenna becomes integrated into said chip and electrically connected to said information unit; providing a data bank within said information unit; and encoding electronic data permanently into said data bank.

Abstract: On the surface of a field oxide film (3 of FIG. 2e) formed on a substrate region where the effective thickness in the vertical direction of a substrate is diminished due to the presence of a crystal defect (2 of FIG. 1a), the field oxide film is etched by a predetermined thickness until a recess (4 of FIG. 2f) ascribable to the presence of the defect is exposed (step of FIG. 2f). A new oxide film then is formed in an amount corresponding to the above-mentioned thickness on the field oxide film (step of FIG. 3g) to diminish the depth of the recess ascribable to the presence of the defect. To provide a semiconductor device in which leakage between elements can be eliminated with a thin LOCOS oxide film thickness remaining unchanged.

Abstract: A method of manufacturing a semiconductor device simultaneously forms a first vertical bipolar transistor which operates at a relatively low speed and is of a high withstand voltage and a low power requirement and a second vertical bipolar transistor which operates at a relatively high speed and is of a high power requirement. The method comprises the steps of forming openings for selectively forming single crystal base regions respectively in the vertical bipolar transistors, forming single crystal base regions via the openings, forming an insulating film on a device forming surface of a semiconductor substrate after the base regions are formed, and introducing ions of an impurity of the same conductivity type as a collection region via the insulating film. The opening in the second vertical bipolar transistor is of a size greater than the opening in the first vertical bipolar transistor.

Abstract: An underlying gallium nitride layer on a silicon carbide substrate is masked with a mask that includes an array of openings therein, and the underlying gallium nitride layer is etched through the array of openings to define posts in the underlying gallium nitride layer and trenches therebetween. The posts each include a sidewall and a top having the mask thereon. The sidewalls of the posts are laterally grown into the trenches to thereby form a gallium nitride semiconductor layer. During this lateral growth, the mask prevents nucleation and vertical growth from the tops of the posts. Accordingly, growth proceeds laterally into the trenches, suspended from the sidewalls of the posts. The sidewalls of the posts may be laterally grown into the trenches until the laterally grown sidewalls coalesce in the trenches to thereby form a gallium nitride semiconductor layer.

Abstract: A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.

Abstract: A semiconductor device according to the invention of the present application comprises a substrate having a surface on which interconnections are formed, a semiconductor element connected to the interconnections and mounted on the substrate, and a conductive map for covering the semiconductor element electrically connected to a ground potential. Owing to the provision of the conductive cap for covering the semiconductor element in this way, the semiconductor device can prevent the emission of an electromagnetic wave to the outside and can be prevented from malfunctioning due to an external electromagnetic wave.

Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the “Lead-On-Chip” or “Chip-On-Lead” structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

Abstract: A semiconductor apparatus includes a thin film belt-like insulating tape having a plurality of predetermined wire patterns thereon, and a plurality of IC chips that are provided on a surface of the insulating tape at uniform spaces in a lengthwise direction and electrically connected with the wire patterns, and further includes thick film reinforcing tapes with sprocket holes for transport use provided at uniform spaces, the reinforcing tapes being provided on both side portions of the insulating tape, in the lengthwise direction.

Abstract: A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.

Abstract: A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.

Abstract: A laminate-type semiconductor apparatus utilizing a flexible substrate being mounted with a plurality of semiconductor devices, in which the laminate-type semiconductor apparatus is free from incurring heat-radiation problem and has a fully leveled connection parts with sufficiently durable strength whereby distinctively compatible with high-density mounting thereof. More particularly, the present invention provides a laminate-type semiconductor apparatus which comprises a foldable flexible substrate mounted with a plurality of laminated semiconductor devices thereon, in which the foldable flexible substrate is folded so that plurality of semiconductor-device mounting areas of the substrate are mutually superposed whereby forming a laminate structure of semiconductor-device mounting areas thereon. An externally connected terminal disposing area disposed with a plurality of externally connected terminals is formed on one surface thereof.

Abstract: A method for fabricating an integrated circuit chip includes the steps of:

Abstract: A method for fabricating an integrated circuit chip includes the steps of:

Abstract: An interconnection substrate comprises an uppermost interconnection layer having a plurality of terminal pads located at positions corresponding to a plurality of solder bumps (external connection terminals) provided on a semiconductor element which is to be mounted on the interconnection substrate. The interconnection substrate also has a metal column formed on each of the terminal pads and has a resin film covering a side surface of the metal column. The interconnection substrate further has an insulating layer formed on the uppermost interconnection layer so that a gap is formed between the insulating layer and an outer peripheral surface of the resin film.

Abstract: The present invention relates to a bump formation method, comprising the steps of providing a mask, in which a plurality of openings have been formed corresponding to a plurality of electrode pads, to a substrate provided with this plurality of electrode pads, filling the openings with a solder paste, and heat treating the solder paste. The solder paste contains a solder powder. This solder powder is one that contains no more than 10 wt % particles whose diameter is greater than the thickness of the mask and no more than 1.5 times this thickness. Preferably, this solder powder is one that contains no more than 10 wt % particles whose diameter is greater than 40% of the diameter of the openings, or one that contains no more than 30 wt % particles whose diameter is 40 to 100% the thickness of the mask.

Abstract: The present invention provides a semiconductor device which can prevent the oxidization of the surfaces of pad electrodes to enhance the connecting strength between the pad electrodes and external terminals. The semiconductor device according to the present invention comprises pad electrodes for use in connecting external electrodes and a multilayer wiring structure connected to the pad electrodes, wherein one surface of an insulating layer covering the pad electrodes and having openings over the pad electrodes for exposing the surfaces of the pad electrodes is in contact with a metal layer formed from one selected from precious metals and alloys containing the precious metals as main components.

Abstract: A method and apparatus for connecting wiring patterns of an integrated circuit device. A wiring pattern of a semiconductor integrated circuit includes a first line for conducting a first potential and a second line for conducting a second potential. The method detects a portion of a distal end of the first line that overlaps a distal end of the second line and generates an avoidance pattern by eliminating the overlapping portion from the first line.

Abstract: A semiconductor device package includes multiple built-up layers of metal sandwiching non-conductive layers. The metal layers have grids of degassing holes arranged in rows and columns. The rows and columns are locatable via a first coordinate system. Signal traces are embedded within the non-conductive layers such that the signal traces are also sandwiched between the metal layers with degassing holes. The signal traces generally run at zero degrees, 45 degrees, and 90 degrees relative to a second coordinate system. The first coordinate system is rotated relative to the second coordinate system to lower impedance variations of different traces. Impedance variations decrease due to the decreased variation in the number of degassing holes passed over or under by a trace. The grid of degassing holes on one metal layer can be offset in two dimensions relative to the degassing holes on another layer.

Abstract: A mold assembly for forming an ophthalmic lens, or a lens blank from which one ophthalmic lens is produced by effecting a cutting operation on at least one of a front surface and a back surface of the lens blank, the mold assembly consisting of a first mold having a molding surface and a second mold having a molding surface, which first and second molds are assembled together so as to define therebetween a mold cavity having a profile corresponding to that of the ophthalmic lens or the lens blank, the mold cavity being filled with a polymeric material which is polymerized to form the ophthalmic lens or the lens blank, wherein at least one of the first and second molds is a layered mold which is constituted by a composite sheet comprising a metal sheet layer and at least one resin layer which are laminated on each other, the at least one resin layer of the composite sheet providing the molding surface of the layered mold which partially defines the mold cavity.

Abstract: A method of molding a plastic shell having an outer pliable skin layer and a foam backing layer comprises casting a first skin layer portion from wear resistant material in a first casting sequence for those areas of the panel susceptible to high wear and in a second casting sequence casting self-skinning foamable material against the remaining portion of the mold surface and over the first-cast skin layer portion to develop, simultaneously, the remaining outer skin layer portion of the shell and a foam backing layer which extends across the entire skin layer.

Abstract: The present invention relates to the step of plasticizing a thermoplastic resin material by rotatably driving a screw (20). Also included in the method is the step of injecting an inert gas into a screw cylinder (1) to permeate the melted resin and injecting the melted resin into a mold by driving the screw (20) in the direction of injection. Here, the inert gas has a pressure, at least in pressure, equal to or greater than a supercritical pressure or is under a supercritical state. To provide a thermoplastic resin foam by the method, electric servomotors (31, 32) are employed to drive the screw (20). After the step of plasticizing the resin material has been completed, brakes are applied to the electric servomotors (31, 32) to prevent the screw (20) from retreating. Alternatively, even after the step of plasticizing the resin material has been completed, the screw (20) is driven at low speeds in the direction of plasticization until immediately before the step of injecting the melted resin is initiated.

Abstract: A method and system for molding a tissue or substitute tissue product in a mold having an exterior surface, and an interior surface, wherein at least one portion of the interior surface is porous and whose pores are in continuous communication with the exterior surface, and wherein said mold can be fabricated using solid free-form fabrication techniques is disclosed.

Abstract: [pre-glass agglomeration] A method of making a fragrance delivery system comprising forming fused microspheres and incorporating a fragrance therein. The method relates to the mixing together of two separate factions comprising a silicate part and a modifier part, drying the mixture, heating the mixture to form an agglomeration, removing any free-flowing spheres from the agglomeration, soaking the agglomeration in fragrances or essential oils, and then drying the agglomeration. [incorporated therein. The preglass agglomeration has an extended fragrance release time exceeding a year and a half, and uses microcapillary action to quickly uptake oils and alcohols. The pre-glass agglomeration provides a slow release of fragrance without the escape of any residual liquid. The pre-glass agglomeration may be replenished, an unlimited number of times, with fragrance containing oils and alcohols after the odor fades. The pre-glass agglomerations can be molded and may be colored or dyed.

Abstract: A prefabricated insulated wall panel for building a wall. The wall panel includes one or more outer planar portions, a plurality of rib portions integral therewith and normal thereto and between which insulation is received, a strip of insulation attached to the inner edge of each rib portion for reducing thermal conductivity from the respective rib portion to wallboard attached to the wall panel, and a wallboard nailer strip which extends about the sides of the strip of insulation and has edge portions which are anchored in the respective rib portion. In accordance with one aspect of the invention, the nailer edge portions are insulated from the respective rib portion to limit thermal conductivity from the respective rib portion to the nailer. In accordance with another aspect of the invention, a pair of planar portions extend at an angle relative to each other so that the panel serves as a corner wall panel.

Abstract: A method for molding a layer around a body. The method includes injection molding uncured layer material around a first portion of the body to surround the first portion while leaving a second portion of the body free from layer material. Additional layer material is injection molded around the second portion of the body to contact the layer material around the first portion. The layer material is then compression molded around the body and cured.

Abstract: In a method for manufacturing an air passage switching door with a seal member extending along an outer peripheral portion of a door body, when a melted elastic material for forming the seal member is injected into a mold space from plural injection gates, a flow length of the melted elastic material is set to be equal or smaller than 40 mm. Accordingly, even when the method is used for forming the air passage switching door where a length of one side seal member extending along the outer peripheral portion at one side of a rotation shaft is equal to or larger than 100 mm and a thickness of the seal member is equal to or smaller than 2.0 mm, a deformation of the seal member due to an inner shrinking force can be sufficiently restricted.

Abstract: A composite article including a hollow form filled with a mixture of thermoplastic, a thermoset including ground whole tire waste and a processing aid. Also disclosed is a process for extruding a mixture of thermoplastic, thermoset including ground whole tire waste and a processing aid, in which the mixture is extruded through a die into a hollow form to form a filled article.

Abstract: A fixture for disposing laser blocking material on the interior of an airfoil is disclosed. Various construction details are developed which allow for the repetitive disposition of the laser blocking material in one airfoil after another. In one embodiment, the fixture includes a tool member and a nozzle adaptor for providing a sealing surface to a nozzle which extends into the tool member.

Abstract: Provided is a resin guiding device for an inflation molding apparatus, which guides a molten resin extruded and blown into a tubular resin from an inflation molding die, to a pair of take-up rolls, wherein said resin guiding device comprises a pair of guiding members placed between said inflation molding die and said pair of take-up rolls, and said guiding members respectively have curved contact faces which are in contact with the tubular resin where said curved contact faces are mutually outward curved, and each of said curved contact faces has a shape corresponding to a rein shape so as to fold the tubular resin into a flat shape.

Abstract: Pressure vessel which is filled with at least one medium which is pre-stressed by a mass of gas enclosed in a deformable enveloping body, in particular for the volume equalization in a vibration damper, comprising a wall in which a pressurized gas is enclosed. The wall is at least partially formed from a gas-tight barrier layer and the enveloping body has sections which are aligned at an angle to one another in the circumferential direction, the wall having an impressed transition between the sections, which are aligned at an angle to one another. The wall may additionally be designed with an expansion profile.

Abstract: A chuck for holding an object, including one or more linear motors which include one or more linear stators, two or more moving members which are movable along the linear stator or stators, independent of each other, and one or more guide members which guide each of the two or more moving members along the linear stator or stators, and two or more holding members which are supported by the two or more moving members, respectively, and which cooperate with each other to hold the object.