Processes Of Growth With A Subsequent Step Acting On The Crystal To Adjust The Impurity Amount (e.g., Diffusing, Doping, Gettering, Implanting) Patents (Class 117/2)
  • Patent number: 8623136
    Abstract: The present invention consists of a method for imparting asymmetry to a truncated annular wafer by either rounding one corner of the orientation flat, or rounding one corner of a notch. This novel method of rounding corners impart a visual and/or tactile asymmetry which can be utilized by a person in order to differentiate between the two different sides of the wafer. This inventive wafer design and method for making an asymmetric wafer is especially useful in the field of semiconductor technology and may be used on sapphire crystal wafers or any other class of wafer.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: January 7, 2014
    Assignee: Rubicon Technology, Inc.
    Inventors: Michael W. Matthews, Sunil B. Phatak
  • Patent number: 8617310
    Abstract: Methods of evaluating a superabrasive volume or a superabrasive compact are disclosed. One method may comprise exposing a superabrasive volume to beta particles and detecting a quantity of scattered beta particles. Further, a boundary may be perceived between a first region and a second region of the superabrasive volume in response to detecting the quantity of scattered beta particles. In another embodiment, a boundary between a catalyst-containing region and a catalyst-diminished region of a polycrystalline diamond volume may be perceived. In a further embodiment, a boundary may be perceived between a catalyst-containing region and a catalyst-diminished region of a polycrystalline diamond compact. Additionally, a depth to which a catalyst-diminished region extends within a polycrystalline diamond volume of a polycrystalline diamond compact may be measured in response to detecting a quantity of scattered beta particles. A system configured to evaluate a superabrasive volume is disclosed.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: December 31, 2013
    Assignee: US Synthetic Corporation
    Inventor: Michael A. Vail
  • Patent number: 8574361
    Abstract: A method for producing a high-quality group-III element nitride crystal at a high crystal growth rate, and a group-III element nitride crystal are provided. The method includes the steps of placing a group-III element, an alkali metal, and a seed crystal of group-III element nitride in a crystal growth vessel, pressurizing and heating the crystal growth vessel in an atmosphere of nitrogen-containing gas, and causing the group-III element and nitrogen to react with each other in a melt of the group-III element, the alkali metal and the nitrogen so that a group-III element nitride crystal is grown using the seed crystal as a nucleus. A hydrocarbon having a boiling point higher than the melting point of the alkali metal is added before the pressurization and heating of the crystal growth vessel.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: November 5, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Osamu Yamada, Hisashi Minemoto, Kouichi Hiranaka, Takeshi Hatakeyama, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura, Yasuo Kitaoka
  • Patent number: 8545621
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvins for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Typically, a temper ramp up temperature will range between 300° F. to 1100° F. and depends upon the single crystal material used to construct the substrate wafer. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: October 1, 2013
    Assignee: OPC Laser Systems LLC
    Inventor: Joseph Reid Henrichs
  • Patent number: 8507797
    Abstract: Certain example embodiments of this invention relate to the use of graphene as a transparent conductive coating (TCC). In certain example embodiments, graphene thin films grown on large areas hetero-epitaxially, e.g., on a catalyst thin film, from a hydrocarbon gas (such as, for example, C2H2, CH4, or the like). The graphene thin films of certain example embodiments may be doped or undoped. In certain example embodiments, graphene thin films, once formed, may be lifted off of their carrier substrates and transferred to receiving substrates, e.g., for inclusion in an intermediate or final product. Graphene grown, lifted, and transferred in this way may exhibit low sheet resistances (e.g., less than 150 ohms/square and lower when doped) and high transmission values (e.g., at least in the visible and infrared spectra).
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: August 13, 2013
    Assignee: Guardian Industries Corp.
    Inventor: Vijayen S. Veerasamy
  • Patent number: 8480996
    Abstract: A high-purity tellurium dioxide (TeO2) single crystal and its manufacturing method are provided. The method comprises the following procedures: firstly performing a first single crystal growth, and then dissolving the resulting single crystal again, thereafter adding a precipitation agent to form powder, and finally performing a second single crystal growth of as-prepared powder to obtain the high purity single crystal. The TeO2 single crystal prepared according to present invention is of high purity, especially with a content of radioactive impurities such as U and Th decreased to a level of 10?13 g/g.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: July 9, 2013
    Assignees: Research and Development Center, Shanghai Institute of Ceramics, Shanghai Institute of Ceramics, Chinese Academy of Sciences
    Inventors: Zengwei Ge, Yong Zhu, Guoging Wu, Xueji Yin, Linyao Tang, Hanbin Zhao, Lizhen Gu
  • Patent number: 8409349
    Abstract: A film thickness measurement method for measuring a change in film thickness of 0.3 ?m or less in a silicon wafer by FTIR, having an auxiliary film formation step for depositing an auxiliary film for measurement on a surface to be measured for the change in film thickness, an auxiliary film thickness measurement step for measuring the film thickness of the auxiliary film, a measurement step for measuring the film thickness of the auxiliary film after the change in film thickness, and a calculation step for calculating a change in film thickness of a back surface deposit from the result of the measurement step and the result of the auxiliary film thickness measurement step.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: April 2, 2013
    Assignee: Sumco Corporation
    Inventor: Kazuhiro Ohkubo
  • Patent number: 8398946
    Abstract: Brittle polysilicon rods having a rod cross-section of 80-99% available for electrical conduction and a flexural strength of 0.1 to 80 N/mm2 are produced by a process wherein the temperature of the bridge of polysilicon rods in the Siemens process is held at a high temperature and the flow rate of chlorosilanes is increased to the maximum within a short time. The rods are easily fragmented with low force, resulting in polysilicon with a low level of metallic impurities.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: March 19, 2013
    Assignee: Wacker Chemie AG
    Inventors: Harald Hertlein, Oliver Kraetzschmar
  • Patent number: 8382894
    Abstract: Silicon wafers wherein slip dislocations and warpages during device production are suppressed, contain BMDs with an octahedral shape, and of BMDs at a depth greater than 50 ?m from the surface of the wafer, the density of BMDs with diagonal size of 10 nm to 50 nm is ?1×1012/cm3, and the density of BSFs is ?1×108/cm3. The present silicon wafers preferably have an interstitial oxygen concentration of 4×1017 atoms/cm3 to 6×1017 atoms/cm3, and a density of BMDs with diagonal size of ?200 nm of not more than 1×107/cm3.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: February 26, 2013
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Masayuki Fukuda
  • Patent number: 8382895
    Abstract: A method of manufacturing a silicon monocrystal by FZ method, wherein a P-type or N-type silicon crystal having been pulled up by CZ method is used as a raw material. While impurities whose conductivity type is the same as that of the raw material are supplied by a gas doping method, the raw material is recrystallized by an induction-heating coil for obtaining a product-monocrystal.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: February 26, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Shinji Togawa, Toshiyuki Sato
  • Publication number: 20130000544
    Abstract: An apparatus and methods of forming the apparatus include a film of transparent conductive titanium-doped indium oxide for use in a variety of configurations and systems. The film of transparent conductive titanium-doped indium oxide may be structured as one or more monolayers. The film of transparent conductive titanium-doped indium oxide may be formed using atomic layer deposition.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: Micron Technology, Inc.
    Inventors: Kie Y. Ahn, Leonard Forbes
  • Patent number: 8343618
    Abstract: A silicon wafer in which both occurrences of slip dislocation and warpage are suppressed in device manufacturing processes is a silicon wafer having BMDs having an octahedral shape, wherein BMDs located at a position below the silicon wafer surface to a depth of 20 ?m and having a diagonal length of 200 nm or more are present at a concentration of ?2×109/cm3, and BMDs located at a position below a depth ?50 ?m have a diagonal length of ?10 nm to ?50 nm and a concentration of ?1×1012/cm3.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 1, 2013
    Assignee: Siltronic AG
    Inventors: Masayuki Fukuda, Katsuhiko Nakai
  • Patent number: 8337614
    Abstract: The surface of a gallium nitride single crystal substrate is processed, e.g., comprising steps by planarizing the top side and the bottom side of a gallium nitride original substrate positioned on a support bed; radiating light having wavelengths ranging from 370 to 800 nanometers (nm) onto the planarized gallium nitride original substrate; measuring transmittance of the gallium nitride original substrate; and confirming whether the transmittance is within the range of 65 to 90%. A gallium nitride single crystal substrate obtained through the method of processing the surface has high transmittance ranging from 65 to 90% measured using light having wavelengths of 370 to 800 nm. The thickness ratio (DLa/DLb) of the damage layers on the both sides of the gallium nitride single crystal substrate can be obtained within the range of 0.99 to 1.01.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: December 25, 2012
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: Jin Suk Jeong, Ki Soo Lee, Kyoung Jun Kim, Ju Heon Lee, Chang Uk Jin
  • Patent number: 8323402
    Abstract: Methods of growing and manufacturing aluminum nitride crystal, and aluminum nitride crystal produced by the methods. Preventing sublimation of the starting substrate allows aluminum nitride crystal of excellent crystallinity to be grown at improved growth rates. The aluminum nitride crystal growth method includes the following steps. Initially, a laminar baseplate is prepared, furnished with a starting substrate having a major surface and a back side, a first layer formed on the back side, and a second layer formed on the first layer. Aluminum nitride crystal is then grown onto the major surface of the starting substrate by vapor deposition. The first layer is made of a substance that at the temperatures at which the aluminum nitride crystal is grown is less liable to sublimate than the starting substrate. The second layer is made of a substance whose thermal conductivity is higher than that of the first layer.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: December 4, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keisuke Tanizaki, Naho Mizuhara, Michimasa Miyanaga, Hideaki Nakahata, Yoshiyuki Yamamoto
  • Patent number: 8287642
    Abstract: Devices and methods for providing stimulated Raman lasing are provided. In some embodiments, devices include a photonic crystal that includes a layer of silicon having a lattice of holes and a linear defect that forms a waveguide configured to receive pump light and output Stokes light through Raman scattering, wherein the thickness of the layer of silicon, the spacing of the lattice of holes, and the size of the holes are dimensioned to provide Raman lasing. In some embodiments, methods include forming a layer of silicon, and etching the layer of silicon to form a lattice of holes with a linear defect that forms a waveguide configured to receive pump light and output Stokes light through Raman scattering, wherein the thickness of the layer of silicon, the spacing of the lattice of holes, and the size of the holes are dimensioned to provide Raman lasing.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: October 16, 2012
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Chee Wei Wong, James F. McMillan, Xiaodong Yang, Richard Osgood, Jr., Jerry Dadap, Nicolae Panoiu
  • Patent number: 8257492
    Abstract: A method for purifying silicon bearing materials for photovoltaic applications includes providing metallurgical silicon into a crucible apparatus. The metallurgical silicon is subjected to at least a thermal process to cause the metallurgical silicon to change in state from a first state to a second state, the second stage being a molten state not exceeding 1500 Degrees Celsius. At least a first portion of impurities is caused to be removed from the metallurgical silicon in the molten state. The molten metallurgical silicon is cooled from a lower region to an upper region to cause the lower region to solidify while a second portion of impurities segregate and accumulate in a liquid state region. The liquid state region is solidified to form a resulting silicon structure having a purified region and an impurity region. The purified region is characterized by a purity of greater than 99.9999%.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: September 4, 2012
    Inventors: Masahiro Hoshino, Cheng C. Kao
  • Patent number: 8252404
    Abstract: Disclosed are high resistivity silicon wafers, wherein the interstitial oxygen concentration thereof is 8×1017 atoms/cm3 (ASTM F121-1979) or less, BMD (Bulk Micro Defect) density—oxygen precipitate within wafer—is 5×107 pieces/cm3 or less, and an electric resistivity thereof is 100 ?·cm or more. And further disclosed are high resistivity silicon wafers having an electric resistivity of 100 ?·cm or more, which are cut from crystal region where no COP (Crystal Originated Particle) exist, and in which neither COP (Crystal Originated Particle) nor oxygen precipitate exist at the area from wafer surface to the depth of 5 ?m or more owing to high temperature treatment. It is preferable that, in said high resistivity wafers, carbon concentration in wafers is 1×1016 atoms/cm3 or more (ASTM F123-1981), and/or nitrogen concentration is 1×1013 atoms/cm3 or more.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: August 28, 2012
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Shinsuke Sadamitsu, Masataka Hourai
  • Patent number: 8202728
    Abstract: Described herein are substrates coated with crystals having uniform crystalline morphology on the surface of the substrate. The coated substrates are useful in culturing and performing functional assays on cells such as, for example, resorption studies on bone cells. New methods for producing such coated substrates are also disclosed.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: June 19, 2012
    Assignee: Corning Incorporated
    Inventors: Calvin T. Coffey, Charlotte D. Milia, Hongwei H. Rao, Yichun C. Wang, Christine C. Wolcott
  • Patent number: 8197594
    Abstract: Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ?20 ?m below the wafer surface in the range of 5×1011/cm3, and a density of BMDs with sizes of ?300 nm?1×107/cm3, exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: June 12, 2012
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Wilfried von Ammon, Sei Fukushima, Herbert Schmidt, Martin Weber
  • Publication number: 20120132130
    Abstract: A method of producing a SiC single crystal includes: disposing a SiC seed crystal at a bottom part inside a graphite crucible; causing a solution containing Si, C and R (R is at least one selected from the rare earth elements inclusive of Sc and Y) or X (X is at least one selected from the group consisting of Al, Ge, Sn, and transition metals exclusive of Sc and Y) to be present in the crucible; supercooling the solution so as to cause the SiC single crystal to grow on the seed crystal; and adding powdery or granular Si and/or SiC raw material to the solution from above the graphite crucible while keeping the growth of the SiC single crystal.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 31, 2012
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tadao Nomura, Norio Yamagata, Takehisa Minowa
  • Patent number: 8143142
    Abstract: A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: March 27, 2012
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Young-Soo Park, Gi-Jung Kim, Won-Je Park, Jae-Sik Bae
  • Patent number: 8138066
    Abstract: A method for generating patterned strained regions in a semiconductor device is provided. The method includes directing a light-emitting beam locally onto a surface portion of a semiconductor body; and manipulating a plurality of dislocations located proximate to the surface portion of the semiconductor body utilizing the light-emitting beam, the light-emitting beam being characterized as having a scan speed, so as to produce the patterned strained regions.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Chung Woh Lai, Xiao Hu Liu, Anita Madan, Klaus W. Schwarz, J. Campbell Scott
  • Patent number: 8110041
    Abstract: A method of producing a single crystal CVD diamond of a desired color which includes the steps of providing single crystal CVD diamond which is colored and heat treating the diamond under conditions suitable to produce the desired color. Colors which may be produced are, for example, in the pink-green range.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: February 7, 2012
    Inventors: Daniel James Twitchen, Philip Maurice Martineau, Geoffrey Alan Scarsbrook
  • Patent number: 8105434
    Abstract: A method of purifying substances is described herein, particularly suitable for purifying silica and forming it into silicon oxide sheets or ribbons, or silicon sheets or ribbons. The method includes ion sweeping a sheet of a substance containing ionic impurities by providing an ionic driving force and a thermal driving force. Ions are swept to a collectable region of the sheet. A system is also provided for purifying substances including an ion sweeping sub-system for providing an ionic driving force to a sheet or ribbon, and a heating sub-system positioned and configured for heating the sheet or ribbon. Impurities swept to an edge, surface or both are then mechanically or chemically removed.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: January 31, 2012
    Inventor: Sadeg M. Faris
  • Patent number: 8048220
    Abstract: The invention relates to a method for producing a strained layer. Said method comprises the following steps: placing the layer on a substrate and straining it, structuring the strained layer, relaxing the layer, producing directional off-sets in the layer to be strained. A layered structure produced in this manner has triaxially strained layers.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: November 1, 2011
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Siegfried Mantl, Bernhard Holländer, Dan Mihai Buca
  • Publication number: 20110244761
    Abstract: A method of making a conductive group III nitride single crystal substrate includes feeding to a seed crystal a group III raw material gas, a group V raw material gas, and a doping raw material gas diluted with N2 or Ar to have a predetermined concentration, growing a group III nitride single crystal on the seed crystal at a growth rate of greater than 450 ?m/hour and not greater than 2 mm/hour, and doping the group III nitride single crystal with an impurity contained in the doping raw material gas. The doping raw material gas is diluted to be inhibited from reacting with the group V raw material gas so as to allow the group III nitride single crystal to have a specific resistance of not less than 1×10?3 ?cm and not more than 1×10?2 ?cm.
    Type: Application
    Filed: August 5, 2010
    Publication date: October 6, 2011
    Applicant: Hitachi Cable, Ltd.
    Inventor: Takehiro YOSHIDA
  • Patent number: 8016940
    Abstract: The short-pulse laser light 9 emitted from the short-pulse laser light source 1 is focused on and caused to irradiate an organic crystal 8 contained in a sample container 6 via a shutter 2, intensity adjusting element 3, irradiation position control mechanism 4, and focusing optical system 5. The sample container 6 is carried on a stage 7, and can be moved in three dimensions along the x axis, y axis and z axis in an x-y-z orthogonal coordinate system with the direction of the optical axis being taken as the z axis; furthermore, the sample container 6 can be rotated about the z axis. Working of the organic crystal 8 is performed by means of short-pulse laser light that is focused on and caused to irradiate the surface of the organic crystal 8. Prior to working, nitrogen is caused to jet onto the sample container 6 by a low-temperature gas jet device C that is a cooling device; consequently, the organic crystal 8 is cooled to ?150° C. or below.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: September 13, 2011
    Assignees: Nikon Corporation
    Inventors: Hiroaki Adachi, Hiroshi Kitano
  • Patent number: 7993452
    Abstract: A role of a bottom face of a silicon wafer is identified in a manufacturing process of the silicon wafer. And preferable characteristic feature is also identified. In order to obtain the above characteristic feature, a process method to be implemented into the method of manufacturing a normal silicon wafer is provided. For example, the method comprises: a pre-cleaning process for cleaning the silicon wafer having top and bottom faces processed to a mirror finish; and a rapid thermal process or an epitaxial growth process, wherein the pre-cleaning process comprises a hydrofluoric acid (HF) process and a subsequent pure water (DIW) process.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: August 9, 2011
    Assignee: Sumco Techxiv Corporation
    Inventors: Koichiro Hayashida, Kazuhiro Narahara, Hirotaka Kato
  • Patent number: 7985294
    Abstract: An optical device and a method of manufacturing the optical device, with the method including the steps of forming a dopant layer on a stoichiometric lithium niobate single crystal substrate with Li to Nb mole composition ratio of 49.5% to 50.5%, and diffusing a dopant in the dopant layer into at least a portion of the stoichiometric lithium niobate single crystal substrate. The stoichiometric lithium niobate single crystal substrate includes 0.5 to 5 mol % of Mg. In the diffusing step, a heat treatment is performed at a diffusion temperature of 1000° C. to 1200° C. for a diffusion time of 3 hours to 24 hours in a dry atmosphere of at least one of O2, N2, Ar and He gas having a dew-point temperature of ?35° C. or less.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 26, 2011
    Assignees: Sumitomo Osaka Cement Co., Ltd., National Institute for Materials Science
    Inventors: Futoshi Yamamoto, Katsutoshi Kondou, Junichiro Ichikawa, Masaru Nakamura, Sunao Kurimura, Shunji Takekawa, Kenji Kitamura
  • Patent number: 7972437
    Abstract: Described herein are hollow nanocrystals having various shapes that can be produced by a simple chemical process. The hollow nanocrystals described herein may have a shell as thin as 0.5 nm and outside diameters that can be controlled by the process of making.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: July 5, 2011
    Assignee: The Regents of the University of California
    Inventors: A. Paul Alivisatos, Yadong Yin, Can Kerem Erdonmez
  • Patent number: 7968074
    Abstract: The method produces low-stress, large-volume crystals with low birefringence and uniform index of refraction. The method includes growing the crystal with larger than desired dimensions including diameter and height from a melt; cooling and tempering the crystal with the larger than desired dimensions and after the cooling and tempering removing edge regions of the crystal with the larger than desired dimensions so that a diameter reduction and a height reduction of at least five percent occurs respectively and so that the crystal has the desired dimensions of diameter and height. No further tempering takes place after removing of the edge regions.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: June 28, 2011
    Assignee: Hellma Materials GmbH & Co. KG
    Inventors: Lutz Parthier, Joerg Staeblein, Gunther Wehrhan, Christian Kusch
  • Publication number: 20110147589
    Abstract: In one embodiment, a method for producing a high-purity single crystal of aluminum antimonide (AlSb) includes providing a growing environment with which to grow a crystal, growing a single crystal of AlSb in the growing environment which comprises hydrogen (H2) gas to reduce oxide formation and subsequent incorporation of oxygen impurities in the crystal, and adding a controlled amount of at least one impurity to the growing environment to effectively incorporate at least one dopant into the crystal. In another embodiment, a high energy radiation detector includes a single high-purity crystal of AlSb, a supporting structure for the crystal, and logic for interpreting signals obtained from the crystal which is operable as a radiation detector at a temperature of about 25° C. In one embodiment, a high-purity single crystal of AlSb includes AlSb and at least one dopant selected from a group consisting of selenium (Se), tellurium (Te), and tin (Sn).
    Type: Application
    Filed: May 5, 2010
    Publication date: June 23, 2011
    Inventors: Vincenzo Lordi, Kuang Jen J. Wu, Daniel Aberg, Paul Erhart, Arthur W. Coombs, III, Benjamin W. Sturm
  • Patent number: 7927571
    Abstract: In the batch production of high purity polycrystalline silicon, in which a U-shaped silicon carrier body is fastened in an open deposition reactor, the deposition reactor is hermetically sealed, the U-shaped carrier body is heated electrical current, a silicon-containing reaction gas and hydrogen are introduced into the reactor through a supply line so that silicon from the reaction gas is deposited on the carrier body, the diameter of the carrier body increases and a waste gas formed is removed from the deposition reactor through a discharge line, and, after a desired diameter of the polysilicon rod is reached, deposition is terminated, the carrier body is cooled to room temperature, the reactor is opened, the carrier body is removed from the reactor and a second U-shaped silicon carrier body made of silicon is fastened in the deposition reactor, an inert gas is fed through the supply and discharge lines into the open reactor from at least the time when the reactor is opened to extract the first carrier body
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: April 19, 2011
    Assignee: Wacker Chemie AG
    Inventors: Thomas Altmann, Hans Peter Sendlinger, Ivo Croessmann
  • Publication number: 20110086756
    Abstract: A method of preparing the electronic material called silicon intercalated epitaxial monolayer graphene comprises the steps of growing large scale high-quality graphene on metal surface, depositing silicon on the prepared epitaxial graphene and annealing to high temperature to intercalate the silicon to the interface of graphene and metal surface. Depending on the quantity of the silicon deposited on the graphene surface, the numbers of the silicon layers on the interface can be controlled and adjusted.
    Type: Application
    Filed: December 20, 2010
    Publication date: April 14, 2011
    Inventors: Hong-jun Gao, Yi Pan, Min Gao, Jinhai Mao, Li Huang, Haitao Zhou, Yeliang Wang, Haiming Guo, Shixuan Du
  • Patent number: 7905957
    Abstract: The present invention is related to a process for obtaining a larger area substrate of mono-crystalline gallium-containing nitride by making selective crystallization of gallium containing nitride on a smaller seed under a crystallization temperature and/or pressure from a supercritical ammonia-containing solution made by dissolution of gallium-containing feedstock in a supercritical ammonia-containing solvent with alkali metal ions, comprising: providing two or more elementary seeds, and making selective crystallization on the two or more separate elementary seeds to get a merged larger compound seed. The merged larger compound seed is used for a seed in a new growth process and then to get a larger substrate of mono-crystal gallium-containing nitride.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: March 15, 2011
    Assignees: Ammono Sp. Z.O.O., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Patent number: 7892354
    Abstract: A process for the detection of polymorphic or pseudopolymorphic forms of solid, molecular and crystallizing compounds, or of molecular, cocrystalline compounds or of solid solutions which consist of at least two solid, molecular and crystallizing compounds, in a series investigation using an apparatus for parallel investigations in vessels of an array under different conditions in each vessel, in which substantially only the amorphous form of the crystallizing compound, a solvate of the crystallizing compound or substantially only the amorphous form or a solvate of a compound in a mixture of at least two compounds is used as a suspension or solution, the solutions of amorphous compound having, at the same temperature, a higher content of crystallizable compounds than is achievable with a corresponding crystalline compound.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: February 22, 2011
    Assignee: Solvias AG
    Inventors: Fritz Blatter, Martin Szelagiewicz, Markus von Raumer
  • Publication number: 20110030991
    Abstract: Certain example embodiments of this invention relate to the use of graphene as a transparent conductive coating (TCC). In certain example embodiments, graphene thin films grown on large areas hetero-epitaxially, e.g., on a catalyst thin film, from a hydrocarbon gas (such as, for example, C2H2, CH4, or the like). The graphene thin films of certain example embodiments may be doped or undoped. In certain example embodiments, graphene thin films, once formed, may be lifted off of their carrier substrates and transferred to receiving substrates, e.g., for inclusion in an intermediate or final product. Graphene grown, lifted, and transferred in this way may exhibit low sheet resistances (e.g., less than 150 ohms/square and lower when doped) and high transmission values (e.g., at least in the visible and infrared spectra).
    Type: Application
    Filed: August 7, 2009
    Publication date: February 10, 2011
    Applicant: GUARDIAN INDUSTRIES CORP.
    Inventor: Vijayen S. Veerasamy
  • Patent number: 7883645
    Abstract: The present invention relates to a method for increasing the conversion of group III metal to group III nitride in a fused metal containing group III elements, with the introduction of nitrogen into the fused metal containing group III, at temperatures?1100° C. and at pressures of below 1×108 Pa, wherein a solvent adjunct is added to the fused metal containing group III elements, which is at least one element of the following elements C, Si, Ge, Fe, and/or at least one element of the rare earths, or an alloy or a compound of these elements, in particular their nitrides.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: February 8, 2011
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Jochen Friedrich, Georg Muller, Elke Meissner, Bernhard Birkmann, Stephan Hussy
  • Patent number: 7879147
    Abstract: Large area, uniformly low dislocation density single crystal III-V nitride material, e.g., gallium nitride having a large area of greater than 15 cm2, a thickness of at least 1 mm, an average dislocation density not exceeding 5E5 cm?2, and a dislocation density standard deviation ratio of less than 25%, and methods of forming same, are disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: February 1, 2011
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo
  • Publication number: 20100329959
    Abstract: A method for purifying silicon wherein silicon is crystallized from a solvent metal. The method comprises the steps of providing a molten liquid containing silicon, a solvent metal and impurities, cooling the molten liquid to form first silicon crystals and a first mother liquor, separating the first silicon crystals from the first mother liquor, contacting the first silicon crystals with compound which will dissolve the first mother liquor and separating the washed crystals from the wash solution.
    Type: Application
    Filed: July 23, 2008
    Publication date: December 30, 2010
    Applicant: 6N Silicon Inc.
    Inventors: Scott Nichol, Jian J. Chen
  • Patent number: 7842132
    Abstract: The present invention relates to an optical element for converting light of prescribed wavelength emitted from a light source into light of wavelength different from the prescribed wavelength for outputting. A first crystal part (20) and a second crystal part (21) having respective surfaces opposed to each other whose coefficients of linear expansion are different by 5 ppm or more are optically polished so that the surfaces opposed to each other include crystallographic axes. An acrylic adhesive whose glass transition point is 75° C. or lower is applied to the adhesive surface of the first crystal part (20) or the second crystal part (21) to stick the first crystal part (20) and the second crystal part (21) to each other. The adhesive is irradiated with light to cure the adhesive and form an adhesive layer (22) having a refractive index of 1.52 or lower. Then, the first crystal part and the second crystal part stuck to each other are cut into a desired size to form the optical element.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: November 30, 2010
    Assignee: Sony Corporation
    Inventors: Koichiro Kezuka, Hiroto Sasaki
  • Patent number: 7837791
    Abstract: A silicon single crystal wafer for a particle monitor is presented, which wafer has an extremely small amount in the surface density of light point defects and is capable of still maintaining a small surface density even after repeating the SC-1. The wafer is prepared by slicing a silicon single crystal ingot including an area in which crystal originated particles are generated, and the surface density of particles having a size of not less than 0.12 mum is not more than 15 counts/cm2 after repeating the SC-1. More preferably, a silicon single crystal wafer having a nitrogen concentration of 1×1013 1×1015 atoms/cm3 provides a surface density of not more than 1 counts/cm2 for the particles having a diameter of not less than 0.12 mum even after repeating the SC-1. Hence, a high quality wafer optimally used for a particle monitor can be obtained and a very small number of defects in the wafer make it possible to produce devices.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: November 23, 2010
    Assignee: Sumitomo Mitsubishi Silicon Corporation
    Inventors: Hiroki Murakami, Masahiko Okui, Hiroshi Asano
  • Patent number: 7837789
    Abstract: A method of epitaxial growth of a 4H—SiC single crystal enabling growth of an SiC single crystal with low defects and low impurities able to be used for a semiconductor material at a practical growth rate, comprising growing a 4H—SiC single crystal on a 4H—SiC single crystal substrate by epitaxial growth while inclining an epitaxial growth plane of the substrate from a (0001) plane of the 4H—SiC single crystal by an off-angle of at least 12 degrees and less than 30 degrees in a <11-20> axial direction, and a 4H—SiC single crystal obtained by the same.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: November 23, 2010
    Assignees: Toyota Jidosha Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.
    Inventors: Tsunenobu Kimoto, Hiromu Shiomi, Hiroaki Saitoh
  • Publication number: 20100288184
    Abstract: A method for manufacturing a silicon single crystal wafer for IGBT, including introducing a hydrogen atom-containing substance into an atmospheric gas at a hydrogen gas equivalent partial pressure of 40 to 400 Pa, and growing a single crystal having an interstitial oxygen concentration of 8.5×1017 atoms/cm3 or less at a silicon single crystal pulling speed enabling pulling of a silicon single crystal free of grown-in defects. The silicon single crystal is irradiated with neutrons so as to dope with phosphorous; an n-type dopant is added to the silicon melt; or phosphorous is added to the silicon melt so the phosphorous concentration in the silicon single crystal is 2.9×1013 to 2.9×1015 atoms/cm3; a p-type dopant having a segregation coefficient smaller than that of the phosphorous is added to the silicon melt so the concentration in the single crystal is 1×1013 to 1×1015 atoms/cm3 corresponding to the segregation coefficient thereof.
    Type: Application
    Filed: July 30, 2010
    Publication date: November 18, 2010
    Inventors: Toshiaki ONO, Shigeru Umeno, Wataru Sugimura, Masataka Hourai
  • Publication number: 20100290971
    Abstract: It is possible to provide a silicon wafer that as well as being free of COPs and dislocation clusters, has defects (grown-in defects including silicon oxides), which are not overt in an as-grown state, such as OSF nuclei and oxygen precipitate nuclei existing in the PV region, to be vanished or reduced, by adopting a method for producing a silicon wafer, the method comprising the steps of: growing a single crystal silicon ingot by the Czochralski method; cutting a silicon wafer out of the ingot; subjecting the wafer to an RTP at 1,250° C. or more for 10 seconds or more in an oxidizing atmosphere; and removing a grown-in defect region including silicon oxides in the vicinity of wafer surface layer after the RTP.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 18, 2010
    Inventors: Wataru Itou, Takashi Nakayama, Shigeru Umeno, Hiroaki Taguchi, Yasuo Koike
  • Patent number: 7833345
    Abstract: A method for the treatment of a crystal, such as a lithium niobate crystal or lithium tantalate crystal, having nonlinear optical properties. The crystal comprises foreign atoms which bring about specific absorption of radiated light. The foreign atoms are transformed into a lower valent state by means of oxidation. Electrons, which are released during oxidation, are discharged from the crystal with the aid of an external power source.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 16, 2010
    Assignee: Deutsche Telekom AG
    Inventors: Karsten Buse, Matthias Falk, Konrad Peithmann
  • Patent number: 7824929
    Abstract: An object of the present invention is to remove micro-scratches on a surface of a GaN substrate cut from a GaN ingot. The invention is directed to establish a method for surface treatment of a GaN substrate, including heating the surface in an atmosphere containing trimethylgallium, ammonia, and hydrogen. It is preferable that the trimethylgallium feeding rate is 150 ?mol/min or higher, the ratio of trimethylgallium feeding rate to ammonia feeding rate (V/III ratio) is 1,200 to 4,000, and the heating temperature is 1,000° C. to 1,250° C. In addition, the temperature of the surface treatment is set to be higher than that of the following GaN growth, and the feed rate of trimethylgallium is lower than that of the growth procedure. RMS of roughness on the substrate was equal to or less than 1.3 nm, and the substrate whose step condition is excellent can be obtained.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: November 2, 2010
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masato Aoki, Miki Moriyama
  • Patent number: 7808080
    Abstract: The present invention provides a photorefractive potassium niobate (KNbO3 ) crystal including a first impurity added substitutionally to the niobium (Nb) site and a second impurity added substitutionally to the potassium (K) site, wherein the first and second impurities are different. There is also provided a method of making the codoped potassium niobate crystal (KNbO3 ) of the present invention wherein the method includes adding at least one of the impurities to a melt composition during crystal growth, adding at least one of the impurities into an existing crystal using thermal diffusion, and/or adding at least one of impurities into an existing crystal using electrically assisted diffusion.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: October 5, 2010
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Dean R. Evans, Gary Cook
  • Publication number: 20100244087
    Abstract: During the growth of a nitride semiconductor crystal on a nonpolar face nitride substrate, such as an m-face, the gas that constitutes the main flow in the process of heating up to a relatively high temperature range, before growth of the nitride semiconductor layer, (the atmosphere to which the main nitride face of the substrate is exposed) and the gas that constitutes the main flow until growth of first and second nitride semiconductor layers is completed (the atmosphere to which the main nitride face of the substrate is exposed) are primarily those that will not have an etching effect on the nitride, while no Si source is supplied at the beginning of growth of the nitride semiconductor layer. Therefore, nitrogen atoms are not desorbed from near the nitride surface of the epitaxial substrate, thus suppressing the introduction of defects into the epitaxial film. This also makes epitaxial growth possible with a surface morphology of excellent flatness.
    Type: Application
    Filed: November 20, 2008
    Publication date: September 30, 2010
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Hideyoshi Horie, Kaori Kurihara
  • Patent number: 7777403
    Abstract: A photonic-crystal filament is formed by mixing a slurry comprising particles of substantially uniform size and a precursor material for a desired metal, urging the slurry through an orifice to force the particles and precursor material into a combination having a desired crystallographic configuration, drying the combination emerging from the orifice, and sintering the precursor material.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: August 17, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David Champion, Gregory S. Herman, Hubert A. Vander Plas, David M. Schut