Processes Of Growth With A Subsequent Step Of Heat Treating Or Deliberate Controlled Cooling Of The Single-crystal Patents (Class 117/3)
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Publication number: 20090114924Abstract: A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm?3, and a concentration of transition metals impurities less than 5×1014 cm?3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies or carbon vacancies. The crystal is annealed for a desired time at a temperature above 700° C. in an atmosphere containing any of the gases hydrogen or a mixture of hydrogen and an inert gas, such that the density of intrinsic defects and any associated defects is decreased to a concentration low enough to confer to the crystal a desired carrier life time of at least 50 ns at room temperature.Type: ApplicationFiled: January 13, 2009Publication date: May 7, 2009Applicants: NORSTEL AB, SICED ELECTRONICS DEVELOPMENT GMBHInventors: Alexandre Ellison, Björn Magnusson, Asko Vehanen, Dietrich Stephani, Heinz Mitlehner, Peter Friedrichs
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Patent number: 7527755Abstract: In one embodiment, a ferroelectric material is processed by placing the material in an environment including metal vapor and heating the material to a temperature below the Curie temperature of the material. This allows the bulk conductivity of the ferroelectric material to be increased without substantially degrading its ferroelectric domain properties. In one embodiment, the ferroelectric material comprises lithium tantalate and the metal vapor comprises zinc.Type: GrantFiled: May 9, 2005Date of Patent: May 5, 2009Assignee: Silicon Light Machines CorporationInventors: Ronald O. Miles, Ludwig L. Galambos, Janos J. Lazar, Gabriel C. Risk, Alexei L. Alexandrovski, Gregory D. Miller, David Caudillo, Joseph M. McRae, Gisele L. Foulon
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Patent number: 7527690Abstract: The present invention relates to a ferroelectric ceramic compound having the composition of the following formula: s[L]?x[P]y[M]z[N]p[T], a ferroelectric ceramic single crystal, and preparation processes thereof. The ferroelectric ceramic compound and the single crystal according to the present invention are relaxor ferroelectrics having high piezoelectricity, a high electromechanical coefficient and a high electrooptical coefficient, and are useful for manufacturing tunable filters for radio communication, optical communication devices, surface acoustic wave devices, and the like. Particularly, the process of preparing the single crystal according to the present invention enables preparation of a single crystal having a diameter of 5 cm or greater and a single crystal wafer with uniform composition.Type: GrantFiled: July 30, 2003Date of Patent: May 5, 2009Assignee: Ibule Photonics Co., Ltd.Inventors: Sang-Goo Lee, Min-Chan Kim, Byung-Ju Choi, Min-Chul Shin, Su-Han Yu
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Publication number: 20090110626Abstract: The present invention relates to method of improving the optical properties of diamond at low pressures and more specifically to a method of producing a CVD diamond of a desired optical quality which includes growing CVD diamond and raising the temperature of the CVD diamond from about 1400° C. to about 2200° C. at a pressure of from about 1 to about 760 torr outside the diamond stability field in a reducing atmosphere for a time period of from about 5 seconds to about 3 hours.Type: ApplicationFiled: October 2, 2008Publication date: April 30, 2009Inventors: Russell J. Hemley, Ho-Kwang Mao, Chih-Shiue Yan, Yufei Meng
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Patent number: 7524370Abstract: The invention relates to nanostructure and its manufacturing method. In the manufacturing method of a nanostructure, first anisotropic crystalline particles, connectors having an end to be connected to a specific crystal face of each of said crystalline particles, and second particles to be connected to the other end of each of said connectors are prepared. First ends of the connectors are connected to specific crystal faces of the first crystalline particles, and simultaneously or before or after the connection, the second ends of the connectors are connected to the second particles. A nanostructure formed by this method has a three-dimensional structure which does not have a closest packing structure.Type: GrantFiled: August 22, 2005Date of Patent: April 28, 2009Assignees: Fujikura Ltd., National University Corporation Hokkaido UniversityInventors: Yoshihiro Terada, Mitsuru Kamikatano, Kuniharu Himeno, Bunsho Ohtani, Takamune Yamagami, Tsukasa Torimoto
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Patent number: 7507288Abstract: High temperature composites and thermal barrier coatings, and related methods, using anisotropic ceramic materials, such materials as can be modified to reduce substrate thermal mismatch.Type: GrantFiled: August 15, 2006Date of Patent: March 24, 2009Assignee: Applied Thin Films, Inc.Inventors: Sankar Sambasivan, Kimberly Steiner
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Patent number: 7507293Abstract: Fabrication of a photonic crystal is described. A patterned array of nanowires is formed, the nanowires extending outward from a surface, the nanowires comprising a catalytically grown nanowire material. Spaces between the nanowires are filled with a slab material, the patterned array of nanowires defining a patterned array of channels in the slab material. The nanowire material is then removed from the channels.Type: GrantFiled: March 31, 2005Date of Patent: March 24, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Zhiyong Li, R. Stanley Williams, M. Saif Islam, Philip J. Kuekes
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Patent number: 7507289Abstract: In a solid solution system of Al2O3 and CAO or SrO, it has been difficult to obtain a material having a high electrical conductivity (>10?4 S·cm?) at room temperature. A compound is provided in which electrons at a high concentration are introduced into a 12CaO.7Al2O3 compound, a 12SrO.7Al2O3 compound, or a mixed crystal compound containing 12CaO.7Al2O3 and 12SrO.7Al2O3. The compound formed by substituting all the free oxygen ions with electrons is regarded as an electride compound in which [Ca24Al28O64]4+(4e?) or [Sr24Al28O64]4+(4e?) serves as a cation and electrons serve as anions. When a single crystal or a hydrostatic pressure press molded material of a fine powder thereof is held at approximately 700° C. in an alkaline metal vapor or an alkaline earth metal vapor, melt of a hydrostatic pressure press molded material of a powder is held at approximately 1,600° C. in a carbon crucible, followed by slow cooling for solidification, or a thin film of the compound held at approximately 600° C.Type: GrantFiled: February 12, 2004Date of Patent: March 24, 2009Assignee: Japan Science and Technology AgencyInventors: Hideo Hosono, Masahiro Hirano, Katsuro Hayashi, Masashi Miyakawa, Isao Tanaka
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Publication number: 20090064922Abstract: Methods are disclosed for producing highly doped semiconductor materials. Using the invention, one can achieve doping densities that exceed traditional, established carrier saturation limits without deleterious side effects. Additionally, highly doped semiconductor materials are disclosed, as well as improved electronic and optoelectronic devices/components using said materials. The innovative materials and processes enabled by the invention yield significant performance improvements and/or cost reductions for a wide variety of semiconductor-based microelectronic and optoelectronic devices/systems. Materials are grown in an anion-rich environment, which, in the preferred embodiment, are produced by moderate substrate temperatures during growth in an oxygen-poor environment.Type: ApplicationFiled: February 20, 2007Publication date: March 12, 2009Inventors: Thomas D. Boone, Eric S. Harmon, Robert D. Koudelka, David B. Salzman, Jerry M. Woodall
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Patent number: 7488384Abstract: Colloidal nanocrystals or “quantum dots” of GaN are directly produced by heating amidogallium dimer, i.e., (Ga2[N(CH3)2]6), in the presence of a functional amine. The GaN quantum dots obtained, which comprise isolated particles 2-3 nm in diameter with a relative broad size distribution (e.g., 20% standard deviation) exhibit strong exciton confinement.Type: GrantFiled: May 3, 2006Date of Patent: February 10, 2009Assignee: Ohio UniversityInventors: Paul Gregory Van Patten, Guiquan Pan
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Publication number: 20090020067Abstract: The present invention pertains to a method of producing solar-grade polysilicon ingot conducive to reduce the energy consumption and cost and have high yield of casting ingot without complicating equipments. It includes melting and heating raw materials into raw water; mixing the slag removal with the water for eliminating metal impurities; conducting some water vapor for obviating B-atomic and generating pure water, thereafter heated from 1500°-1700° C.; advance heating the crucible and graphite mold in the temperature range of 1000°-1400° C., further pouring the pure water therein and having water temperature from 1450°-1600° C.; adjusting the temperature of the crucible and mold from 1400°-1430° C., thence to the range of 1000°-1200° C. for concentrating the solid/liquid property and impurities of the water on central of the mold; reducing the temperature of the crucible range of 1000°-1200° C. to 200°-400° C., thus finishing an integral polysilicon ingot.Type: ApplicationFiled: March 17, 2008Publication date: January 22, 2009Inventors: Zhi-Yi SU, Yong-Qiang Hong, Ji-Rong Yang
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Publication number: 20090007839Abstract: The present invention provides a method for manufacturing a silicon single crystal wafer in which a silicon single crystal ingot is pulled by a CZ method, and a wafer sliced from the ingot is subjected to a rapid thermal annealing, wherein wafers sliced from the ingot which has been pulled while changing a pulling rate are subjected to rapid thermal annealings in various heat treatment temperatures, oxide dielectric breakdown voltage measurements are performed to get a relation between the pulling rate and the heat treatment temperatures, and a result of the oxide dielectric breakdown voltage measurements in advance, conditions of a pulling rate and a heat treatment temperature are determined based on the relation so that the whole area thereof in the radial direction may become N region after the rapid thermal annealing, and the pulling of the ingot and the rapid thermal annealing are performed to thereby manufacture the silicon single crystal wafer.Type: ApplicationFiled: December 21, 2006Publication date: January 8, 2009Applicant: Shin-Etsu Handotai Co., Ltd.Inventor: Koji Ebara
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Patent number: 7473656Abstract: A method of thermally treating a magnetic layer of a wafer, includes annealing, for a predetermined short duration, a magnetic layer of a single wafer, applying at least one local magnetic field to the magnetic layer obtained without making electrical contact to the wafer, and cooling the single wafer using argon. The annealing includes heating only a local area on the single wafer at a temperature of 280 degrees C for 60 seconds in the presence of a magnetic field using a rapid thermal anneal (RTA) lamp. The applying a magnetic field to the magnetic layer is conducted after the annealing and ancludes applying local fields in different directions to different areas of the single wafer. The single wafer includes a magnetic stack formed thereon, the magnetic stcak having a structure of 50TaN/50Ta/175PtMn/15CoFe/9Al/50Py/100TaN.Type: GrantFiled: October 23, 2003Date of Patent: January 6, 2009Assignee: International Business Machines CorporationInventors: Ulrich Karl Klostermann, Wolfgang Raberg, Philip Trouilloud
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Publication number: 20090000537Abstract: A method for producing a silicon wafer that has a carbon concentration of 5×1015 to 5×1017 atoms/cm3, interstitial oxygen concentration of 6.5×1017 to 13.5×1017 atoms/cm3, and a resistivity of 100 ?cm or more.Type: ApplicationFiled: August 29, 2008Publication date: January 1, 2009Applicant: Sumco CorporationInventor: Kazunari Kurita
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Publication number: 20090000535Abstract: The present invention provides a method for manufacturing a silicon single crystal wafer by which a silicon single crystal ingot is pulled based on a Czochralski method and a rapid thermal annealing is performed with respect to a wafer that is sliced out from the silicon single crystal ingot and has a whole area in a radial direction formed of N region, wherein a heat treatment at 800 to 1100° C. as a heat treatment temperature for two hours or below as a hear treatment time is carried out after the rapid thermal annealing while adjusting the heat treatment temperature and the heat treatment time so that at least diffusion distances of vacancies as point defects injected by the rapid thermal annealing become longer than diffusion distances of the vacancies by a heat treatment performed at 800° C. for 30 minutes, thereby annihilating a vacancy type defect.Type: ApplicationFiled: December 21, 2006Publication date: January 1, 2009Applicant: Shin-Etsu Handotai Co., Ltd.Inventor: Koji Ebara
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Publication number: 20090000536Abstract: A high-quality polycrystalline bulk semiconductor having a large crystal grain size is produced by the casting method in which growth is regulated so as to proceed in the same plane direction, i.e., the {110}; plane or {112} plane is disclosed. The process, which is for producing a polycrystalline bulk semiconductor, comprises: a step in which a melt of a semiconductor selected among Si, Ge, and SiGe is held in a crucible; a step in which a bottom part of the crucible is cooled to give a temperature gradient and that part of the melt which is located directly on the crucible bottom is rapidly cooled in the beginning of growth to supercool the melt around the crucible bottom; a step in which the crucible is cooled to grow nuclei on the crucible bottom due to the supercooled state of the melt around the crucible bottom and thereby grow dendritic crystals along the crucible bottom; and a step in which a polycrystalline bulk of the semiconductor is then grown on the upper side of the dendritic crystals.Type: ApplicationFiled: May 30, 2008Publication date: January 1, 2009Applicant: Tohoku UniversityInventors: Kozo Fujiwara, Kazuo Nakajima
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Publication number: 20080308034Abstract: A ribbon crystal pulling furnace has an interior for enclosing at least a portion of one or more ribbon crystals, and an afterheater positioned within the interior. The afterheater has at least one wall with one or more openings that facilitate control of the temperature profile within the furnace.Type: ApplicationFiled: June 13, 2008Publication date: December 18, 2008Applicant: EVERGREEN SOLAR, INC.Inventors: Weidong Huang, David Harvey, Scott Reitsma
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Publication number: 20080290315Abstract: A piezoelectric single crystal and piezoelectric and dielectric application parts using the same are provided, which have all of high dielectric constant K3T, high piezoelectric constants (d33 and k33), high phase transition temperatures (Tc and TRT), high coercive electric field Ec and improved mechanical properties and thus can be used in high temperature ranges and high voltage conditions. Furthermore, the piezoelectric single crystals are produced by the solid-state single crystal growth adequate for mass production of single crystals and the single crystal composition is developed not to contain expensive raw materials so that the piezoelectric single crystals can be easily commercialized. With the piezoelectric single crystals and piezoelectric single crystal application parts, the piezoelectric and dielectric application parts using the piezoelectric single crystals of excellent properties can be produced and used in the wide temperature range.Type: ApplicationFiled: November 6, 2006Publication date: November 27, 2008Applicant: Ceracomp Co., Ltd.Inventors: Ho-Yong Lee, Sung-Min Lee, Dong-Ho Kim
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Publication number: 20080286565Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.Type: ApplicationFiled: November 2, 2007Publication date: November 20, 2008Inventors: Yasuo Koike, Toshiaki Ono, Naoki Ikeda, Tomokazu Katano
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Patent number: 7452792Abstract: The invention relates to a method of forming a layer of elastically unstrained crystalline material intended for electronics, optics, or optronics applications, wherein the method is carried out using a structure that includes a first crystalline layer which is elastically strained under tension (or respectively in compression) and a second crystalline layer which is elastically strained in compression (or respectively under tension), with the second layer being adjacent to the first layer.Type: GrantFiled: January 19, 2006Date of Patent: November 18, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nicolas Daval, Zohra Chahra, Romain Larderet
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Patent number: 7449134Abstract: Noble crystal of 4-dimethylamino-4-stilbazolium tosylate (DAST) useful as an electro-optical element. A DAST crystal having a size effective for use as an electro-optical element is provided by a twin crystal of DAST. The twin crystal of DAST can be obtained according to a seed crystallization method or a slope crystal growing method.Type: GrantFiled: July 21, 2006Date of Patent: November 11, 2008Assignees: Daiichi Pure Chemicals Co., Ltd., Daiichi Pharmaceutical Co., Ltd.Inventors: Atsushi Izumi, Yuta Ochiai, Shinsuke Umegaki, Tomo Iwamura, Makoto Suzuki, Hidetaka Sakurai, Shinji Yamaguchi
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Publication number: 20080264330Abstract: An apparatus for synthesizing nanostructures. In one embodiment, the apparatus includes a heating device that defines a reaction zone therein and a susceptor made of a ferromagnetic material with a Curie temperature and placed in the reaction zone, where the Curie temperature substantially corresponds to a temperature at which the growth of desired nanostructures occurs and the heating device is capable of heating the susceptor substantially at the Curie temperature.Type: ApplicationFiled: March 6, 2008Publication date: October 30, 2008Applicant: Board of Trustees of the University of ArkansasInventors: Jon Gardner Wilkes, Dan Alexander Buzatu, Dwight Wayne Miller, Alexandru Sorin Biris, Alexandru Radu Biris, Dan Lupu, Jerry A. Darsey
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Patent number: 7442250Abstract: A lithium tantalate substrate obtained by working in the state of a substrate a lithium tantalate crystal grown by the Czochralski method is buried in a mixed powder of Al and Al2O3, followed by heat treatment carried out at a temperature kept to from 350 to 600° C, to manufacture a lithium tantalate substrate having volume resistivity which has been controlled within the range of from 106 to 108 ?cm. The substrate obtained has no piezoelectricity, and it can be made colored and opaque from a colorless and transparent state and also sufficiently has the properties required as a piezoelectric material.Type: GrantFiled: October 7, 2004Date of Patent: October 28, 2008Assignee: Sumitomo Metal Mining Co., Ltd.Inventors: Tomio Kajigaya, Takashi Kakuta
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Patent number: 7438762Abstract: A manufacture method that can manufacture ZnO based compound semiconductor crystal of good quality. A ZnO substrate is prepared to have a principal surface made of a plurality of terraces of (0001) planes arranged stepwise along an m-axis direction, the envelop of the principal surface being inclined relative to the (0001) plane by about 2 degrees or less. ZnO based compound semiconductor crystal is grown on the principal surface.Type: GrantFiled: August 24, 2006Date of Patent: October 21, 2008Assignee: Stanley Electric Co., Ltd., Tokyo Denpa Co., Ltd., and Tohoku UniversityInventors: Hiroyuki Kato, Michihiro Sano, Katsumi Maeda, Hiroshi Yoneyama, Takafumi Yao, Meoung Whan Cho
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Publication number: 20080251006Abstract: A method and apparatus for producing surface stabilized nanometer-sized particles, the method including the steps of forming the aerosol by mixing reactants, a surface-stabilizing surfactant, and a liquid to form a mixture, forming a mist of droplets of the mixture, heating the droplets to cause a reaction between species of the mixture and collecting the nanometer-sized products. The method for producing various size, shape and size distribution of nanoparticles by changing the ratio of the reagents and the ligands in the mixture of precursors.Type: ApplicationFiled: April 11, 2007Publication date: October 16, 2008Applicant: UT Dots, Inc.Inventors: Yuri T. Didenko, Yuhua Ni
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Publication number: 20080251007Abstract: A method of controlling an epitaxial growth process in an epitaxial reactor and a system for controlling an epitaxial growth process in an epitaxial reactor.Type: ApplicationFiled: April 2, 2008Publication date: October 16, 2008Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Manfred Schiekofer, Pietro Foglietti, Robert Maier
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Patent number: 7431764Abstract: The axial temperature gradient G at the vicinity of the solid-liquid interface 24 in an ingot is calculated in consideration of the heating value of a heater 18, the dimensions and physical property values of furnace inside components and the convection of the melt 12 before pulling up the single crystal ingot 15 by a puller 10 by use of a numerical simulation of synthetic heater transfers and a numerical simulation of melt convection. Then, the pulling velocity V of the single crystal ingot is determined from an value experienced of the ratio C=V/G of the pulling velocity V and the axial temperature gradient G of the single crystal ingot at which the single crystal ingot becomes defect-free, obtained when the single crystal ingot was pulled up by a same type puller as the puller in the past, and the axial temperature gradient G calculated by use of the simulations.Type: GrantFiled: February 17, 2006Date of Patent: October 7, 2008Assignee: Sumco CorporationInventors: Senlin Fu, Naoki Ono
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Publication number: 20080241519Abstract: A layered semiconductor wafer contains the following layers in the given order: a monocrystalline substrate wafer (1) containing substantially silicon, a first amorphous intermediate layer (2) of an electrically insulating material having a thickness of 2 nm to 100 nm, a monocrystalline first oxide layer (3) having a cubic Ia-3 crystal structure, a composition of (M12O3)1-x(M22O3)x wherein each of M1 and M2 is a metal and wherein 0?x?1, and a lattice constant which differs from the lattice constant of the material of the substrate wafer by 0% to 5%. The invention also relates to a process for manufacturing such semiconductor wafers by epitaxial deposition.Type: ApplicationFiled: March 26, 2008Publication date: October 2, 2008Applicant: SILTRONIC AGInventors: Thomas Schroeder, Peter Storck, Hans-Joachim Muessig
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Patent number: 7429296Abstract: A photoconductive layer formed of a Bi12MO20 sintered body is manufactured without being fused with a setter. An oxide material in which a content of silicon oxide is 1 wt %, and more preferably, 0.3 wt % or less, is used as a setter which mounts a Bi12MO20 molded body (where M is at least one of Ge, Si and Ti) thereon.Type: GrantFiled: March 24, 2005Date of Patent: September 30, 2008Assignee: FUJIFILM CorporationInventors: Motoyuki Tanaka, Kiyoteru Miyake
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Publication number: 20080232761Abstract: The invention relates to methods of making optical waveguide structures by way of molecular beam epitaxy (MBE). The method comprises the steps of: (1) providing a single crystal substrate in an ultra-high vacuum (UHV) environment, wherein the single crystal substrate has a first index of refraction; (2) heating the single crystal substrate; (3) depositing an epitaxial oxide layer having a rare-earth dopant and a second index of refraction on the single crystal substrate, wherein the epitaxial oxide layer is deposited by way of at least first, second, and third molecular beam fluxes; and (4) depositing a cladding layer on the single crystal oxide layer, wherein the cladding layer has a third index of refraction that is the same or about the same as the first index of refraction of the single crystal substrate, and wherein the second index of refraction is greater than the first and third indexes of refraction.Type: ApplicationFiled: September 20, 2007Publication date: September 25, 2008Inventors: Raveen Kumaran, Shawn Penson, Ivan-Christophe Robin, Thomas Tiedje
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Publication number: 20080229999Abstract: A method for manufacturing calcium fluoride single crystal includes the step of cooling the calcium fluoride single crystal so that maximum shear stress inside the calcium fluoride single crystal caused by thermal stress is approximately equal to or smaller than critical resolved shear stress (?c) in a <1 1 0> direction of on a {0 0 1} plane of the calcium fluoride single crystal.Type: ApplicationFiled: May 2, 2008Publication date: September 25, 2008Applicant: CANON KABUSHIKI KAISHAInventor: Keita Sakai
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Patent number: 7419547Abstract: In a first exemplary embodiment of the present invention, a method is provided for marking a sample of a doped crystalline material. According to a feature of the present invention, the method comprises the steps of causing a controlled alteration to the crystalline material at a preselected spot on the sample of the crystalline material, sufficient to cause a change in a cathodoluminescence spectrum of the crystalline material at the preselected spot and utilizing the altered cathodoluminescence spectrum to mark the crystalline material.Type: GrantFiled: July 26, 2006Date of Patent: September 2, 2008Assignee: American Museum of Natural HistoryInventor: Jacob Louis Mey
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Publication number: 20080200327Abstract: The present invention provides a method of producing the barium titanate solid solution single crystals. The crystalline phase of the single crystal is hexagonal. The method of the present invention, a small quantity of metal oxide is added and dissolved into the barium titanate to form a solid solution. The metal oxides are used as single crystal growth aid; and the barium titanate single crystal can be prepared by using a pressureless sintering process composing of one or two stages of heat treatments that require no special expensive equipments, and thus the method can be used for the mass production of the single crystals.Type: ApplicationFiled: August 2, 2007Publication date: August 21, 2008Inventors: Wei-Hsing Tuan, Yung-Ching Huang
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Publication number: 20080190355Abstract: The invention relates to substrates of semi-insulating silicon carbide used for semiconductor devices and a method for making the same. The substrates have a resistivity above 106 Ohm-cm, and preferably above 108 Ohm-cm, and most preferably above 109 Ohm-cm, and a capacitance below 5 pF/mm2 and preferably below 1 pF/mm2. The electrical properties of the substrates are controlled by a small amount of added deep level impurity, large enough in concentration to dominate the electrical behavior, but small enough to avoid structural defects. The substrates have concentrations of unintentional background impurities, including shallow donors and acceptors, purposely reduced to below 5·1016 cm?3, and preferably to below 1·1016 cm?3, and the concentration of deep level impurity is higher, and preferably at least two times higher, than the difference between the concentrations of shallow acceptors and shallow donors.Type: ApplicationFiled: July 6, 2005Publication date: August 14, 2008Applicant: II-VI INCORPORATEDInventors: Jihong Chen, Ilya Zwieback, Avinash K. Gupta, Donovan L. Barrett, Richard H. Hopkins, Edward Semenas, Thomas A. Anderson, Andrew E. Souzis
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Publication number: 20080163813Abstract: An anneal of an epitaxially grown crystalline semiconductor layer comprising a combination of group-IV elements. The layer contains at least one of the group of carbon and tin. The layer of epitaxially grown material is annealed at a temperature substantially in a range of 1,000 to 1,400 degrees Celsius for a period not to exceed 100 milliseconds within 10% of the peak temperature. The anneal is performed for example with a laser anneal or a flash lamp anneal. The limited-time anneal may improve carrier mobility of a transistor.Type: ApplicationFiled: January 8, 2007Publication date: July 10, 2008Inventors: Stefan Zollner, Veeraraghavan Dhandapani, Paul A. Grudowski, Gregory S. Spencer
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Patent number: 7396404Abstract: The present disclosure provides methods for forging cylindrical alkali halide melt-grown single-crystal-type ingots into rectangular blocks. The resulting rectangular blocks are devoid of peripheral cracks and fissures, and possess uniform properties and reduced levels of impurities.Type: GrantFiled: November 17, 2006Date of Patent: July 8, 2008Assignee: Siemens Medical Solutions USA, Inc.Inventors: Olexy V. Radkevich, Efim Toutchinskii, Yuriy Yakovlev, Robert S. Zwolinski
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Patent number: 7393409Abstract: The method provides CaF2 single crystals with low scattering, small refractive index differences and few small angle grain boundaries, which can be tempered at elevated temperatures. In the method a CaF2 starting material is heat-treated for at least five hours at temperatures between 1000° C. and 1250° C. and then sublimed at a sublimation temperature of at least 1100° C. in a vacuum of at most 5*10?4 mbar to form a vapor. The vapor is condensed at a condensation temperature of at least 500° C., which is at least 20° C. below the sublimitation temperature, to form a condensate. Then a melt formed from the condensate is cooled in a controlled manner to obtain the single crystal, which is subsequently tempered. The method is preferably performed with a CaF2 starting material including waste material and cuttings from previously used melts.Type: GrantFiled: February 22, 2005Date of Patent: July 1, 2008Assignee: Schott AGInventors: Lars Ortmann, Joerg Kandler, Andreas Menzel, Matthias Mueller, Lutz Parthier, Gordon Von der Goenna
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Patent number: 7390359Abstract: A nitride semiconductor substrate having properties preferable for the manufacture of various nitride semiconductor devices is made available, by specifying or controlling the local variation in the off-axis angle of the principal surface of the nitride semiconductor substrate. In a nitride semiconductor single-crystal wafer having a flat principal surface, the crystallographic plane orientation of the principal surface of the nitride semiconductor single-crystal wafer varies locally within a predetermined angular range.Type: GrantFiled: December 19, 2006Date of Patent: June 24, 2008Assignee: Sumitomo Electric Industries, Ltd.Inventors: Michimasa Miyanaga, Koji Uematsu, Takuji Okahisa
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Patent number: 7381397Abstract: Methods and apparatus for preconditioning a lithium niobate or lithium tantalate crystal. At least a portion of a surface of the crystal is covered with a condensed material including one or more active chemicals. The crystal is heated in a non-oxidizing environment above an activating temperature at which the active chemicals contribute to reducing the crystal beneath the covered surface portion. The crystal is cooled from above the activating temperature to below a quenching temperature at which the active chemicals become essentially inactive for reducing the crystal.Type: GrantFiled: December 2, 2005Date of Patent: June 3, 2008Assignee: Crystal Technology, Inc.Inventors: Dieter Hans Jundt, Maria Claudia Custodio Kajiyama
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Publication number: 20080121817Abstract: An LuAP scintillation detector and a method for improving the light output and uniformity of an LuAP scintillator crystal is provided, wherein the method includes disposing the scintillator crystal in a predetermined environment at a threshold temperature to generate an initial scintillator crystal, annealing the initial scintillator crystal in the predetermined environment at the threshold temperature to create an annealed scintillator crystal and cooling the annealed scintillator crystal in the predetermined environment to a final temperature.Type: ApplicationFiled: November 27, 2006Publication date: May 29, 2008Applicant: SCHLUMBERGER TECHNOLOGY CORPORATIONInventors: Arthur J. Becker, Yanqi Wang, Bradley A. Roscoe, John Simonetti
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Publication number: 20080115721Abstract: The present disclosure provides methods for forging cylindrical alkali halide melt-grown single-crystal-type ingots into rectangular blocks. The resulting rectangular blocks are devoid of peripheral cracks and fissures, and possess uniform properties and reduced levels of impurities.Type: ApplicationFiled: November 17, 2006Publication date: May 22, 2008Inventors: Olexy V. Radkevich, Efim Toutchinskii, Yuriy Yakovlev, Robert S. Zwolinski
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Patent number: 7374612Abstract: A method of producing a lithium-tantalate crystal comprising, at least subjecting a single-polarized lithium-tantalate crystal wherein an optical absorption coefficient at a wave number of 3480 cm?1 is 0.3 cm?1 or less to a heat treatment under a reducing atmosphere at a temperature of not lower than 250° C. and not higher than Curie temperature and a single-polarized lithium-tantalate crystal wherein an optical absorption coefficient at a wave number of 3480 cm?1 is 0.3 cm?1 or less and an electric conductivity is 1×10?12 ??1·cm?1 or more. There can be provided a method of producing a single-polarized lithium-tantalate crystal in a short time efficiently wherein the surface charge generated due to a pyroelectric property can be decayed quickly by improving the electric conductivity and a single-polarized lithium-tantalate crystal.Type: GrantFiled: September 17, 2004Date of Patent: May 20, 2008Assignee: Shin-Etsu Chemical Co., Ltd.Inventor: Yoshiyuki Shiono
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Patent number: 7374955Abstract: The present invention provides a method of manufacturing a silicon wafer where a defect does not exist at a wafer surface layer part on which a device is formed, without affecting productivity and production costs of the wafer. An ingot of a silicon single crystal is grown by way of Czochralski single crystal pulling method, this silicon single crystal ingot is sliced to produce a wafer, then a surface layer of the wafer is annealed for between 0.01 microseconds and 10 seconds (inclusive) by means of a laser spike annealing apparatus such that a temperature of a wafer surface layer part is between 1250° C. and 1400° C. (inclusive).Type: GrantFiled: September 11, 2006Date of Patent: May 20, 2008Assignee: Covalent Materials CorporationInventor: Koji Izumome
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Patent number: 7374613Abstract: Disclosed is a ceramic or metal single-crystal material having high-density dislocations arranged one-dimensionally on respective straight lines. The single-crystal material is produced by compressing a ceramic or metal single-crystal blank at a high temperature from a direction allowing the activation of a single slip to induce plastic deformation therein, and then subjecting the resulting product to a heat treatment. The single-crystal material can be used in a device for high-speed dislocation-pipe diffusion of ions or electrons. The single-crystal material can further be subjected to a diffusion treatment so as to diffuse a metal element from its surface along the dislocations to provide a single-crystal device with a specific electrical conductivity or a quantum wire device.Type: GrantFiled: April 21, 2003Date of Patent: May 20, 2008Assignee: Japan Science and Technology AgencyInventors: Yuichi Ikuhara, Takahisa Yamamoto
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Publication number: 20080113171Abstract: Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ?20 ?m below the wafer surface in the range of 5×1011/cm3, and a density of BMDs with sizes of ?300 nm?1×107/cm3, exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.Type: ApplicationFiled: September 19, 2007Publication date: May 15, 2008Applicant: SILTRONIC AGInventors: Katsuhiko Nakai, Wilfried von Ammon, Sei Fukushima, Herbert Schmidt, Martin Weber
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Patent number: 7371619Abstract: In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 ?m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.Type: GrantFiled: March 12, 2001Date of Patent: May 13, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Patent number: 7361217Abstract: Method for crystallizing a melamine melt to form melamine particles with a D90 of at most 2 mm by cooling a melamine melt to below the crystallization temperature of the melamine, comprising the formation of a suspension of melamine particles in the cooling medium by spraying the melamine melt with at most 10 wt % of CO2 relative to the sprayed quantity of melamine melt in a space in which a layer of a liquid cooling medium is present that has a temperature below the crystallization temperature of the melamine and under cooling conditions at which at least 50 wt % of the sprayed melamine melt directly turns into suspended melamine particles. Method for the production of melamine from urea in a preferably continuous, high-pressure process, with application of the present method for the crystallization.Type: GrantFiled: January 28, 2004Date of Patent: April 22, 2008Assignee: DSM IP Assets B.V.Inventor: Tjay Tjien M. Tjioe
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Patent number: 7357838Abstract: A method of forming a strained silicon layer on a relaxed, low defect density semiconductor alloy layer such as SiGe is provided.Type: GrantFiled: March 8, 2005Date of Patent: April 15, 2008Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Chun Chieh Lin, Yee-Chia Yeo, Chien-Chao Huang, Chao-Hsiung Wang, Tien-Chih Chang, Chenming Hu, Fu-Liang Yang, Shih-Chang Chen, Mong-Song Liang, Liang-Gi Yao
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Patent number: 7341628Abstract: Gallium Nitride layers grown as single crystals by epitaxy such as Hydride Vapor Phase Epitaxy (HVPE) contain large numbers of crystal defects such as hexagonal pits, which limit the yield and performance of opto- and electronic devices. In this method, the Gallium Nitride layer is first coated with an Aluminum layer of approximate thickness of 0.1 microns. Next, Nitrogen is ion implanted through the Aluminum layer so as to occupy mostly the top 0.1 to 0.5 microns of the Gallium Nitride layer. Finally, through a pulsed directed energy beam such as electron or photons, with a fluence of approximately 1 Joule/cm2 the top approximately 0.5 microns are converted to a single crystal with reduced defect density.Type: GrantFiled: December 16, 2004Date of Patent: March 11, 2008Inventor: Andreas A. Melas
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Patent number: 7338554Abstract: The invention relates to a process for synthesizing nanorods of a carbide of one metal M1 on a substrate, which comprises: a) the deposition, on the substrate, of a layer of nanocrystals of oxide of the metal M1 and nanocrystals of oxide of at least one metal M2 different from metal M1, the M1 metal oxide nanocrystals being dispersed within this layer; b) the reduction of the M1 and M2 metal oxide nanocrystals into corresponding metal nanocrystals; and c) the selective growth of the M1 metal nanocrystals. The invention also relates to a process for growing nanorods of a carbide of one metal M1 on a substrate from nanocrystals of this metal, to the substrates thus obtained and to their applications: fabrication of Microsystems provided with chemical or biological functionalities, in particular the fabrication of biosensors; electron emission sources, for example for flat television or computer screens; etc.Type: GrantFiled: December 4, 2003Date of Patent: March 4, 2008Assignee: Commissariat a L'Energie AtomiqueInventors: Marc Delaunay, Francoise Vinet