Gallium Arsenide Containing (e.g., Gaalas, Gaas) {c30b 29/42} Patents (Class 117/954)
  • Patent number: 5716449
    Abstract: An optical dome or window formed of a composition which is transmissive to infrared frequencies in the range of from about 1 micron to about 14 microns and which is relatively opaque to substantially all frequencies above about 14 microns consisting essentially of a compound taken from the class consisting of group III-V compounds doped with an element taken from the class consisting of shallow donors and having less than about 1.times.10.sup.7 atoms/cc impurities and having less than about 1.times.10.sup.15 parts carbon. The shallow donors are Se, Te and S, preferably Se, with the Se concentration from 5.times.10.sup.15 atoms/cc to 2.times.10.sup.16 atoms/cc. The group III-V compound is preferably GaAs or GaP.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 10, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Paul Klocek
  • Patent number: 5702822
    Abstract: A method for producing a single crystal, which comprises (1) placing a metal layer as a pattern at a desired position on the surface of a single crystal substrate, (2) etching the surface of the single crystal substrate around the pattern, and (3) in a raw material gas atmosphere containing an element or elements constituting the single crystal, taking the element or elements in the metal layer at the pattern and permitting a needle-like single crystal to grow perpendicularly.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: December 30, 1997
    Assignee: Denki Kagaku Kogyo Kabushiki Kaisha
    Inventors: Yoshinori Terui, Ryuichi Terasaki
  • Patent number: 5693139
    Abstract: A cycle of alternately or cyclically introducing external gases containing molecules of component elements of a compound semiconductor to be formed on a substrate is repeated while appropriately controlling the pressure, substrate temperature and gas introduction rate in a crystal growth vessel, so that a monocrystal which is dimensionally as precise as a single monolayer can grow on the substrate by making use of chemical reactions on the heated substrate surface.Doped molecular layer epitaxy of a compound semiconductor comprising individual steps of introducing and evacuating a first source gas, introducing and evacuating a second source gas, and introducing and evacuating an impurity gas which contains an impurity element. The doped impurity concentration varies almost linearly with the pressure during doping in a wide range.
    Type: Grant
    Filed: June 15, 1993
    Date of Patent: December 2, 1997
    Assignees: Research Development Corporation of Japan, Jun-Ichi Nishizawa, Oki Electric Company, Soubei Suzuki
    Inventors: Junichi Nishizawa, Hitoshi Abe, Soubei Suzuki
  • Patent number: 5656540
    Abstract: On a surface of a p-type GaAs (111)B substrate 11, a mesa groove is formed along a [211]A direction. TDMAAs as a group V material and TMGa as a group III material are supplied at 8.times.10.sup.-3 Pa and 8.times.10.sup.-4 Pa, respectively, to grow n-type GaAs 13 dominantly on a side surface of a mesa 12. Subsequently, the group V material is changed to metal As. As.sub.4 and MAGa are supplied at 5.times.10.sup.-3 Pa and 8.times.10.sup.-4 Pa, respectively, to grow p-type GaAs 14 only on a side surface of the GaAs 13. Then, the group V material is again changed to TDMAAs. TDMAAs and TMGa are supplied both at 8.times.10.sup.-4 Pa to grow p-type GaAs 15.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: August 12, 1997
    Assignee: Optoelectronics Technology Research Corporation
    Inventors: Yasuhiko Nomura, Shigeo Goto, Yoshitaka Morishita
  • Patent number: 5639299
    Abstract: The disclosed method of making a compound semiconductor single-crystalline substrate for liquid phase epitaxial growth has a relatively low cost and excellent practicality. The compound semiconductor single-crystalline substrate is prepared to have a surface roughness of at least 1 .mu.m and not more than 10 .mu.m as measured over a line of 1 mm length. This substrate is employed as a substrate for an epitaxial wafer for an infrared- or visible light-emitting diode. Due to its particular roughness, the substrate can be prevented from slipping or falling while it is transported during processing. Furthermore, no lapping and polishing are required for manufacturing the substrate. Thus, the substrate for liquid phase epitaxial growth can be provided at a relatively low cost.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: June 17, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tetsuya Inoue, Makoto Otsuki, Tetsuichi Yokota
  • Patent number: 5622559
    Abstract: The vapor phase growth method of the group III-V compound semiconductor thin-film, using hydrides and organic metals containing no halogen elements as a raw material for the growth, is disclosed. The method is carried out by alternately introducing group III organic metals raw material gas as well as halides gas and/or halogens gas into a growth chamber, and also by repeating the introducing to grow a thin-film. In accordance with the present invention, it is possible to obtain such high-quality crystal growth as the planarization of hetero junction interface, the improvement of surface morphology or facet, and no deposit of polycrystals on the mask in a wide range.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: April 22, 1997
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Hideki Goto, Katsushi Fujii, Kenji Shimoyama
  • Patent number: 5603764
    Abstract: A process for crystal growth of III-V group compound semiconductor, which comprises pyrolyzing, in a gas phase, a material consisting of an organometallic compound and/or a hydride in the presence of an organic compound containing an oxygen atom-carbon atom direct bond, used as a dopant to grow a III-V group compound semiconductor crystal layer containing at least aluminum, of high electric resistance. Said process can grow a compound semiconductor layer of high electric resistance by the use of a dopant which enables the independent controls of oxygen concentration and aluminum concentration and which has a small effect of oxygen remaining.
    Type: Grant
    Filed: January 5, 1995
    Date of Patent: February 18, 1997
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshinobu Matsuda, Masahiko Hata, Noboru Fukuhara, Toshio Ishihara
  • Patent number: 5599389
    Abstract: According to this invention, there is provided a compound semiconductor substrate including, on a compound semiconductor base containing a high-concentration impurity, a high-resistance single-crystal layer consisting of the same compound semiconductor as the compound semiconductor constituting the base. Active elements are formed in the high-resistance single-crystal layer.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: February 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Iwasaki
  • Patent number: 5591260
    Abstract: The invention provides a method for growing GaAs crystals wherein GaAs crystal growth is carried out by means of an equipment by which Indium containing crystals were grown before carrying out the GaAs crystal growth, and the GaAs crystal growth is caused by thermal organic metal decomposition technique using trimethyl gallium as a source of gallium (Ga).
    Type: Grant
    Filed: September 9, 1994
    Date of Patent: January 7, 1997
    Assignee: NEC Corporation
    Inventor: Tadahiko Kishi
  • Patent number: 5580382
    Abstract: An process for efficient controlled N-type silicon doping of Group III-V materials. Through the present invention silicon may be introduced into Group III-V materials at incorporation efficiencies in excess of 10.sup.-4. In a preferred embodiment doping with silicon tetrabromide attains incorporation efficiencies of approximately 0.37. Silicon incorporation efficiencies of approximately 1 should be obtained using silicon tetraiodide. The silicon dopant sources of the present invention may be used to accurately selectively produce net electron concentrations varying from approximately 1.times.10.sup.16 to 1.2.times.10.sup.20 cm.sup.-3. Favorable room temperature vapor pressures of the dopants used in accordance with the present invention allow for production of abrupt doping profiles. Additionally, high photoluminescence peak values, and low contact and sheet resistances are obtained through the present invention.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: December 3, 1996
    Assignee: Board of Trustees of the University of Illinois
    Inventors: Steven L. Jackson, Gregory E. Stillman
  • Patent number: 5578521
    Abstract: A silicon semiconductor substrate, on which an epitaxial layer is to be formed, is set in a reaction vessel having a heating mechanism, and a gas containing TMG and AsH.sub.3 is introduced into the reaction vessel with the substrate heated to 450.degree. C., thus forming, on the substrate, a low-temperature growth layer of amorphous or polycrystalline GaAs as a semiconductor substance having a different lattice constant from that of the substrate. Then, with the TMG removed from the introduced gas, the temperature of the semiconductor substrate is increased to 750.degree. C., to cause coagulation of atoms of the low-temperature growth layer, with a thermal treatment also being performed at this high temperature, to cause growth of island-like single crystal cores. Further, a high temperature growth process is conducted in a material gas atmosphere containing TMG, whereby a GaAs film is epitaxially grown on the semiconductor substrate surface.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: November 26, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Takamasa Suzuki, Kunihiko Hara, Hajime Inuzuka, Naomi Awano, Kouichi Hoshino
  • Patent number: 5549749
    Abstract: The invention provides a semiconductor substrate comprising a substrate of a first material and a crystal growth layer formed on the substrate, the crystal growth layer being made of compound semiconductors different from the first material wherein the substrate has a surface diffusion region being heavily doped with one or more elements of the compound semiconductors. A silicon substrate receives an ion-implantation of one or more elements constituting a compound semiconductor different except for silicon at a high impurity concentration for a heat treatment at a higher temperature than a growth temperature of the compound semiconductor and subsequent cooling down to the growth temperature of the compound semiconductor followed by crystal growth of the compound semiconductor on the substrate.
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: August 27, 1996
    Assignee: NEC Corporation
    Inventor: Shuji Asai
  • Patent number: 5542373
    Abstract: A method of manufacturing GaAs single crystals in which gas in the vicinity of the surface of a substrate crystal is irradiated with light so as to an epitaxial growth of GaAs single crystals may be enabled by the halogen transport method under such condition that the temperature of the substrate crystal is lowered less than 700.degree. C.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: August 6, 1996
    Assignees: Research Development Corporation of Japan, Junichi Nishizawa, Yoshihiro Kokubun
    Inventors: Junichi Nishizawa, Yoshihiro Kokubun
  • Patent number: 5538702
    Abstract: A method for the treatment of a stream of exhaust gases including phosphine in which the stream is heated to a sufficiently high temperature to decompose the phosphine to phosphorus vapor and the stream is then passed into a reactor containing calcium oxide heated to above about 100.degree. C. An oxygen containing stream is also passed into the reactor.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: July 23, 1996
    Assignee: The BOC Group plc
    Inventors: James R. Smith, Peter L. Timms
  • Patent number: 5537951
    Abstract: A crystal growth method is based on a molecular beam epitaxy method. The crystal growth method includes the steps of opening/closing a shutter member provided between a deposition source and a substrate in an ultra-high vacuum so as to form a region having a predetermined pattern on the substrate and forming a crystal growth layer only in the region having the pattern on the substrate during an epitaxial growth step.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: July 23, 1996
    Assignee: NEC Corporation
    Inventor: Hideaki Saito
  • Patent number: 5494521
    Abstract: Herein disclosed is a vapor growth system, in which the number of dummy lines is reduced to decrease the number of lines led into a valve system, thereby enabling thin film growth having a good interfacial steepleness. The system comprising gas supplying lines A70, B71 and C72, which are made up of AsH.sub.3 process gas lines A62, B65, C68 and balance lines A61, B64 and C67, respectively. The balance lines A61, B64 and C67 contributes equalization of products of the viscosity and the flow rate in the gas supplying lines A70, B71 and C72, and the dummy line 60. Only when AsH.sub.3 (A), AsH.sub.3 (B) and AsH.sub.3 gases are not fed upon formation of the film growth, the dummy line 60 is connected to the main line. Whereby, the system is free from pressure fluctuation of the gas in the main line, with an arrangement of even a single dummy line.
    Type: Grant
    Filed: March 25, 1994
    Date of Patent: February 27, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Otsuka, Yasushi Matsui
  • Patent number: 5483919
    Abstract: An atomic layer epitaxy method uses an organometal consisting of a metal and an alkyl group and having a self-limiting mechanism. At least one bond between the metal and the alkyl group of the organometal is dissociated, and organometal molecules consisting of the metal and the alkyl group, and a hydride or organometal molecules consisting of a different metal are alternately supplied on a substrate while at least one bond is left, thereby growing an atomic layer on the substrate. An atomic layer epitaxy apparatus is also disclosed.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: January 16, 1996
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Haruki Yokoyama, Masanori Shinohara
  • Patent number: 5458084
    Abstract: X-ray wave diffraction devices are constructed using atomic layer epetaxy. A crystalline substrate is prepared with one or more surface areas on which multiple pairs of layers of material are to be deposited. These layers are then formed by atomic layer epetaxy on the surface areas of the substrate, one on top of another, with the material of each layer of each pair being selected to have a different index of refraction from that of the material of the other layer of each pair. The layers are formed so that the thickness of each layer of a pair is substantially the same as that of the corresponding layer of every other pair and so that x-ray waves impinging on the layers may be reflected therefrom. Layer pairs having a thickness of about 20 angstroms or less are formed on the substrate.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: October 17, 1995
    Assignee: Moxtek, Inc.
    Inventors: James M. Thorne, James K. Shurtleff, David D. Allred, Raymond T. Perkins
  • Patent number: 5459097
    Abstract: In accordance with the invention, aluminum-containing layers are grown by molecular beam processes using as an arsenic precursor phenylarsine (PhAs). Because PhAs is more reactive than arsine and less reactive than arsenic, it decomposes selectively on III-V surfaces but not on mask materials. Thus in contrast to conventional processes, growth using PhAs permits selective growth on unmasked gallium arsenide surfaces but inhibits growth on typical mask materials such as silicon nitride.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: October 17, 1995
    Assignee: AT&T Corp.
    Inventors: Cammy R. Abernathy, Stephen J. Pearton, Fan Ren, Patrick W. Wisk
  • Patent number: 5456207
    Abstract: Triisopropylindium diisopropyltelluride adduct, ((CH.sub.3).sub.2 CH).sub.3 In:Te(CH(CH.sub.3).sub.2).sub.2 is synthesized and is used as a universal n-type dopant for both II/VI semiconductor materials as well as III/V semiconductor materials is disclosed. This dopant precursor is particularly suited for indium doping of II/V semiconductor materials at low carrier concentrations down to 10.sup.14 cm.sup.-3 and does not exhibit an appreciable memory effect.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: October 10, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Robert W. Gedridge, Jr., Ralph Korenstein, Stuart J. C. Irvine
  • Patent number: 5438952
    Abstract: A method of fabricating a compound semiconductor device includes the steps of supplying an amine-adduct of a compound that contains a constituent element of a crystal layer that forms the semiconductor device, to a substrate on which the semiconductor device is formed, as a source material of the crystal layer, decomposing the amine-adduct in the vicinity of the substrate such that the constituent element is released, and depositing the constituent element on the substrate to cause a growth of the crystal layer on the substrate.
    Type: Grant
    Filed: January 31, 1994
    Date of Patent: August 8, 1995
    Assignee: Fujitsu Limited
    Inventor: Nobuyuki Otsuka
  • Patent number: 5374472
    Abstract: A ferromagnetic .delta.-Mn.sub.1-x Ga.sub.x thin film having perpendicular anisotropy is described which comprises: (a) a GaAs substrate, (b) a layer of undoped GaAs overlying said substrate and bonded thereto having a thickness ranging from about 50 to about 100 nanometers, (c) a layer of .delta.-Mn.sub.1-x Ga.sub.x overlying said layer of undoped GaAs and bonded thereto having a thickness ranging from about 20 to about 30 nanometers, and (d) a layer of GaAs overlying said layer of .delta.-Mn.sub.1-x Ga.sub.x and bonded thereto having a thickness ranging from about 2 to about 5 nanometers, wherein x is 0.4 .+-.0.05.
    Type: Grant
    Filed: January 4, 1994
    Date of Patent: December 20, 1994
    Assignee: The Regents, University of California
    Inventor: Kannan M. Krishnan
  • Patent number: 5354412
    Abstract: A process for epitaxially growing a compound semiconductor layer containing at least arsenic on a single crystal silicon substrate, which prevents the silicon impurity from intruding said compound semiconductor layer. The process comprises supplying one of the starting material gas, ASH.sub.3, into the reaction furnace to effect growth, but in such a manner that the AsH.sub.3 gas is pyrolyzed in advance to thereby supply arsenic alone either in an atomic or a molecular state. The GaAs layer is thus epitaxially grown on a single crystal silicon substrate in the crystal growing chamber, i.e., the reaction furnace in the apparatus, under an atmosphere comprising atomic or molecular arsenic at a temperature in the range of from 400.degree. to 650.degree. C. and at a vacuum degree of about 0.1 Pa. By thus epitaxially growing GaAs layer under an atmosphere comprising atomic or molecular arsenic, the intrusion of silicon impurity into the GaAs layer during its growth can be effectively prevented.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: October 11, 1994
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Koki Mizuno
  • Patent number: 5348911
    Abstract: Disclosed is a process for fabricating mixed crystals and, in particular, III-V semiconductors, in which at least one component of the composition of the mixed crystal is transferred in a reactor from a source into a vapor phase containing hydrogen and chloride compounds as well as a carrier gas and mixed with said component or other components of said composition of said mixed crystal, transported to a substrate and precipitated on said substrate. The invented process is distinguished in that in order to vary the growth rate between approximately 1 <m/h and approximately 500 <m/h, the overall pressure is varied between approximately 80 mbar and approximately 1 mbar.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: September 20, 1994
    Assignee: Aixtron GmbH
    Inventors: Holger Jurgensen, Klaus Gruter, Marc Deschler, Pieter Balk
  • Patent number: 5342475
    Abstract: Disclosed is a method of growing a single crystal of a compound semiconductor, in which a compound semiconductor material is loaded in a vertical crucible and the compound semiconductor material is converted into a single crystal by utilizing a seed disposed in the center of the bottom portion of the vertical crucible.
    Type: Grant
    Filed: June 3, 1992
    Date of Patent: August 30, 1994
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Seikoh Yoshida, Toshio Kikuta
  • Patent number: 5338389
    Abstract: In a method of epitaxially growing a compound crystal, a plurality of crystal component gasses of a compound and reaction gas chemically reacting with the crystal component gasses are individually directed, in the predetermined order, onto a substrate crystal heated under vacuum. The crystal compound gasses and the reaction gas may be overlapped with each other. In a doping method in the above-described epitaxial growth method, the crystal component gasses and the compound gas of dopant are directed onto the substrate crystal and, subsequently, reaction gas, which chemically reacts with the compound gasses, is directed onto the substrate crystal. Also in this case, the reaction gas may be in overlapped relation to the component gas of dopant.
    Type: Grant
    Filed: April 21, 1993
    Date of Patent: August 16, 1994
    Assignee: Research Development Corporation of Japan
    Inventors: Jun-ichi Nishizawa, Toru Kurabayashi
  • Patent number: 5312506
    Abstract: There is here provided a method for growing single crystals from a melt which comprises the steps of preparing a double structure crucible constituted of an inner tube and an outer tube; placing a raw material in the inner tube; hermetically sealing the outer tube; and heating/melting the raw material to perform crystal growth.According to the present invention, it is possible to hermetically confine and to crystallize the raw material even at a high temperature.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: May 17, 1994
    Assignee: Mitsui Mining Company, Limited
    Inventor: Akira Omino
  • Patent number: 5308444
    Abstract: The invention is predicated upon the discovery by applicants that exposure of a Ge surface to arsenic produces a drastic change in the step structure of the Ge surface. Subsequent exposure to Ga and growth of GaAs produces three-dimensional growth and a high threading dislocation density at the GaAs/Ge interface. However exposure of the Ge surface to Ga does not substantially change the Ge step structure, and subsequent growth of GaAs is two-dimensional with little increase in threading dislocation density. Thus a high quality semiconductor heterostructure of gallium arsenide on germanium can be made by exposing a germanium surface in an environment substantially free of arsenic, depositing a layer of gallium on the surface and then growing a layer of gallium arsenide. The improved method can be employed to make a variety of optoelectronic devices such as light-emitting diodes.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 3, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: Eugene A. Fitzgerald, Jr., Jenn-Ming Kuo, Paul J. Silverman, Ya-Hong Xie
  • Patent number: 5308433
    Abstract: Herein disclosed is a vapor growth system, in which the number of dummy lines is reduced to decrease the number of lines led into a valve system, thereby enabling thin film growth having a good interfacial steepleness. The system comprising gas supplying lines A70, B71 and C72, which are made up of AsH.sub.3 process gas lines A62, B65, C68 and and balance lines A61, B64 and C67, respectively. The balance lines A61, B64 and C.sub.67 contributes equalization of products of the viscosity and the flow rate in the gas supplying lines A70, B71 and C72, and the dummy line 60. Only when AsH.sub.3 (A), AsH.sub.3 (B) and AsH.sub.3 gases are not fed upon formation of the film growth, the dummy line 60 is connected to the main line. Whereby, the system is free from pressure fluctuation of the gas in the main line, with an arrangement of even a single dummy line.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: May 3, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Otsuka, Yasushi Matsui