With Mechanical Mask, Shield Or Shutter For Shielding Workpiece Patents (Class 156/345.3)
  • Publication number: 20140273494
    Abstract: According to one embodiment, a parallel plate dry etching apparatus includes: a lower electrode; an upper electrode having a plurality of etching gas supply ports in the lower surface; a reaction chamber including the lower and the upper electrode and having an exhaust port; a flow guide plate disposed in a ring form in an upper portion of a space between a side wall of the reaction chamber and a side wall of the lower electrode, the flow guide plate having a plurality of vent holes; and a pair of shield plates disposed to face the flow guide plate in the space, the pair of shield plates blocking the etching gas passing through part of the plurality of vent holes, and the pair of shield plates facing the lower electrode in a first direction parallel to the upper surface of the lower electrode.
    Type: Application
    Filed: July 23, 2013
    Publication date: September 18, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shingo HONDA
  • Patent number: 8834674
    Abstract: According to one embodiment, a plasma etching apparatus includes an electrode to which a high-frequency voltage is applied, having an upper surface along which a processing target substrate is to be placed, and having an inclined side, and an electrode cover provided along the side of the electrode.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: September 16, 2014
    Assignees: Kabushiki Kaisha Toshiba, Shibaura Mechatronics Corporation
    Inventors: Takeharu Motokawa, Hidehito Azumano
  • Publication number: 20140256144
    Abstract: A mask set and method for forming FinFET semiconductor devices provides a complementary set of fin-cut masks that are used in DPT (double patterning technology) to remove fins from non-active areas of a semiconductor device, after the fins are formed. Adjacent fins, or adjacent groups of fins, are removed using pattern features from different ones of the multiple fin-cut masks.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Chun LO, Min-Hung CHENG, Hsiao-Wei SU, Jeng-Shiun HO, Ching-Che TSAI, Cheng-Cheng KUO, Hua-Tai LIN, Chia-Chu LIU, Kuei-Shun CHEN
  • Publication number: 20140255831
    Abstract: The invention refers to a method and apparatus for protecting a substrate during a processing by at least one particle beam. The method comprises the following steps: (a) applying a locally restrict limited protection layer on the substrate; (b) etching the substrate and/or a layer arranged on the substrate by use of the at least one particle beam and at least one gas; and/or (c) depositing material onto the substrate by use of the at least one particle beam and at least one precursor gas; and (d) removing the locally limited protection layer from the substrate.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 11, 2014
    Inventors: Thorsten Hofmann, Tristan Bret, Petra Spies, Nicole Auth, Michael Budach, Dajana Cujas
  • Patent number: 8821683
    Abstract: A substrate processing apparatus includes a plasma source facing a substrate, and a shielding member placed between the substrate and the plasma source. The plasma source diffuses a plasma radially and the shielding member has a through hole through which a part of the radially diffused plasma passes. A substrate processing method is used for performing a plasma processing on a substrate in a substrate processing apparatus including a plasma source facing the substrate and a shielding member placed between the plasma source and the substrate. The shielding member has a through hole. The method includes the step of diffusing a plasma radially by the plasma source.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: September 2, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Hirayama, Kazuya Nagaseki
  • Publication number: 20140231913
    Abstract: Improved sidewall image transfer (SIT) techniques are provided. In one aspect, a SIT method includes the following steps. An oxide layer is formed on a substrate. A transfer layer is formed on a side of the oxide layer opposite the substrate. A mandrel layer is formed on a side of the transfer layer opposite the oxide layer. The mandrel layer is patterned to form at least one mandrel. Sidewall spacers are formed on opposite sides of the at least one mandrel. The at least one mandrel is removed, wherein the transfer layer covers and protects the substrate during removal of the at least one mandrel. The transfer layer is etched using the sidewall spacers as a hardmask to form a patterned transfer layer. The oxide layer and the sidewall spacers are removed from the substrate. The substrate is etched using the patterned transfer layer as a hardmask.
    Type: Application
    Filed: February 15, 2013
    Publication date: August 21, 2014
    Applicant: International Business Machines Corporation
    Inventor: Effendi Leobandung
  • Publication number: 20140235063
    Abstract: An edge ring assembly is disclosed for use in a plasma processing chamber, which includes an RF conductive ring positioned on an annular surface of a base plate and configured to surround an upper portion of the baseplate and extend underneath an outer edge of a wafer positioned on the upper surface of the baseplate, and a wafer edge protection ring positioned above an upper surface of the RF conductive ring and configured to extend over the outer edge of the wafer. The protection ring has an inner edge portion with a uniform thickness, which extends over the outer edge of the wafer, a conical upper surface extending outward from the inner edge portion to a horizontal upper surface, an inner annular recess which is positioned on the upper surface of the RF conductive and configured to extend over the outer edge of the wafer.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 21, 2014
    Applicant: Lam Research Corporation
    Inventors: Brian McMillin, Arthur Sato, Neil Benjamin
  • Patent number: 8807075
    Abstract: A shutter disk having a tuned coefficient of thermal expansion is provided herein. In some embodiments, a shutter disk having a tuned coefficient of thermal expansion may include a body formed from a first material comprising at least two components, wherein a ratio of each of the at least two components to one another is selected to provide a coefficient of thermal expansion of the body that is substantially similar to a coefficient of thermal expansion of a second material to be deposited atop the body.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: August 19, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Karl Brown
  • Patent number: 8801894
    Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Patent number: 8795466
    Abstract: Apparatus and methods are provided that enable processing of patterned layers on substrates using a detachable mask. Unlike prior art where the mask is formed directly over the substrate, according to aspects of the invention the mask is made independently of the substrate. During use, the mask is positioned in close proximity or in contact with the substrate so as to expose only portions of the substrate to processing, e.g., sputtering or etch. Once the processing is completed, the mask is moved away from the substrate and may be used for another substrate. The substrate may be cycled for a given number of substrates and then be removed for cleaning or disposal.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 5, 2014
    Assignee: Intevac, Inc.
    Inventors: Michael S. Barnes, Terry Bluck
  • Publication number: 20140213041
    Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Wei-Sheng LEI, Saravjeet SINGH, Jivko DINEV, Aparna IYER, Brad EATON, Ajay KUMAR
  • Publication number: 20140213042
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 ?m thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Wei-Sheng LEI, Aparna IYER, Brad EATON, Madhava Rao YALAMANCHILI, Ajay KUMAR
  • Publication number: 20140212994
    Abstract: Embodiments of the present disclosure generally provide apparatus and method for improving processing uniformity by reducing external magnetic noises. One embodiment of the present disclosure provides an apparatus for processing semiconductor substrates. The apparatus includes a chamber body defining a vacuum volume for processing one or more substrate therein, and a shield assembly for shielding magnetic flux from the chamber body disposed outside the chamber body, wherein the shield assembly comprises a bottom plate disposed between the chamber body and the ground to shield magnetic flux from the earth.
    Type: Application
    Filed: January 23, 2014
    Publication date: July 31, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Hun Sang KIM, Sang Wook KIM, Anisul H. KHAN
  • Publication number: 20140202632
    Abstract: Methods of treating the surface of a metal-containing hardmask used in the manufacture of semiconductors by contacting the hardmask surface with a composition capable of adjusting the water contact angle so as to substantially match that of subsequently applied organic coatings are provided.
    Type: Application
    Filed: January 19, 2013
    Publication date: July 24, 2014
    Applicant: ROHM AND HAAS ELECTRONIC MATERIALS LLC
    Inventors: Deyan WANG, Peter TREFONAS, III, Jieqian ZHANG, Peng-Wei CHUANG
  • Publication number: 20140196848
    Abstract: Shutter disks for use in process chambers are provided herein. In some embodiments, a shutter disk for use in a process chamber may include a body having an outer perimeter, a top surface of the body, wherein the top surface includes a central portion having a substantially horizontal planar surface, and at least one angled structure disposed radially outward of the central portion, each of the at least one angled structure having a top portion and an angled surface disposed at a downward angle in a radially outward direction from the top portion toward the outer perimeter, and a bottom surface of the body.
    Type: Application
    Filed: January 16, 2013
    Publication date: July 17, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: BONNIE T. CHIA, SONG-MOON SUH, CHENG-HSIUNG MATTHEW TSAI, ROBERT DINSMORE, GLEN T. MORI
  • Publication number: 20140197133
    Abstract: The invention provides compositions and methods for inducing and enhancing order and nanostructures in organosilicon block copolymers compositions by including certain organic additives in such compositions that include one or more moieties comprising a hydrogen bond acceptor or a hydrogen bond donor. Such block copolymer compositions may be used, for example, as a mask for lithographic patterning as is used, for example, during various stages of semiconductor device fabrication.
    Type: Application
    Filed: January 13, 2014
    Publication date: July 17, 2014
    Inventors: Damien Montarnal, Craig J. Hawker, Edward J. Kramer, Glenn H. Fredrickson
  • Publication number: 20140193973
    Abstract: A method forms interlayer connectors extending to conductive layers of a stack of W conductive layers interleaved with dielectric layers. The stack is etched to expose landing areas at W?1 conductive layers using a set of M etch masks. For each etch mask m, m going from 0 to M?1, there is a first etching step, at least one mask trimming step, and a subsequent etching step following each trimming step. The etch mask may cover Nm+1 of the landing areas and the open etch region may cover Nm of the landing areas. N equals 2 plus the number of trimming steps. The trimming step may be carried out so that the increased size open etch region overlies an additional 1/N of the landing areas. Part of the stack surface may be shielded during the removing step to create dummy areas without contact openings.
    Type: Application
    Filed: January 7, 2013
    Publication date: July 10, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Shih-Hung CHEN
  • Publication number: 20140190632
    Abstract: A method and apparatus for etching photomasks is provided herein. In one embodiment, a method of etching a photomask includes providing a process chamber having a substrate support pedestal adapted to receive a photomask substrate thereon. An ion-radical shield is disposed above the pedestal. A substrate is placed upon the pedestal beneath the ion-radical shield. A process gas is introduced into the process chamber and a plasma is formed from the process gas. The substrate is etched predominantly with radicals that pass through the shield.
    Type: Application
    Filed: October 9, 2013
    Publication date: July 10, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Ajay KUMAR, Madhavi CHANDRACHOOD, Scott Alan ANDERSON, Peter SATITPUNWAYCHA, Wai-Fan YAU
  • Patent number: 8771483
    Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: July 8, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Rick Endo, Kurt Weiner, Indranil De, James Tsung, Maosheng Zhao, Jeremy Cheng
  • Publication number: 20140183161
    Abstract: Embodiments provided herein describe methods and systems for processing substrates. A substrate processing tool includes a housing having a sidewall and a lid. The housing defines a processing chamber. A substrate support is configured to support a substrate within the processing chamber. A plasma generation source is coupled to the housing and in fluid communication with the processing chamber through the lid of the housing. The plasma generation source is configured to provide a plasma activated species into the processing chamber. A mask is positioned within the processing chamber to at least partially shield the substrate from the plasma activated species. The mask includes a plurality of openings configured such that when the mask is in first and second positions, the plasma activated species passes through a respective first and second of the plurality of openings and causes first and second regions on the substrate to be processed.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Applicant: INTERMOLECULAR, INC.
    Inventors: Sandip Niyogi, James Tsung, J. Watanabe
  • Publication number: 20140175051
    Abstract: The embodiments disclose a method of creating a mask by depositing a protection layer that mechanically strengthens patterned features that are imprinted into a resist layer that is deposited onto a magnetic layer, implanting mechanically strengthened patterned resist layer features into the magnetic layer using ion implantation and removing the resist layer and the mask to expose at least a portion of the magnetic layer.
    Type: Application
    Filed: March 12, 2013
    Publication date: June 26, 2014
    Inventors: Michael Feldbaum, Koichi Wago, David Kuo
  • Patent number: 8758581
    Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: June 24, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Rick Endo, Kurt Weiner, Indranil De, James Tsung, Maosheng Zhao, Jeremy Cheng
  • Publication number: 20140158300
    Abstract: This invention provides a protective sheet for glass etching, having excellent etching solution penetration resistance, non-contaminating property and peeling efficiency. The protective sheet comprises a substrate and a PSA layer provided on one face of the substrate, such that, when the protective sheet is adhered to a non-etching area when etching glass, it protects the non-etching area from an etching solution. The PSA layer is constituted with a PSA having a gel fraction of 60% or higher. The PSA is an acrylic PSA comprising an acrylic polymer as a primary component. The acrylic polymer is synthesized by polymerizing starting monomers comprising, as a primary monomer, a monomer represented by a formula: CH2?CR1COOR2 (R1 is a hydrogen atom or a methyl group, and R2 is an alkyl group). The primary monomer comprises as a primary component a monomer with R2 being an alkyl group having 6 or more carbons.
    Type: Application
    Filed: June 8, 2012
    Publication date: June 12, 2014
    Applicants: NITTO DENKO (TAIWAN) CORPORATION, NITTO DENKO CORPORATION
    Inventors: Maiko Hayata, Michirou Kawanishi, Yu-Han Yuan, Jen-Chun Fang
  • Patent number: 8747610
    Abstract: A plasma processing system. The processing system comprises a process chamber having first and second ends arranged such that the first end opposes the second end. A substrate support is positioned at the first end of the process chamber and is configured to support a substrate. An exhaust system is positioned proximate the second end of the process chamber and draws a vacuum on the process chamber. Between the exhaust system and substrate support there is a plurality of super-Debye openings, and between the exhaust system and the plurality of super-Debye openings is a plurality of sub-Debye openings. The super-Debye openings are configured to limit diffusion of plasma while the sub-Debye openings are configured to quench plasma.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: June 10, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Lee Chen, Merritt Funk
  • Publication number: 20140151331
    Abstract: Methods and apparatus for plasma processing of substrates are provided herein. In some embodiments, a deposition shield for use in processing a substrate having a given width may include a first plate having a first plurality of holes disposed through a thickness of the first plate; and a second plate disposed below the first plate and having a second plurality of holes disposed through a thickness of the second plate, wherein individual holes in the first plurality of holes and the second plurality of holes are not aligned.
    Type: Application
    Filed: February 27, 2013
    Publication date: June 5, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: VALENTIN N. TODOROW, MICHAEL D. WILLWERTH, YING-SHENG LIN, DAVID PALAGASHVILI
  • Patent number: 8741062
    Abstract: An apparatus, such as an ALD (Atomic Layer Deposition) apparatus, including a precursor source configured for depositing material on a heated substrate in a deposition reactor by sequential self-saturating surface reactions. The apparatus includes an in-feed line for feeding precursor vapor from the precursor source to a reaction chamber and a structure configured for utilizing heat from a reaction chamber heater for preventing condensation of precursor vapor into liquid or solid phase between the precursor source and the reaction chamber. Also various other apparatus and methods are presented.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: June 3, 2014
    Assignee: Picosun Oy
    Inventors: Sven Lindfors, Pekka J. Soininen
  • Patent number: 8736177
    Abstract: An inductively coupled plasma ion source for a focused ion beam (FIB) system is disclosed, comprising an insulating plasma chamber with a feed gas delivery system, a compact radio frequency (RF) antenna coil positioned concentric to the plasma chamber and in proximity to, or in contact with, the outer diameter of the plasma chamber. In some embodiments, the plasma chamber is surrounded by a Faraday shield to prevent capacitive coupling between the RF voltage on the antenna and the plasma within the plasma chamber. High dielectric strength insulating tubing is heat shrunk onto the outer diameter of the conductive tubing or wire used to form the antenna to allow close packing of turns within the antenna coil. The insulating tubing is capable of standing off the RF voltage differences between different portions of the antenna, and between the antenna and the Faraday shield.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: May 27, 2014
    Assignee: FEI Company
    Inventor: Shouyin Zhang
  • Publication number: 20140134829
    Abstract: In accordance with an embodiment of the present invention, a process tool includes a chuck configured to hold a substrate. The chuck is disposed in a chamber. The process tool further includes a shielding unit with a central opening. The shielding unit is disposed in the chamber over the chuck.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 15, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Manfred Engelhardt
  • Publication number: 20140131311
    Abstract: A thin film forming apparatus and a thin film forming method using the same are disclosed. In one aspect, the thin film forming apparatus comprises a mask that includes a blocking portion and an opening. It also includes an etching source that jets an etching gas through the opening of the mask to etch a thin film according to a pattern. The mask includes a gas blower for blowing a gas around the opening so that the etching gas does not penetrate into a thin film area corresponding to the block portion. When the thin film forming apparatus is used, a normal residual area of a thin film may be safely preserved and patterning may be accurately performed. Thus, the quality of a product manufactured by using the thin film forming apparatus may be improved.
    Type: Application
    Filed: May 30, 2013
    Publication date: May 15, 2014
    Inventors: Sung-Joong Joo, You-Min Cha
  • Patent number: 8715472
    Abstract: A substrate processing method may include forming a plasma; extracting ions from the plasma and accelerating the ions to have uniform or substantially uniform directivity using a grid system; irradiating the ions at a reflector, wherein the reflector includes a plurality of reflecting plates each having a metal plate and an insulating layer on the metal plate, wherein the reflecting plates are parallel or substantially parallel such that the insulating layers are exposed to the ions; reflecting the ions incident on the reflecting plates away from the insulating layers of the reflecting plates; colliding the ions reflected away from the insulating layers with the metal plates to convert the ions into neutral beams; and irradiating the neutral beams onto a substrate to process the substrate.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Wook Hwang, Chul-Ho Shin
  • Publication number: 20140110057
    Abstract: Embodiments of the present invention include a focus ring segment and a focus ring assembly. In one embodiment, the focus ring segment includes an arc-shaped body having a lower ring segment, a middle ring segment, a top ring segment and a lip. The lower ring segment has a bottom surface, and the middle ring segment has a bottom surface, wherein the middle ring segment is connected to the lower ring segment at the middle ring segment bottom surface. The top ring segment has a bottom surface, wherein the top ring segment is connected to the middle ring segment at the top ring segment bottom surface. The lip extends horizontally above the middle ring segment, wherein the lip is sloped radially inwards towards a centerline of the focus ring segment. In another embodiment, the focus ring assembly includes at least a first ring segment and a second ring segment.
    Type: Application
    Filed: September 23, 2013
    Publication date: April 24, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Jared Ahmad LEE, Paul B. REUTER
  • Publication number: 20140110373
    Abstract: A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 24, 2014
    Inventors: Eiichi Nishimura, Masato Kushibiki, Takashi Sone, Akitaka Shimizu, Fumiko Yamashita
  • Patent number: 8702999
    Abstract: Method and plasma treatment apparatus for treatment of a substrate surface (1) using an atmospheric pressure plasma. An atmospheric pressure plasma is provided in a treatment space (5) between a first electrode (2) and a second electrode (3). Furthermore, a substrate (1) and a mask web (7) in contact with the substrate (1) are provided. A plasma generating power is applied to the first and second electrode (2, 3) for treatment of surface areas of the substrate (1) exposed by the mask web (7), in which the substrate (1) and mask web (7) are moved synchronously through the treatment space (5).
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: April 22, 2014
    Assignee: FujiFilm Manufacturing Europe B.V.
    Inventors: Bruno Alexander Korngold, Hindrik Willem de Vries, Eugen Aldea
  • Publication number: 20140106542
    Abstract: Methods and systems of laser and plasma etch wafer dicing using UV-curable adhesive films. A method includes forming a mask covering ICs formed on the wafer. The semiconductor wafer is coupled to a film frame by a UV-curable adhesive film. A pre-cure of the UV-curable adhesive film cures a peripheral portion of the adhesive extending beyond an edge of the wafer to improve the exposed adhesive material's resistance to plasma etch and reduce hydrocarbon redeposition within the etch chamber. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the ICs. A center portion of the UV-curable adhesive is then cured and the singulated ICs detached from the film.
    Type: Application
    Filed: October 11, 2013
    Publication date: April 17, 2014
    Inventors: Mohammad Kamruzzaman CHOWDHURY, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20140087542
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Applicant: Semiconductor Components Industries, LLC
    Inventor: GORDON M. GRIVNA
  • Patent number: 8677590
    Abstract: A method for manufacturing a plasma processing system is provided. The method includes providing a movable plasma-facing structure configured to surround a plasma that is generated during processing of a substrate. The method also includes disposing a movable electrically conductive structure outside of the movable plasma-facing structure, wherein both structures configured to be deployed and retracted as a single unit to facilitate handling of the substrate. The movable electrically conductive structure is radio frequency (RF) grounded during the plasma processing. During processing, the RF current from the plasma flows to the movable electrically conductive structure through the movable plasma-facing structure during the plasma processing. The method further includes coupling a set of conductive straps to the movable electrically conductive structure.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: March 25, 2014
    Assignee: Lam Research Corporation
    Inventors: Eric Hudson, Andreas Fischer
  • Patent number: 8673111
    Abstract: A process chamber includes a wafer support to mount a wafer to be processed in the process chamber, with the wafer having an annular edge exclusion area. A first electrically grounded ring extends in an annular path radially outward of the edge exclusion area and is electrically isolated from the wafer support. A second electrode is configured with a center area opposite to the wafer support. A second electrically grounded ring extends in an annular path radially outward of the second electrode and the edge exclusion area. The second electrically grounded ring is electrically isolated from the center area. An annular mount section has a DC bias ring, and the DC bias ring opposes the edge exclusion area when the wafer is present. A DC control circuit is provided for applying a DC voltage to the DC bias ring.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: March 18, 2014
    Assignee: Lam Research Corporation
    Inventors: Andrew D. Bailey, III, Yunsang Kim
  • Publication number: 20140073138
    Abstract: A method for plasma etching is provided, wherein a substrate pre-defining a plurality of to-be-etched segments is secured on a movable stage, and a spray area of plasma from a plasma gun is limited to get a spray-area-limited plasma. Then, at least one of the to-be-etched segments is positioned in an etch position in turn by a step and repeat manner, to make the to-be-etched segments in the etch position to be etched by the spray-area-limited plasma. A plasma etching apparatus is also provided, so that the uniformity of the plasma etching process may be controlled precisely to raise the etching uniformity.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 13, 2014
    Inventors: Ming-Yu HUANG, Min-Chi Hwang
  • Publication number: 20140060736
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Application
    Filed: November 8, 2013
    Publication date: March 6, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald L. Westmoreland, Gurtej S. Sandhu
  • Publication number: 20140057089
    Abstract: A hardmask layer is formed with an increased etch resistance based on alternating nanolayers of TiN with alternating residual stresses. Embodiments include depositing a first nanolayer of TiN, and depositing a second nanolayer of TiN on the first nanolayer, wherein the first and second nanolayers have different residual stresses.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 27, 2014
    Applicant: GLOBALFOUNDRIES Inc.
    Inventor: Robin Abraham KOSHY
  • Publication number: 20140053979
    Abstract: A three-dimensional stacked IC device has a stack of contact levels at an interconnect region. According to some examples of the present invention, it only requires a set of N etch masks to create up to and including 2N levels of interconnect contact regions at the stack of contact levels. According to some examples, 2x-1 contact levels are etched for each mask sequence number x, x being a sequence number for the masks so that for one mask x=1, for another mask x=2, and so forth through x=N. Methods create the interconnect contact regions aligned with landing areas at the contact levels.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: Macronix International Co., Ltd.
    Inventors: Shih-Hung Chen, Hang-Ting Lue
  • Patent number: 8647466
    Abstract: Combinatorial evaluation of dry semiconductor processes is described, including rotating a mask comprising a plurality of apertures, wherein the mask is positioned between a dry semiconductor processing source and the substrate, and performing a dry semiconductor process through the apertures of the mask at a plurality of intervals during the rotating the mask to combinatorially create a plurality of processed regions on the substrate, wherein the apertures of the mask are arranged in such a way that the plurality of processed regions have different geometries relative to the processing source, and analyzing the processed regions to determine effects of time and geometry on the processed regions.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: February 11, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Tony Chiang
  • Publication number: 20140034107
    Abstract: A superstrate, such as a sheet of polymer film, is used as a transport during metallization of solar cells. The back sides of the solar cells are attached to the sheet of polymer film. Contact holes are formed through the sheet of polymer film to expose doped regions of the solar cells. Metals are formed in the contact holes to electrically connect to the exposed doped regions of the solar cells. The metals are electroplated to form metal contacts of the solar cell. Subsequently, the solar cells are separated from other solar cells that were metallized while supported by the same sheet of polymer film to form strings of solar cells or individual solar cells.
    Type: Application
    Filed: March 18, 2013
    Publication date: February 6, 2014
    Inventor: Peter John COUSINS
  • Patent number: 8623171
    Abstract: A plasma processing apparatus includes a process chamber, a platen positioned in the process chamber for supporting a workpiece, a source configured to generate a plasma in the process chamber having a plasma sheath adjacent to the front surface of the workpiece, and an insulating modifier. The insulting modifier is configured to control a shape of a boundary between the plasma and the plasma sheath so a portion of the shape of the boundary is not parallel to a plane defined by a front surface of the workpiece facing the plasma. Controlling the shape of the boundary between the plasma and the plasma sheath enables a large range of incident angles of particles striking the workpiece to be achieved.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: January 7, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Timothy J. Miller, Christopher J. Leavitt, Bernard G. Lindsay
  • Publication number: 20130337231
    Abstract: Provided are a substrate with an etching mask which enables high definition patterning and a method of manufacturing the same. A photosensitive material is applied on a surface of a substrate, exposure and development of the photosensitive material are carried out to form a resist pattern, a DLC coating film is formed on the surface of the substrate and a surface of the resist pattern, and the DLC coating film formed on the resist pattern is separated together with the resist pattern to form a DLC pattern on the surface of the substrate.
    Type: Application
    Filed: February 8, 2012
    Publication date: December 19, 2013
    Applicant: THINK LABORATORY CO., LTD.
    Inventors: Kaku Shigeta, Shintaro Sugawara, Tatsuo Shigeta
  • Publication number: 20130334170
    Abstract: Techniques for fabricating thin single crystal diamond films from a diamond structure having a top surface including implanting a dose of ions at a predetermined depth below the top surface to form a damage layer, selectively masking the top surface to expose one or more portions of the diamond structure, vertically etching one or more of the exposed portions to the predetermined depth, and exfoliating the unexposed portion to form at least one thin single crystal diamond film.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 19, 2013
    Inventors: Dirk R. Englund, Richard Osgood, Ophir Gaathon
  • Publication number: 20130337652
    Abstract: A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.
    Type: Application
    Filed: September 10, 2012
    Publication date: December 19, 2013
    Inventors: Jun-Hyeub SUN, Sung-Kwon Lee, Sang-Oh Lee
  • Patent number: 8603292
    Abstract: A five-sided quartz window configured to be mounted on a degas chamber as a UV-transmissive window. The quartz window is made of synthetic quartz and has a uniform thickness. The shape of the quartz window is defined by an upper surface, a lower surface and a sidewall therebetween. The sidewall has five straight sections interconnected by five arcuate sections. The quartz window has four arcuate recesses extending into the sidewall.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: December 10, 2013
    Assignee: Lam Research Corporation
    Inventors: Jason Augustino, Tim Hart
  • Publication number: 20130319613
    Abstract: A method for making dual-epi FinFETs is described. The method includes adding a first epitaxial material to an array of fins. The method also includes covering at least a first portion of the array of fins using a first masking material and removing the first epitaxial material from an uncovered portion of the array of fins. Adding a second epitaxial material to the fins in the uncovered portion of the array of fins is included in the method. The method also includes covering a second portion of the array of fins using a second masking material and performing a directional etch using the first masking material and the second masking material. Apparatus and computer program products are also described.
    Type: Application
    Filed: July 10, 2012
    Publication date: December 5, 2013
    Inventors: Veeraraghavan S. Basker, Huiming Bu, Kangguo Cheng, Balasubramanian S. Haran, Nicolas Loubet, Shom Ponoth, Stefan Schmitz, Theodorus E. Standaert, Tenko Yamashita
  • Patent number: 8591697
    Abstract: A mask fixture for etching an item includes: a top fixture disposed over the item, including a reservoir centered within the top fixture for containing an etchant; a bottom fixture underneath the item to be etched including a recessed surface area centered within the bottom fixture; and an etch-resistant window for holding the item to be etched, the etch-resistant window disposed entirely within the recessed surface area. In addttion, a small via centered within and intersecting both the top and bottom fixtures acts as a path for a high intensity light beam.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: November 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: Arthur Wood Ellis