Abstract: A method for manufacturing a circuit board with a buried element having high density pin count, wherein a micro copper window formed in a first circuit by patterned dry film electroplating is easily controlled less than 50 ?m so that the micro conduction holes formed after the laser drilling each has a diameter greatly shrunk less than 50 ?m so as to highly increase density of the micro conduction holes, thereby facilitating in burial of the buried element with the high density pin count. Additionally, by disposing the micro conduction holes in the same elevation, optically aligning a fixing position for the buried element can be controlled precisely.

Abstract: A method for manufacturing microthrough-hole includes electroplating a metal layer on a carrier plate, patterning the metal layer to form a first circuit having copper pads, covering the first circuit with a photoresist layer and not covering the copper window between two of the copper pads, etching the metal layer beneath the copper window and removing the photoresist layer, sequentially forming an insulation layer and a second circuit on the first circuit and the copper window, the second circuit layer having a stop pad corresponding to the copper window, removing the carrier plate, upward drilling through the insulation layer between the stop pad and the copper window to form a microthrough-hole beneath the stop pad, and forming a conductive layer in the microthrough-hole to form the microthrough-hole connecting the first and second circuits. The microthrough-hole and its occupied area is greatly reduced, thereby achieving high circuit density.

Abstract: A multilayer wiring substrate mounted with an electronic component includes an electronic component, a core material layer having a first opening for accommodating the electronic component, a resin layer which is formed on one surface of the core material layer and which has a second opening greater than the first opening, a supporting layer which is formed on the other surface of the core material layer and which supports the electronic component, a plurality of connection conductor sections which are provided around the first opening and within the second opening on the one surface of the core material layer, bonding wires for electrically connecting the electronic component to the connection conductor sections, and a sealing resin filled into the first and second openings in order to seal the electronic component and the bonding wires.

Abstract: An electronic device is disclosed. One embodiment provides a metallic body. A first electrically insulating layer is applied over the metallic body and having a thickness of less than 100 ?m. A first thermally conductive layer is applied over the first electrically insulating layer and having a thermal conductivity of more than 50 W/(m·K). A second electrically insulating layer is applied over the first thermally conductive layer and having a thickness of less than 100 ?m.

Abstract: Packaging assembly method and systems include the use of a plastic substrate and one or more compliant fasteners, which can be connected to the plastic substrate, such that the compliant fastener provides an electrical connection to one or more electrical components. A plastic leadframe can therefore be formed, which is based upon the plastic substrate and the compliant fastener for attachment to other electrical components. The plastic substrate itself can function as a plastic trace or plastic substrate trace, and can be formed from plastic material such as thermoplastic or a thermoset material. The compliant fastener itself can be pushed into the plastic substrate at a connection point thereof for attachment of the compliant fastener to the plastic substrate. The connection point can be formed in the plastic substrate as one or more round holes, slots, rectangular holes or complex shapes. An interface is therefore for med between the plastic trace and the compliant fastener.

Abstract: A semiconductor device which includes, between a copper conductive layer and a low-k organic insulator, a barrier layer comprising an amorphous metallic glass, preferably amorphous tantalum-aluminum. A method of making the semiconductor device is also disclosed.

Abstract: A resin seal apparatus includes a movable bottom die vertically moved by an elevator mechanism, a transport mechanism horizontally moving the movable bottom die having placed thereon a printed circuit board with a semiconductor chip mounted thereon, an intermediate die abutting against a periphery of the printed circuit board when the movable bottom die is moved upward, a film of resin stretched by a film stretch mechanism over the intermediate die and the printed circuit board, a die for a chip, pressing a back surface of the semiconductor chip via the film of resin, and a top die pressing a top surface of the intermediate die via the film of resin. This apparatus allows a PCB with a semiconductor chip mounted thereon in the form of a flip chip to be sealed with resin in a reduced period of time to fabricate an electronic component.

Abstract: A multilayered wiring board comprising, at least, two wiring layers and an interlaminar insulating layer, in which said wiring board further has, incorporated therein, at least one capacitor element which comprises a sandwiched structure of a lower electrode-forming metallic layer having formed thereon at least one recess portion, a dielectric layer formed over the lower electrode-forming metallic layer, and an upper electrode-forming metallic layer formed over the dielectric layer, and its production process. The semiconductor device comprising the multilayered wiring board having mounted thereon a semiconductor element is also disclosed.