Ion Beam Etching (e.g., Ion Milling, Etc.) Patents (Class 204/192.34)
  • Patent number: 11908691
    Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: February 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
  • Patent number: 11852853
    Abstract: A method is provided. The method includes exposing a first material disposed across a first plane on a first substrate to an ion beam to form a first plurality of structures in the first material, the ion beam directed at the first material at an ion beam angle ? relative to a surface normal of the first substrate. The first substrate is positioned at a first rotation angle ?1 between the ion beam and a first vector of the first plurality of structures, the first material is exposed to the ion beam incrementally along a first direction, and exposure of the first material to the ion beam is varied along the first direction to generate a depth variation between the first plurality of structures in the first direction.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: December 26, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Rutger Meyer Timmerman Thijssen, Morgan Evans, Maurice Emerson Peploski, Joseph C. Olson, Thomas James Soldi
  • Patent number: 11747639
    Abstract: The present disclosure relates to a waveplate having a substrate forming an optic. The substrate may have an integral portion forming a plurality of angled columnar features on an exposed surface thereof. The plurality of angled columnar features may further be aligned parallel with a directional plane formed non-parallel to a reference plane, with the reference plane being normal to a surface of the substrate. The metasurface forms a birefringent metasurface.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: September 5, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Eyal Feigenbaum, Jeffrey D. Bude, Jean-Michel Di Nicola, Hoang T. Nguyen, Christopher J. Stolz
  • Patent number: 11380551
    Abstract: A method of processing a target object is provided. The target object includes a first protrusion portion, a second protrusion portion, and a groove portion provided on a main surface of the target object and defined by the first protrusion portion and the second protrusion portion and an inner surface of the groove portion is included in the main surface of the target object. The method comprises forming a protection film conformally on the main surface of the target object after the forming of the protection film conformally, repeatedly performing a plasma etching on a bottom portion of the groove portion of the target object and performing the forming of the protection film and the performing of the plasma etching N times (N is an integer equal to or larger than 2). The protection film is formed depending on a shape of the groove portion which has been changed by the plasma etching.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: July 5, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Tabata, Yoshihide Kihara
  • Patent number: 11264212
    Abstract: A measurement system for a plasma processing system includes a detector and an ion current meter coupled to the ion current collector and configured to provide a signal based on the measurements from the ion current collector. The detector includes an insulating substrate including a cavity, an ion angle selection grid configured to be exposed to a bulk plasma disposed in an upper portion of the cavity, and an ion current collector disposed within the cavity at an opposite side of the cavity below the ion angle selection grid. The ion angle selection grid includes an ion angle selection substrate and a plurality of through openings extending through the ion angle selection substrate, where each of the plurality of through openings has a depth into the ion angle selection substrate and a width orthogonal to the depth, where a ratio of the depth to the width is greater than or equal to 40.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: March 1, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Zhiying Chen, Joel Blakeney, Megan Carruth, Peter Ventzek, Alok Ranjan
  • Patent number: 11244802
    Abstract: By irradiating a sample with an unfocused ion beam, processing accuracy of an ion milling device for processing a sample or reproducibility accuracy of a shape of a processed surface is improved. Therefore, the ion milling device includes a sample chamber, an ion source position adjustment mechanism provided at the sample chamber, an ion source attached to the sample chamber via the ion source position adjustment mechanism and configured to emit an ion beam, and a sample stage configured to rotate around a rotation center. When a direction in which the rotation center extends when an ion beam center of the ion beam matches the rotation center is set as a Z direction, and a plane perpendicular to the Z direction is set as an XY plane, the ion source position adjustment mechanism is capable of adjusting a position of the ion source on the XY plane and a position of the ion source in the Z direction.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: February 8, 2022
    Assignee: Hitachi High-Tech Corporation
    Inventors: Hitoshi Kamoshida, Hisayuki Takasu, Atsushi Kamino, Toru Iwaya
  • Patent number: 11226439
    Abstract: Optical grating components and methods of forming are provided. In some embodiments, a method includes providing a substrate, and etching a plurality of trenches into the substrate to form an optical grating. The optical grating may include a plurality of angled trenches, wherein a depth of a first trench of the plurality of trenches varies between at least one of the following: a first lengthwise end of the first trench and a second lengthwise end of the first trench, and between a first side of the first trench and a second side of the first trench.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: January 18, 2022
    Assignee: APPLIED Materials, Inc.
    Inventors: Joseph C. Olson, Ludovic Godet, Costel Biloiu
  • Patent number: 11214874
    Abstract: There is provided a method, system and computer program product to delayer a layer of a sample, the layer comprising one or more materials, in an ion beam mill by adjusting one or more operating parameters of the ion beam mill and selectively removing each of the one or more materials at their respective predetermined rates. There is also provided a method and system for obtaining rate of removal of a material from a sample in an ion beam mill.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: January 4, 2022
    Assignee: TECHINSIGHTS INC.
    Inventors: Robert K. Foster, Christopher Pawlowicz, Jason Abt, Ian Jones, Heinz Josef Nentwich
  • Patent number: 11211303
    Abstract: An embodiment of a semiconductor device includes a semiconductor body having a first main surface. The semiconductor body includes an active device area and an edge termination area at least partly surrounding the active device area. The semiconductor device further includes a contact electrode on the first main surface and electrically connected to the active device area. The semiconductor device further includes a passivation structure on the edge termination area and laterally extending into the active device area. The semiconductor device further includes an encapsulation structure on the passivation structure and covering a first edge of the passivation structure above the contact electrode.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: December 28, 2021
    Assignee: Infineon Technologies AG
    Inventors: Jens Peter Konrath, Jochen Hilsenbeck, Dethard Peters, Paul Salmen, Tobias Schmidutz, Vice Sodan, Christian Stahlhut, Juergen Steinbrenner, Bernd Zippelius
  • Patent number: 11205709
    Abstract: Embodiments disclosed herein relate generally to forming a structure, e.g., in high aspect ratio trenches. In an embodiment, a method for semiconductor processing is provided. The method includes forming fins on a substrate. Sidewalls of the fins and a bottom surface between the sidewalls of the fins define a trench therebetween. The method includes forming a gate structure over the fins. The gate structure has a sidewall with a defect region formed therein. The method includes forming a filling layer to fill the defect region in the sidewall of the gate structure.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: December 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ao Chang, Chien-Hao Chen, De-Wei Yu, Yung-Cheng Lu
  • Patent number: 11194092
    Abstract: An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: December 7, 2021
    Assignee: SKORPIOS TECHNOLOGIES, INC.
    Inventors: Paveen Apiratikul, Damien Lambert
  • Patent number: 11143618
    Abstract: Embodiments of the present technology may allow for improved and more reliable tunneling junctions and methods of fabricating the tunneling junctions. Electrical shorting issues may be reduced by depositing electrodes without a sharp sidewall and corner but instead with a sloping or curved sidewall. Layers deposited on top of the electrode layer may then be able to adequately cover the underlying electrode layer and therefore reduce or prevent shorting. Additionally, two insulating materials may be used as the dielectric layer may reduce the possibility of incomplete coverage and the possibility of flaking. Furthermore, the electrodes may be tapered from the contact area to the junction area to provide a thin electrode where the hole is to be patterned, while the thicker contact area reduces sheet resistance. The electrode may also be patterned to be wider at the contact area and narrower at the junction area.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: October 12, 2021
    Assignee: Roche Sequencing Solutions, Inc.
    Inventors: Juraj Topolancik, Zsolt Majzik, Flint Mitchell
  • Patent number: 11116996
    Abstract: A high-intensity external ion injector can includes (a) an ion source defining a plasma chamber and including an aperture through which ions can escape the plasma chamber, (b) a microwave source configured to generate microwave radiation and direct the microwave radiation into the plasma chamber, (c) a gas source filled with a plasma-forming gas and configured to supply the plasma-forming gas to the plasma chamber, (d) a voltage source configured to apply a voltage to the plasma chamber, (e) an einzel triplet lens, (f) an ion focus positioned and configured to focus an ion beam exiting the aperture of the ion source through the einzel triplet lens, and (g) a periodic focusing structure positioned and configured to receive an ion beam exiting the einzel triplet lens.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: September 14, 2021
    Assignee: Antaya Science & Technology
    Inventor: Timothy A. Antaya
  • Patent number: 11119405
    Abstract: A method of forming angled structures in a substrate. The method may include the operation of forming a mask by etching angled mask features in a mask layer, disposed on a substrate base of the substrate, the angled mask features having sidewalls, oriented at a non-zero angle of inclination with respect to perpendicular to a main surface of the substrate. The method may include etching the substrate with the mask in place, the etching comprising directing ions having trajectories arranged at a non-zero angle of incidence with respect to a perpendicular to the main surface.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: September 14, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Morgan Evans, Joseph C. Olson, Rutger Meyer Timmerman Thijssen
  • Patent number: 11062879
    Abstract: Method for preparing site-specific, plan-view lamellae from multilayered microelectronic devices. A focused ion beam that is directed, with an etch-assisting gas, toward an uppermost layer of a device removes at least that uppermost layer and thereby exposes an underlying layer over, or comprising, a target area from which the site-specific, plan-view lamella is to be prepared, wherein the focused ion beam is in a face-on orientation in removing the uppermost layer to expose the underlying layer. In a preferred embodiment, the etch-assisting gas comprises methyl nitroacetate. In alternative embodiments, the etch-assisting gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: July 13, 2021
    Assignee: FEI Company
    Inventors: Noel Thomas Franco, Kenny Mani, Chad Rue, Joe Christian, Jeffrey Blackwood
  • Patent number: 11037794
    Abstract: A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: June 15, 2021
    Assignee: The Regents of the University of California
    Inventors: Xiaobin Xu, Qing Yang, Natcha Wattanatorn, Chuanzhen Zhao, Logan A. Stewart, Steven J. Jonas, Paul S. Weiss
  • Patent number: 11016228
    Abstract: Embodiments herein provide systems and methods for forming an optical component. A method may include providing a plurality of proximity masks between a plasma source and a workpiece, the workpiece including a plurality of substrates secured thereto. Each of the plurality of substrates may include first and second target areas. The method may further include delivering, from the plasma source, an angled ion beam towards the workpiece, wherein the angled ion beam is then received at one of the plurality of masks. A first proximity mask may include a first set of openings permitting the angled ion beam to pass therethrough to just the first target area of each of the plurality of substrates. A second proximity mask may include a second set of openings permitting the angled ion beam to pass therethrough just to the second target area of each of the plurality of substrates.
    Type: Grant
    Filed: February 9, 2020
    Date of Patent: May 25, 2021
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph Olson, Peter Kurunczi, Robert Masci
  • Patent number: 10962861
    Abstract: Photographic lighting devices, systems, and methods having a plurality of electrical energy storage/discharge (EESD) elements and/or one or more light sources in a single photographic lighting device to perform one or more photographic lighting effects. EESD elements and one or more light sources can be configured to have multiple separate light emissions occur in a single image acquisition window. The multiple light emissions are separated in an image acquisition window by a time period that is about shutter speed exposure time/(N?1), where N is the number of light emissions. In one such example, two light emissions are separated by a time period that is about shutter speed exposure time/(N?1).
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: March 30, 2021
    Assignee: Lab Partners Associates, Inc.
    Inventor: James E. Clark
  • Patent number: 10937922
    Abstract: A method for exposing side surfaces of a semiconductor body is disclosed. In an embodiment a method includes providing the semiconductor body having a laterally extending first main surface, forming a plurality of vertical side surfaces by partially removing material of the semiconductor body and thereby removing the first main surface in places, wherein each of the side surfaces forms an angle (?) between 110° and 160° inclusive with the remaining first main surface, applying a protective layer onto the semiconductor body so that, in a plan view, the protective layer completely covers the remaining first main surface and the obliquely formed side surfaces and partially removing the protective layer so that the protective layer is removed in regions on the obliquely formed side surfaces because of an inclination and remains at least partially preserved in regions on the remaining first main surface during a common process operation.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: March 2, 2021
    Assignee: OSRAM OLED GMBH
    Inventors: Jens Ebbecke, Sebastian Taeger
  • Patent number: 10864565
    Abstract: A method of producing a deforming tool (2) having a structured embossing surface (4) which can be brought into contact with a surface of a substrate (1) for plastic deformation of the substrate, includes the steps of determining a target structure to be produced on the substrate (1); geometrically distorting the target structure, such that an embossing image structure is obtained; inverting the embossing image structure, such that the embossing structure for the embossed surface (4) is obtained; and producing the embossing surface (4) of the deforming tool (2) according to the embossing structure.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: December 15, 2020
    Assignee: SMS Group GmbH
    Inventors: Arnt Kohlrausch, Hartmut Pawelski, Markus Schellmann
  • Patent number: 10775158
    Abstract: Optical grating components and methods of forming are provided. In some embodiments, a method includes providing an optical grating layer, and forming an optical grating in the optical grating layer, wherein the optical grating comprises a plurality of angled trenches disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the optical grating layer. The method may further include delivering light from a light source into the optical grating layer, and measuring at least one of: an undiffracted portion of the light exiting the optical grating layer, and a diffracted portion of the light exiting the optical grating layer.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Joseph C. Olson, Ludovic Godet, Rutger Meyer Timmerman Thijssen, Morgan Evans
  • Patent number: 10741385
    Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: August 11, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido Van Der Star, Toshiya Suzuki
  • Patent number: 10685816
    Abstract: A method MT includes etching a wafer W using plasma generated in a processing container. The etching includes a process of inclining and rotating a holding structure holding the wafer W during execution of the etching and the process successively creating a plurality of inclined rotation states RT(?, t) with respect to the holding structure. In the inclined rotation states, the wafer W is rotated about a central axis of the wafer W over a predetermined process time while maintaining a state where the central axis is inclined with respect to a reference axis of the processing container which is in the same plane as the central axis. A combination of a value ? of an inclination angle AN of the central axis with respect to the reference axis and the process time t differs for each of the plurality of inclined rotation states.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: June 16, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshihiro Umezawa, Jun Sato, Kiyoshi Maeda, Mitsunori Ohata, Kazuya Matsumoto
  • Patent number: 10620357
    Abstract: A backlight unit including an input coupler, a holographic display apparatus including the backlight unit, and a method of manufacturing the input coupler are provided. The backlight unit includes the input coupler configured to cause light incident on a light incident surface of a light guide plate to travel into the light guide plate, the input coupler has a binary grating structure in which a plurality of barriers are arranged parallel to one another at a constant grating period, and the plurality of barriers are tilted from the light incident on the light incident surface.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sunghoon Lee, Hoon Song, Jungkwuen An, Sunil Kim, Chilsung Choi, Young Kim, Kanghee Won, Hongseok Lee
  • Patent number: 10608173
    Abstract: An ion beam apparatus may include a chamber assembly configured to hold a material and direct an ion beam on the material, a detector configured to detect a signal generated from the material based on the ion beam being directed on the material, and a controller configured to control at least one parameter associated with the chamber assembly based on the signal, such that at least one of an ion energy associated with the ion beam, an ion current associated with the ion beam, and an incident angle of the ion beam with respect to a top surface of the material is changed continuously with time.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: March 31, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yil-hyung Lee, Jong-Kyu Kim, Jongchul Park, Sang-Kuk Kim, Jongsoon Park, Hyeji Yoon, Woohyun Lee
  • Patent number: 10600653
    Abstract: A method for forming a fine pattern includes forming line patterns and a connection pattern on a semiconductor substrate, the line patterns extending in a first direction and spaced apart from each other in a second direction intersecting the first direction, and the connection pattern connecting portions of the line patterns adjacent to each other in the second direction, and performing an ion beam etching process on the connection pattern. The ion beam etching process provides an ion beam in an incident direction parallel to a plane defined by the first direction and a third direction perpendicular to a top surface of the semiconductor substrate, and the incident direction of the ion beam is not perpendicular to the top surface of the semiconductor substrate.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: KeunHee Bai, Jongchul Park, Seungjun Kim, Seungju Park, Young-Ju Park, Hak-Sun Lee
  • Patent number: 10559506
    Abstract: A method of inspecting a semiconductor device including setting a target place on a wafer, the target place including a deep trench, forming a first cut surface by performing first milling on the target place in a first direction, obtaining first image data of the first cut surface, forming a second cut surface by performing second milling on the target place in a second direction opposite to the first direction, obtaining second image data of the second cut surface, obtaining a plurality of first critical dimension (CD) values for the deep trench from the first image data, obtaining a plurality of second CD values for the deep trench from the second image data, analyzing a degree of bending of the deep trench based on the first CD values and the second CD values, and providing the semiconductor device meeting a condition based on results of the analyzing may be provided.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Kook Kim, Jun Chul Kim, Myung Suk Um, Yu Sin Yang, Ye Ny Yim
  • Patent number: 10553448
    Abstract: A method of processing a layer. The method may include providing the layer on a substrate, the substrate defining a substrate plane; directing an ion beam to an exposed surface of the layer in an ion exposure when the substrate is disposed in a first rotational position, the ion beam having a first ion trajectory, the first ion trajectory extending along a first direction, wherein the first ion trajectory forms a non-zero angle of incidence with respect to a perpendicular to the substrate plane; performing a rotation by rotating the substrate with respect to the ion beam about the perpendicular from the first rotational position to a second rotational position; and directing the ion beam to the exposed surface of the layer in an additional ion exposure along the first ion trajectory when the substrate is disposed in the second rotational position.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 4, 2020
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Tristan Y. Ma, Morgan Evans, Kevin Anglin, Robert J. Masci, John Hautala
  • Patent number: 10546719
    Abstract: Method for preparing site-specific, plan-view lamellae from multilayered microelectronic devices. A focused ion beam that is directed, with an etch-assisting gas, toward an uppermost layer of a device removes at least that uppermost layer and thereby exposes an underlying layer over, or comprising, a target area from which the site-specific, plan-view lamella is to be prepared, wherein the focused ion beam is in a face-on orientation in removing the uppermost layer to expose the underlying layer. In a preferred embodiment, the etch-assisting gas comprises methyl nitroacetate. In alternative embodiments, the etch-assisting gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: January 28, 2020
    Assignee: FEI Company
    Inventors: Noel Thomas Franco, Kenny Mani, Chad Rue, Joe Christian, Jeffrey Blackwood
  • Patent number: 10535699
    Abstract: An image sensor device includes a semiconductor substrate, including an array of pixel circuits, which define respective pixels of the device. A photosensitive layer is formed over the semiconductor substrate and configured to transfer charge to the pixel circuits in response to light incident on the photosensitive layer. An upper layer is formed over the photosensitive layer and is at least partially transparent to the light. Opaque partitions extend vertically through the upper layer in a checkerboard pattern aligned with the pixels in the array.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: January 14, 2020
    Assignee: INVISAGE TECHNOLOGIES, INC.
    Inventors: Hui Tian, Igor Constantin Ivanov, Edward Hartley Sargent
  • Patent number: 10522351
    Abstract: A method of forming a pattern includes forming a lower layer on a substrate, forming a mask pattern on the lower layer, the mask pattern extending in a first direction parallel to a top surface of the substrate, and performing an etching process using an ion beam on the substrate, such that the ion beam is irradiated in parallel to a plane defined by the first direction and a direction perpendicular to the top surface of the substrate, and is irradiated at a tilt angle with respect to the top surface of the substrate, wherein performing the etching process includes adjusting the tilt angle of the ion beam to selectively etch the lower layer or the mask pattern.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: December 31, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jongchul Park
  • Patent number: 10510942
    Abstract: The invention relates to a method for manufacturing a Josephson junction comprising a step for providing a substrate, extending along a longitudinal direction, a step for depositing a superconducting layer on the substrate so that this layer extends from the substrate in a transverse direction, perpendicular to the longitudinal direction, and a step for irradiation of ions in a central area of the layer defined in the longitudinal direction, the method being characterized in that it includes, prior to the irradiation step, a step for removing a portion of the central area of the superconducting layer so as to delimit a set of areas of the superconducting layer aligned in the longitudinal direction including the central area and two lateral areas.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 17, 2019
    Assignee: Thales
    Inventors: Denis Crete, Bruno Marcilhac, Yves Lemaître
  • Patent number: 10504951
    Abstract: Example embodiments relate to image sensors and imaging apparatuses. One embodiment includes an image sensor for acquiring an image of an object. The image sensor includes an array of photo-sensitive areas formed on a substrate. Each photo-sensitive area is a continuous area within the substrate and is configured to detect incident light. The image sensor also includes an array of interference filters. Each inference filter is configured to selectively transmit a wavelength band. The array of interference filters is monolithically integrated on the array of photo-sensitive areas. A plurality of the interference filers is associated with a single photo-sensitive area of the array of photo-sensitive areas. Each interference filter in the plurality of interference filters is configured to selectively transmit a unique wavelength band to the photo-sensitive area and each interference filter in the plurality of interference filters is associated with a respective portion of the single photo-sensitive area.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: December 10, 2019
    Assignee: IMEC VZW
    Inventor: Bert Geelen
  • Patent number: 10468240
    Abstract: There is provided a glow discharge mass spectroscope having a higher analytical sensitivity by increasing an amount of extracted ion beams without a significant change in device construction and drive conditions of conventional glow discharge systems.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 5, 2019
    Assignee: GLOW TECHNOLOGY KK
    Inventor: Takahiro Takahashi
  • Patent number: 10460862
    Abstract: An object of the invention is to provide: an MgB2 superconducting thin-film wire that exhibits excellent Jc characteristics even under a 20 K magnetic field; and a method for producing thereof. The MgB2 superconducting thin-film wire includes a long substrate and an MgB2 thin film formed on the long substrate. The MgB2 thin film has a microtexture such that MgB2 columnar crystal grains stand densely together on the surface of the long substrate, and has Tc of 30 K or higher. In grain boundary regions of the MgB2 columnar crystal grains, a predetermined transition metal element is dispersed and segregated. The predetermined transition metal element is an element having a body-centered cubic lattice structure.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 29, 2019
    Assignee: HITACHI, LTD.
    Inventors: Toshiya Doi, Shigeru Horii, Toshiaki Kusunoki
  • Patent number: 10310351
    Abstract: Embodiments of the invention generally provide electrochromic devices and materials and processes for forming such electrochromic devices and materials. In one embodiment, an electrochromic device contains a lower transparent conductor layer disposed on a substrate, wherein an upper surface of the lower transparent conductor layer has a surface roughness of greater than 50 nm and a primary electrochromic layer having planarizing properties is disposed on the lower transparent conductor layer. The upper surface of the primary electrochromic layer has a surface roughness less than the surface roughness of upper surface of the lower transparent conductor layer, such as about 50 nm or less.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: June 4, 2019
    Assignee: CLEARIST INC.
    Inventor: Paul Phong Nguyen
  • Patent number: 10204762
    Abstract: To expose a desired feature, focused ion beam milling of thin slices from a cross section alternate with forming a scanning electron image of each newly exposed cross section. Milling is stopped when automatic analysis of an electron beam image of the newly exposed cross section shows that a pre-determined criterion is met.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 12, 2019
    Assignee: FEI Company
    Inventors: Scott Edward Fuller, Jason Donald, Termsupt Seemuntchaiboworn
  • Patent number: 10176969
    Abstract: A method for rapid switching between operating modes with differing beam currents in a charged particle system is disclosed. Many FIB milling applications require precise positioning of a milled pattern within a region of interest (RoI). This may be accomplished by using fiducial marks near the RoI, wherein the FIB is periodically deflected to image these marks during FIB milling. Any drift of the beam relative to the RoI can then be measured and compensated for, enabling more precise positioning of the FIB milling beam. It is often advantageous to use a lower current FIB for imaging since this may enable higher spatial resolution in the image of the marks. For faster FIB milling, a larger beam current is desired. Thus, for optimization of the FIB milling process, a method for rapidly switching between high and low current operating modes is desirable.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: January 8, 2019
    Assignee: FEI Company
    Inventor: Thomas G. Miller
  • Patent number: 10083915
    Abstract: A semiconductor device includes a semiconductor substrate including a main chip region and a remaining scribe lane region surrounding the main chip region, a passivation layer on the main chip region, the passivation layer including a plurality of bridge patterns extending from the main chip region in a first direction across the remaining scribe lane region, a plurality of bump pads exposed by the passivation layer on the main chip region, a plurality of dam structures along edges of the main chip region on the remaining scribe lane region, the plurality of bridge patterns arranged on the plurality of dam structures at a first pitch in the first direction, a seed layer on the plurality of bump pads, and bumps on the seed layer.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: September 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-hyuk Kim, Sang-hyun Lee, Sung-jin Kim, Yong-cheol Seo, Jin-kuk Bae
  • Patent number: 10026590
    Abstract: A method for analyzing a sample with a charged particle beam including directing the beam toward the sample surface; milling the surface to expose a second surface in the sample in which the end of the second surface distal to ion source is milled to a greater depth relative to a reference depth than the end of the first surface proximal to ion source; directing the charged particle beam toward the second surface to form one or more images of the second surface; forming images of the cross sections of the multiple adjacent features of interest by detecting the interaction of the electron beam with the second surface; assembling the images of the cross section into a three-dimensional model of one or more of the features of interest. A method for forming an improved fiducial and determining the depth of an exposed feature in a nanoscale three-dimensional structure is presented.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: July 17, 2018
    Assignee: FEI Company
    Inventors: Stacey Stone, Sang Hoon Lee, Jeffrey Blackwood, Michael Schmidt, Hyun Hwa Kim
  • Patent number: 10010366
    Abstract: Surgical devices and methods are described herein that provide energy density control during tissue sealing. In general, these devices include a handle portion, an elongate shaft, and an end effector having a first jaw having a first tissue engaging surface and a second jaw having a second tissue engaging surface. The first tissue engaging surface can include an energy delivering electrode having a selected pattern of varying conductivity which may include a discrete region or a continuous pattern. The energy delivering electrode may be formed from a polymer substrate that includes a metal. The metal may be mixed into the substrate using an ion beam process. The amount of ions in the ion beam, the energy of the ion beam, or both may be varied to create the selected pattern of varying conductivity.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: July 3, 2018
    Assignee: Ethicon LLC
    Inventor: Geoffrey S. Strobl
  • Patent number: 10006085
    Abstract: The present invention relates to nanocones and nanomaterials. In one embodiment, the present invention provides a method of fabricating an array of nanostructures on a flexible film, comprising self-assembling a layer of particles on a film, and fabricating an array of nanostructures by etching and/or modifying the film. In another embodiment, the present invention provides a microarray comprising a nanomaterial comprising a film configured for an array of one or more nanocones.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: June 26, 2018
    Assignee: The Regents of The University Of California
    Inventors: Robert M. Corn, Mana Toma, Gabriel Loget, Han Wai M. Fung
  • Patent number: 9989808
    Abstract: A method for manufacturing a liquid crystal device that includes forming an inorganic alignment layer by emitting an alignment film material that is made of an inorganic material in an oblique direction onto a substrate, and forming an organic alignment layer that is a monomolecular film made of an organic material chemically bonded with the inorganic alignment layer on a surface of the inorganic alignment layer by treating the surface of the inorganic alignment layer with a silane coupling agent that has an alkyl group, wherein a pretilt angle of a liquid crystal molecule is set to a desired angle by selecting the silane coupling agent by the number of carbon atoms.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 5, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Huiping Zhang, Hideo Nakata, Shinsuke Seki, Takao Tanaka
  • Patent number: 9966237
    Abstract: A plasma sputtering apparatus according to one embodiment includes a chamber and a reservoir in fluidic communication with the chamber. The reservoir stores a vapor source therein, and is configured to release vapor at a predetermined rate. The vapor released by the reservoir is effective to diminish an etch rate of a first magnetic material, the vapor having a smaller effect on an etch rate of a second magnetic material that is different than the first magnetic material. The apparatus also includes a mount for a substrate and a plasma source.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: May 8, 2018
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Biskeborn, Calvin S. Lo, Cherngye Hwang, Andrew C. Ting
  • Patent number: 9966092
    Abstract: To provide an ion beam etching method which enables a highly uniform IBE process even under a low-angle-incident static condition, without increase in the size of an apparatus. The ion beam etching method includes: changing a position of an opening portion with respect to a substrate; etching the substrate with an ion beam passing through the opening portion; and reducing a tilt angle as a center of a site where the ion beam is incident on the substrate moves away from the ion source.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: May 8, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yasushi Kamiya, Hiroshi Akasaka, Kiyotaka Sakamoto
  • Patent number: 9931670
    Abstract: An ultrasonic transmitter includes a piezoelectric integrated thin film transistor (PITFT). The transistor includes a top gate electrode, a bottom gate electrode, and a piezoelectric layer. The piezoelectric layer generates vibrations in response to a voltage applied across the top gate electrode and the bottom gate electrode. The transistor includes micro-electrical-mechanical systems (MEMS) mechanically coupled to the PITFT. The MEMS includes a resonator that transmits ultrasonic pressure waves based on the vibrations.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: April 3, 2018
    Assignee: Konica Minolta Laboratory U.S.A., Inc.
    Inventor: Jun Amano
  • Patent number: 9927558
    Abstract: Embodiments comprise a system created through fabricating a lens array through which lasers are emitted. The lens array may be fabricated in the semiconductor substrate used for fabricating the lasers or may be a separate substrate of other transparent material that would be aligned to the lasers. In some embodiments, more lenses may be produced than will eventually be used by the lasers. The inner portion of the substrate may be formed with the lenses that will be used for emitting lasers, and the outer portion of the substrate may be formed with lenses that will not be used for emitting lasers—rather, through etching these additional lenses, the inner lenses may be created with a higher quality.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: March 27, 2018
    Assignee: TRILUMINA CORP.
    Inventors: Richard F. Carson, John R. Joseph, Mial E. Warren, Thomas A. Wilcox
  • Patent number: 9897856
    Abstract: A display panel and a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposed substrate that are opposite to each other, and a liquid crystal layer located between the array substrate and the opposed substrate. The display panel includes a display area and a non-display area, a phase shift layer is disposed at the non-display area of the array substrate, and the phase shift layer is configured to shift a phase of light passing through the phase shift layer. The display panel is used to solve color cast problem when a TFT-LCD displays a pure color, which is caused by cross color when the display panel is viewed at a side angle.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: February 20, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaochuan Chen, Shijun Wang, Lei Wang, Wenbo Jiang, Yanna Xue, Yue Li, Zhiying Bao, Wenjun Xiao, Zhenhua Lv, Yong Zhang
  • Patent number: 9870899
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 16, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9831428
    Abstract: Memory cell architectures and methods of forming the same are provided. An example memory cell can include a switch element and a memory element. A middle electrode is formed between the memory element and the switch element. An outside electrode is formed adjacent the switch element or the memory element at a location other than between the memory element and the switch element. A lateral dimension of the middle electrode is different than a lateral dimension of the outside electrode.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: November 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Marcello Ravasio, Samuele Sciarrillo, Andrea Gotti