Reversing Current Or Voltage Patents (Class 205/103)
  • Patent number: 11536521
    Abstract: An apparatus and method of forming a hybrid heat exchanger including a first manifold defining a first fluid inlet and a second manifold defining a second fluid inlet. A monolithic core body includes a first set of flow passages in fluid communication with the first manifold and a second set of flow passages is in communication with the second manifold. At least a portion of the first manifold or the second manifold has a tunable coefficient of thermal expansion that is less than a coefficient of thermal expansion of the structurally rigid monolithic core.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 27, 2022
    Assignee: Unison Industries, LLC
    Inventors: Gordon Tajiri, Emily Marie Phelps, Dattu G V Jonnalagadda, Joseph Richard Schmitt
  • Patent number: 11447608
    Abstract: Composite materials include a steel matrix with reinforcing carbon fiber integrated into the matrix, and having unreinforced regions suitable for stamping or other deformation. The composite materials have substantially lower density than steel, and are expected to have appreciable strength within regions having the reinforcing carbon fiber, while having greater deformability in unreinforced regions. Methods for forming composite steel composites includes combining at least two laterally spaced apart reinforcing carbon fiber components, such as a carbon fiber weave, with steel nanoparticles and sintering the steel nanoparticles in order to form a steel matrix with reinforcing carbon fiber integrated therein, and unreinforced regions located in the lateral spaces between carbon fiber components.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: September 20, 2022
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventor: Michael Paul Rowe
  • Patent number: 11079518
    Abstract: An optical element includes a primary electrode, a secondary electrode overlapping at least a portion of the primary electrode, and a structurally-modified and transparent electroactive polymer disposed between and abutting the primary electrode and the secondary electrode. An optical device may include a tunable lens and an optical element disposed over at least one surface of the tunable lens.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: August 3, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Katherine Marie Smyth, Andrew John Ouderkirk, Spencer Allan Wells
  • Patent number: 10995797
    Abstract: A bearing component of a rolling element bearing, such as a rolling element, a bearing ring, and/or a cage for retaining rolling elements of a rolling element bearing, has an outer surface with a plating layer providing at least 97 wt. % tin. The tin of the plating layer provides alpha and beta phases of tin in an alpha/beta phase ratio of less than 10%.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: May 4, 2021
    Assignee: AKTIEBOLAGET SKF
    Inventors: Xiaobo Zhou, Yannick Baubet, Johannes Biegner, Christine Matta, Hubertus Laurentius Maria Peek, Hans Verschoor, Roel van der Zwaan
  • Patent number: 10874021
    Abstract: A method for manufacturing a wiring board that has a rewiring layer on a surface thereof includes forming an insulating layer on a core substrate, forming a groove, in which a wiring layer of a circuit pattern is to be provided, on the insulating layer, forming a metal seed layer on an exposed face of the insulating layer on which the groove is formed, electrodepositing metal, which is to form the wiring layer, by plating to fill the groove with the metal to form a metal layer on the seed layer, machining the metal layer by a cutting tool to remove the metal layer up to a position not reaching the top of the insulating layer, and performing etching or a CMP process to expose the top of the insulating layer thereby to form the wiring layer in the groove and flatten an exposed face of the wiring layer.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: December 22, 2020
    Assignee: DISCO CORPORATION
    Inventors: Ye Chen, Frank Wei
  • Patent number: 10679930
    Abstract: A fan-out wafer level package is disclosed, which includes: a redistribution layer; a semiconductor chip electrically connected with the redistribution layer through a bump; a protective member protecting the semiconductor chip, wherein a part of the protective member is removed such that the upper surface of the semiconductor chip is exposed in order to dissipate heat and prevent warpage; and an interconnector disposed outside the semiconductor chip at substantially the same level and having a lower part electrically connected with the redistribution layer and an upper part not being covered with the protective member, wherein the interconnector includes a metal core solder ball, the metal core solder ball includes a metal core and a solder buffer between the metal core and the protective member, and the metal core is formed of a combination of copper (Cu), nickel (Ni), and silver (Ag).
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: June 9, 2020
    Assignee: HANA MICRON INC.
    Inventors: Hyun Woo Lee, Jin Wook Jeong, Hyun Joo Kim, Jin Young Ock
  • Patent number: 10508358
    Abstract: Forming a transition zone terminated superconformal filling in a recess includes: providing an electrodeposition composition including: a metal electrolyte including a plurality of metal ions, solvent, and suppressor; providing the article including: a field surface and the recess that includes a distal position and a proximate position; exposing the recess to the electrodeposition composition; potentiodynamically controlling an electric potential of the recess with a potential wave form; bifurcating the recess into an active metal deposition region and a passive region; forming a transition zone; decreasing the electric potential of the recess by the potential wave form; progressively moving the transition zone closer to the field surface and away from the distal position; and reducing the metal ions and depositing the metal in the active metal deposition region and not in the passive region to form the transition zone terminated superconformal filling in the recess of the substrate.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: December 17, 2019
    Assignee: GOVERNMENT OF THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE
    Inventors: Daniel Josell, Thomas P. Moffat
  • Patent number: 10501860
    Abstract: Method for electroplating a metal onto a flat substrate P. Surfaces are electrically polarized for metal deposition by feeding thereto at least one first and second forward-reverse pulse current sequences. The first forward-reverse pulse current sequence includes a first forward pulse generating a first cathodic current during a first forward pulse duration tf1 and having a first forward pulse peak current if1, and a first reverse pulse generating a first anodic current during a first reverse pulse duration tr1 and having a first reverse pulse peak current ir1, the second forward-reverse pulse current sequence including a second forward pulse generating a second cathodic current during a second forward pulse duration tf2 and having a second forward pulse peak current if2, and a second reverse pulse generating a second anodic current during a second reverse pulse duration tr2, the second reverse pulse having a second reverse pulse peak current ir2.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 10, 2019
    Assignee: Atotech Deutschland GmbH
    Inventors: Toshia Fujiwara, Horst Brüggmann, Roland Herold, Thomas Schiwon
  • Patent number: 10448909
    Abstract: The invention relates to a combined imaging detector (110) for the detection of x-ray and gamma quanta. The combined imaging detector (110) is adapted for simultaneous detection of gamma and x-ray quanta. The combined imaging detector (110) includes an x-ray anti-scatter grid (111), a layer of x-ray scintillator elements (112), a first photodetector array (113), a layer of gamma scintillator elements (114), and a second photodetector array (115) that are arranged in a stacked configuration along a radiation-receiving direction (116). The x-ray anti-scatter grid (111) comprises a plurality of septa (117A, B, C) that define a plurality of apertures (118) which are configured to collimate both x-ray quanta and gamma quanta received from the radiation receiving direction (116) such that received gamma quanta are collimated only by the x-ray anti-scatter grid (111). The use of the x-ray anti-scatter grid as a collimator for received gamma quanta results in a significantly lighter combined imaging detector.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: October 22, 2019
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Herfried Karl Wieczorek, Andreas Goedicke, Peter Lex Alving
  • Patent number: 10416092
    Abstract: Methods and apparatus for detecting the presence or absence of unwanted metal deposits on a substrate holder of an electroplating apparatus are described herein. In various embodiments, a plating sensor is used to detect unwanted metal deposits. The plating sensor may be mounted relatively far away from the area that it measures (e.g., the sensor target area). For instance, the plating sensor may be on one side of the electroplating apparatus (in some cases mounted on a drip shield), and the sensor target area may be on the opposite side of the electroplating apparatus. In this way, the plating sensor can measure across the electroplating apparatus. This placement provides a relatively deep depth of focus for the plating sensor, and provides some physical separation between the plating sensor and the electroplating chemistry. Both of these factors lead to more reliable detection results.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: September 17, 2019
    Assignee: Lam Research Corporation
    Inventors: Rajan Arora, Jared Herr, Jason Daniel Marchetti, Steven T. Mayer, James R. Zibrida
  • Patent number: 10357829
    Abstract: The present disclosure provides three-dimensional (3D) printing methods, apparatuses, systems and/or software to form one or more three-dimensional objects, some of which may be complex. The three-dimensional objects may be formed by three-dimensional printing using one or more methodologies. In some embodiments, the three-dimensional object may comprise an overhang portion, such as a cavity ceiling, with diminished deformation and/or auxiliary support structures.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: July 23, 2019
    Assignee: Velo3D, Inc.
    Inventors: Brian Charles Spink, Zachary Ryan Murphree, Tasso Lappas, Kimon Symeonidis, Rueben Joseph Mendelsberg
  • Patent number: 10227707
    Abstract: An electroplating processor has a vessel holding an electrolyte. An inert anode in the vessel has an anode wire within an anode membrane tube. A head for holds a wafer in contact with the electrolyte in the vessel. The wafer is connected to a cathode. A catholyte replenisher is connected to the vessel. The catholyte replenisher adds metal ions into the catholyte by moving ions of a bulk metal through a catholyte membrane in the catholyte replenisher.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: March 12, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Gregory J. Wilson, Paul R. McHugh, John L. Klocke
  • Patent number: 10227698
    Abstract: A hybrid sacrificial galvanic anode, an anodic system including the hybrid sacrificial anode, and a method of cathodically protecting steel reinforcement in concrete structures is provided. The hybrid anode provides initial steel polarization followed by long term galvanic protection without the use of batteries or external power supplies.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: March 12, 2019
    Assignee: Construction Research & Technology GmbH
    Inventor: Frederick R. Goodwin
  • Patent number: 10147510
    Abstract: A method for electroplating a nonmetallic grating including providing a nonmetallic grating; performing an atomic layer deposition (ALD) reaction to form a seed layer on the nonmetallic grating; and electroplating a metallic layer on the seed layer such that the metallic layer uniformly and conformally coats the nonmetallic grating. An apparatus including a silicon substrate having gratings with an aspect-ratio of at least 20:1; a atomic layer deposition (ALD) seed layer formed on the gratings; and an electroplated metallic layer formed on the seed layer, wherein the electroplated metallic layer uniformly and conformally coats the gratings.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: December 4, 2018
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Adam M. Rowen, Robert K. Grubbs, Jonathan Joseph Coleman
  • Patent number: 9972848
    Abstract: The present invention is to provide fine catalyst particles with better catalytic performance than ever before and a carbon-supported catalyst with better catalytic performance than ever before.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: May 15, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Noriyuki Kitao, Hiroko Kimura, Makoto Adachi, Keiichi Kaneko
  • Patent number: 9963797
    Abstract: The method for copper electroplating according to the present invention comprises an aqueous acidic copper plating bath containing a leveler additive which forms copper trenches having a cross-sectional round shape under direct current plating conditions, and at least one reverse current pulse cycle consisting of one forward current pulse and one reverse current pulse wherein the fraction of the reverse charge to the forward charge applied to the substrate in said at least one current pulse cycle ranges between 0.1 to 5%. The method is particularly suitable for simultaneously filling blind micro vias and plating trenches with a rectangular cross-sectional shape.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: May 8, 2018
    Assignee: Atotech Deutschland GmbH
    Inventors: Andreas Macioβek, Olivier Mann, Pamela Cebulla
  • Patent number: 9960078
    Abstract: A method for forming conductive structures for a semiconductor device includes depositing a reflow liner on walls of trenches formed in a dielectric layer and depositing a reflow material on the reflow liner. The reflow material is reflowed to collect in a lower portion of the trenches. The depositing and the reflowing steps are repeated until the trenches are aggregately filled with the reflow material. The reflow material is planarized to form conductive structures in the trenches.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 1, 2018
    Assignee: International Business Machines Corporation
    Inventors: Lawrence A. Clevenger, Su Chen Fan, Huai Huang, Koichi Motoyama, Wei Wang, Chih-Chao Yang
  • Patent number: 9950314
    Abstract: The present invention is to provide fine catalyst particles to which sulfate ions are less likely to be adsorbed, and a carbon-supported catalyst to which sulfate ions are less likely to be adsorbed.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: April 24, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Makoto Adachi, Naoki Takehiro, Keiichi Kaneko
  • Patent number: 9926638
    Abstract: The purpose of the present invention is to provide an electrical Al plating bath that poses little danger of exploding or igniting as a result of contacting air or water, and contains no benzene, toluene, xylene, naphthalene, or 1,3,5-trimethylbenzene, which have detrimental effects to humans. The present invention provides an electrical aluminum or aluminum alloy fused salt plating bath that is obtained by heat treatment of an electrical aluminum or aluminum alloy fused salt plating bath containing (A) a halogenated aluminum as the primary component and (B) at least one other type of halide after adding (C) one, two or more reducible compounds selected from the group consisting of hydrides of elements in Group 1 Periods 2 through 6 of the Periodic Table of Elements and/or hydrides of Group 13 Periods 2 through 6 of the Periodic Table of Elements and amine borane compounds.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: March 27, 2018
    Assignee: DIPSOL CHEMICALS CO., LTD.
    Inventors: Manabu Inoue, Akira Hashimoto, Tadahiro Onuma, Toshiki Inomata, Keisuke Nonomura, Naruaki Konno
  • Patent number: 9847183
    Abstract: The present invention relates to a nano-porous electrode for a super capacitor and a manufacturing method thereof, and more specifically, to a nano-porous electrode for a super capacitor and a manufacturing method thereof wherein pores are formed on the surface or inside an electrode using an electrodeposition method accompanied by hydrogen generation, thereby increasing the specific surface area of the electrode and thus improving the charging and discharging capacity, energy density, output density, and the like of a capacitor.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: December 19, 2017
    Assignee: SUNGKYUNKWAN UNIVERSITY FOUNDATION FOR CORPORATE COLLABORATION
    Inventors: Chanhwa Chung, Myung Gi Jeong, Serhiy Cherevko
  • Patent number: 9758891
    Abstract: The technology described herein sets forth methods of making low stress or stress free coatings and articles using electrodeposition without the use of stress reducing agents in the deposition process. The articles and coatings can be layered or nanolayered wherein in the microstructure/nanostructure and composition of individual layers can be independently modulated.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: September 12, 2017
    Assignee: Modumetal, Inc.
    Inventor: Zhi Liang Bao
  • Patent number: 9745863
    Abstract: Provided is a method of manufacturing a rotary machine, which includes: a casing forming process of forming a casing of the rotary machine that has multiple opening parts and suctions and discharges a fluid; a surface activating process of supplying a pretreatment liquid into the casing, then discharging the pretreatment liquid from the casing through the opening parts, and activating an inner surface of the casing after the casing forming process; a plating process of performing supply and discharge of a plating liquid into and from the easing through the opening parts to circulate the plating liquid and plating the inner surface of the casing after the surface activating process; and an assembling process of providing a rotating body that is rotatable relative to the casing so as to he covered from an outer circumference side by the casing plated in the plating process.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: August 29, 2017
    Assignee: MITSUBISHI HEAVY INDUSTRIES COMPRESSOR CORPORATION
    Inventors: Yusuke Ishibashi, Yuya Konno, Yujiro Watanabe, Toyoaki Yasui, Kazunari Tanaka, Kosei Kawahara, Yohei Fuchigami, Toshio Nishina
  • Patent number: 9681828
    Abstract: A physiological characteristic sensor, a method for forming a physiological characteristic sensor, and a method for forming a platinum deposit having a rough surface are presented here. The method for forming a physiological characteristic sensor includes immersing a sensor electrode in a platinum electrolytic bath. Further, the method includes performing an electrodeposition process by sequentially applying a pulsed signal to the sensor electrode and applying a non-pulsed continuous signal to the sensor electrode to form a platinum deposit on the sensor electrode.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: June 20, 2017
    Assignee: MEDTRONIC MINIMED, INC.
    Inventors: Steven C. Jacks, Raghavendhar Gautham, Bradley C. Liang, Megan E. Little, Daniel E. Pesantez, Rajiv Shah
  • Patent number: 9646951
    Abstract: In one embodiment, a conductor bump is formed on an under bump conductor of a semiconductor device to extend a first distance away from a surface of the under bump conductor including forming a protective layer on an outer surface of the conductor bump wherein the plurality of semiconductor dies are subsequently singulated by etching through the semiconductor substrate with an etchant and wherein the protective layer protects the conductor bump from the etchant.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: May 9, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Richard D. Moyers, Sudhama C. Shastri
  • Patent number: 9624593
    Abstract: To manufacture a chamber component for a processing chamber a first anodization layer is formed on a metallic article with impurities, the first anodization layer having a thickness greater than about 100 nm, and an aluminum coating is formed on the first anodization layer, the aluminum coating being substantially free from impurities. A second anodization layer can be formed on the aluminum coating.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: April 18, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Jennifer Y. Sun, Biraja P. Kanungo
  • Patent number: 9435048
    Abstract: The present disclosure relates to an electro-chemical plating (ECP) process that provides for an isotropic deposition, and a related apparatus. In some embodiments, the disclosed ECP process is performed by providing a substrate into an electroplating solution comprising a plurality of ions of a material to be deposited. A periodic patterned signal, which alternates between a first value and a different second value, is applied to the substrate. When the periodic patterned signal is at the first value, ions from the electroplating solution affix to the substrate. When the periodic patterned signal is at the second value, ions from the electroplating solution do not affix to the substrate. By using the periodic patterned signal to perform electro-chemical plating, the deposition rate of the plating process is reduced, resulting in an isotropic deposition over the substrate that mitigates gap fill problems (e.g., void formation).
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Su-Horng Lin, Chi-Ming Yang
  • Patent number: 9343407
    Abstract: Techniques formation of high purity copper (Cu)-filled lines and vias are provided. In one aspect, a method of fabricating lines and vias filled with high purity copper with is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A Cu layer is deposited on the Ru layer by a sputtering process. A reflow anneal is performed to eliminate voids in the lines and vias.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: May 17, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Fenton Read McFeely, Chih-Chao Yang
  • Patent number: 9279178
    Abstract: Sputtering targets having a reduced burn-in time are disclosed that comprise: a) a heat-modified surface material having a substantially uniform crystallographic orientation, wherein at least part of the surface material was melted during heat-treatment, and b) a core material having an average grain size. Sputtering targets are also disclosed that include a heat-modified surface material having network of shallow trenches, alternating rounded peaks and valleys in the surface of the target or a combination thereof, wherein at least part of the surface material was melted during heat-treatment, and a core material having an average grain size. Methods of producing sputtering targets having reduced burn-in times comprises: a) providing a sputtering target comprising a sputtering surface having a sputter material and a crystal lattice, and b) heat-modifying the sputtering surface in order to melt at least part of the surface material and modify the crystal lattice.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: March 8, 2016
    Assignee: Honeywell International Inc.
    Inventors: Janine K. Kardokus, Michael Pinter, Michael D. Payton, Steven (Chi Tse) Wu, Jared Akins, Werner Hort
  • Patent number: 9260790
    Abstract: Polycrystalline materials are prepared by electrodeposition of a precursor material that is subsequently heat-treated to induce at least a threefold increase in the grain size of the material to yield a relatively high fraction of ‘special’ low ? grain boundaries and a randomized crystallographic texture. The precursor metallic material has sufficient purity and a fine-grained microstructure (e.g., an average grain size of 4 nm to 5 ?m). The resulting metallic material is suited to the fabrication of articles requiring high mechanical or physical isotropy and/or resistance to grain boundary-mediated deformation or degradation mechanisms.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: February 16, 2016
    Assignee: INTEGRAN TECHNOLOGIES INC.
    Inventors: Gino Palumbo, Iain Brooks, Klaus Tomantschger, Peter Lin, Karl Aust, Nandakumar Nagarajan, Francisco Gonzalez
  • Patent number: 9005420
    Abstract: Variable property deposit, at least partially of fine-grained metallic material, optionally containing solid particulates dispersed therein, is disclosed. The electrodeposition conditions in a single plating cell are suitably adjusted to once or repeatedly vary at least one property in the deposit direction. In one embodiment denoted multidimension grading, property variation along the length and/or width of the deposit is also provided. Variable property metallic material deposits containing at least in part a fine-grained microstructure and variable property in the deposit direction and optionally multidimensionally, provide superior overall mechanical properties compared to monolithic fine-grained (average grain size: 2 nm-5 micron), entirely coarse-grained (average grain size: >20 micron) or entirely amorphous metallic material deposits.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: April 14, 2015
    Assignee: Integran Technologies Inc.
    Inventors: Klaus Tomantschger, Glenn Hibbard, Gino Palumbo, Iain Brooks, Jonathan McCrea, Fred Smith
  • Patent number: 8911607
    Abstract: The present disclosure generally relates to techniques for electro-depositing nano-patterns. More specifically, systems and methods for fabricating periodic structures in complex nano-patterns are described. An electrical signal may be applied to one or more electrodes that are positioned about a surface of a substrate. The periodicity of the deposited pattern may be influenced by one or more parameters associated with an applied electrical signal, including one or more of frequency, amplitude, period, duty cycle, etc. The weight of each deposited line on the substrate may be influenced by the described parameters, and the shape of the pattern may be influenced by the number, shape, and position of electrodes.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: December 16, 2014
    Assignee: Empire Technology Development LLC
    Inventor: Ezekiel Kruglick
  • Patent number: 8906216
    Abstract: Bipolar current electrodeposits a nanocrystalline grain size. Polarity Ratio relates the absolute value of time integrated amplitude of negative polarity and positive polarity current. Grain size can be controlled in alloys of two or more components, one of which being a metal, and one of which being most electro-active. Typically the more electro-active material is preferentially lessened in the deposit during negative current. The deposit is relatively crack and void free. Grain size is typically a function of deposit composition, which is typically a function of Polarity Ratio. Specified grain size can be achieved by selecting a corresponding Polarity Ratio. Coatings can be in layers, each having a grain size, which can vary layer to layer and also in a graded fashion. A finished article may be built upon a substrate of electro-conductive plastic, or metal, including steels, aluminum, brass. The substrate may remain, or be removed.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: December 9, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: Andrew J. Detor, Christopher A. Schuh
  • Patent number: 8877632
    Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for providing void-free filled interconnect structures in a dielectric layer of a package assembly. In one embodiment, the method for providing a void-free filled interconnect structure may include forming a through hole through a layer of a package substrate, and depositing a conductive material to fill the through hole. Depositing the conductive material may be performed while gradually increasing a current density of the conductive material and correspondingly changing a flow rate of the conductive material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: November 4, 2014
    Assignee: Intel Corporation
    Inventors: Amanda E. Schuckman, Mark S. Hlad
  • Publication number: 20140290565
    Abstract: The present invention relates to a method for producing graphene on a face-centered cubic metal catalyst having a plane oriented in one direction, and more particularly to a method of producing graphene on a metal catalyst having the (100) or (111) crystal structure and a method of producing graphene using a catalyst metal foil having a single orientation, obtained by electroplating a metal catalyst by a pulse wave current and annealing the metal catalyst. The invention also relates to a method of producing graphene using a metal catalyst, and more particularly to a method of producing graphene, comprising the steps of: alloying a metal catalyst with an alloying element; forming step structures on the metal catalyst substrate in an atmosphere of a gas having a molecular weight of carbon; and supplying hydrocarbon and hydrogen gases to the substrate. On unidirectionally oriented metal catalyst prepared according to the present invention, graphene can be grown uniformly and epitaxially.
    Type: Application
    Filed: October 18, 2012
    Publication date: October 2, 2014
    Inventors: Kang Hyung Kim, Kwan Sub Maeng, Chol Woo Park, Se Won Cha, Se Youn Hong, Byung Hee Hong, Myung Hee Jung, Kyung Eun Kim, Su Beom Park
  • Patent number: 8815072
    Abstract: A process is provided for roughening both sides of a copper plate by forming protrusions with fine bump shapes on both sides of the copper plate in an electroplating solution for plating copper while reducing deterioration of the electroplating solution. Opposed pairs of negative electrodes (3c) and positive electrodes (3a) are provided in an electroplating copper solution (2), and a copper plate (4) is arranged between the pair of negative electrodes (3c). An anodic treatment for generating copper fine particles on both surfaces of the copper plate (4) is carried out by performing an electrolytic process for three to ten minutes with the copper plate (4) as a positive electrode between the negative electrodes (3c).
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: August 26, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Hajime Watanabe, Sadao Ishihama, Kiyoteru Yamamoto, Takahiro Imai, Toshihiro Oyoshi
  • Patent number: 8784634
    Abstract: Disclosed is an electroplating method for filling cavities, through holes, blind holes, or micro blind holes of a work piece with metals. According to said method, the work piece containing cavities, through holes, blind holes, or micro blind holes is brought in contact with a metal deposition electrolyte, and a voltage is applied between the work piece and at least one anode such that a current flow is fed to the work piece. The invention method is characterized in that the electrolyte encompasses a redox system.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 22, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Bernd Roelfs, Tafadzwa Magaya, Markus Youkhanis, René Wenzel, Soungsoo Kim
  • Publication number: 20140178710
    Abstract: An aluminum alloy component is protected by an electrodeposited aluminum coating. An electrodeposited intermediate aluminum-transition metal alloy and/or rare earth metal alloy layer between the aluminum alloy substrate and the protective coating enhances coating adhesion and corrosion resistance. The intermediate layer is formed by room temperature electrodeposition in ionic liquids.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 26, 2014
    Applicant: UNITED TECHNOLOGIES CORPORATION
    Inventors: Lei Chen, Mark R. Jaworowski, Curtis H. Riewe, Xiaomei Yu
  • Patent number: 8652649
    Abstract: Coated articles and methods for applying coatings are described. In some cases, the coating can exhibit desirable properties and characteristics such as durability, corrosion resistance, and high conductivity. The articles may be coated, for example, using an electrodeposition process.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: February 18, 2014
    Assignee: Xtalic Corporation
    Inventors: John Cahalen, Alan C. Lund, Christopher A. Schuh
  • Publication number: 20130334053
    Abstract: There is provided a method of well filling copper in a conductivity-rendered non-through hole having an aspect ratio (depth/hole diameter) of 5 or more on a substrate in a short period of time, and the method comprises using an acidic copper plating bath comprising a water-soluble copper salt, sulfuric acid, chlorine ion, a brightener and a copolymer of diallylamines and sulfur dioxide and filling copper in the non-through hole by periodic current reversal copper plating.
    Type: Application
    Filed: August 23, 2013
    Publication date: December 19, 2013
    Applicants: NITTO BOSEKI CO., LTD., OSAKA PREFECTURE UNIVERSITY PUBLIC CORPORATION
    Inventors: Kazuo KONDO, Takeyasu Saito, Naoki Okamoto, Masaru Bunya, Minoru Takeuchi
  • Publication number: 20130220819
    Abstract: A layer of chromium metal is electroplated from trivalent chromium onto an electrically conducting substrate by immersing the substrate and a counter electrode in a electroplating bath and passing a modulated electric current between the electrodes. In one embodiment, the current contains pulses that are cathodic with respect to said substrate and in another embodiment the current contains pulses that are cathodic and pulses that are anodic with respect to said substrate. The cathodic pulses have a duty cycle greater than about 80%.
    Type: Application
    Filed: February 15, 2013
    Publication date: August 29, 2013
    Applicant: Faraday Technology, Inc.
    Inventors: Timothy Hall, Burhanuddin Kagajwala
  • Patent number: 8500983
    Abstract: A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In a specific example, potentiostatic control is employed to produce a current density in the range of about 1.5 to 20 mA/cm2. The immersion step is followed by a high current pulse step. During bottom up fill inside the features of the wafer, a constant current or a current with a micropulse may be used. This protocol may protect the seed from corrosion while enhancing nucleation during the initial stages of plating.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 6, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas A. Ponnuswamy, Bryan Pennington, Clifford Berry, Bryan L. Buckalew, Steven T. Mayer
  • Patent number: 8449948
    Abstract: A method for providing a structure in a magnetic recording transducer is described. The method includes plating a first layer in a plating bath using a first plurality of plating conditions. The first layer has a first galvanic potential. The method also includes modifying the plating bath and/or the first plurality of plating conditions to provide a modified plating bath and/or a second plurality of plating conditions. The method further includes plating a second layer using the modified plating bath and/or the second plurality of plating conditions. The second layer has a second galvanic potential. The first galvanic potential is between the second galvanic potential and a third galvanic potential of a third layer if the third layer adjoins the first layer. The second galvanic potential is between the first galvanic potential and the third galvanic potential of the third layer if the third layer adjoins the second layer.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: May 28, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Jose Antonio Medina, Keith Y. Sasaki
  • Patent number: 8449739
    Abstract: A method of coating a carbon article with a metal by reductively electropolymerizing the metal via cyclic voltammetry on the carbon article, thereby forming a metal coating on the carbon article and the polymerized metal-coated carbon article made by the method. A polymerized metal-coated carbon article having a carbon article and a metal coating disposed on an exterior surface of the carbon article, the coating being present in an amount less than about 0.1 mg/cm2. A method of using a fuel cell by forming a fuel cell with a polymerized metal-coated carbon article as a working electrode and reducing oxygen, thereby providing power to a vehicle. A fuel cell including a polymerized metal-coated carbon article as a working electrode.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: May 28, 2013
    Assignee: Northern Illinois University
    Inventors: Rathindra N. Bose, Anima B. Bose
  • Publication number: 20130062210
    Abstract: Manufacturing methods of a substrate and a wiring substrate include a step A of forming a primary plating layer on a lower side of a glass substrate having a through-hole; a step B of sealing a lower opening of the through-hole by forming a first layer on an upper side using electroplating; and a step C of filling the through-hole by depositing a second layer in the through-hole using electroplating from the upper side. In the step A, the primary plating layer is formed on from a lower opening edge to a partial sidewall surface of the through-hole. In the step B, the lower opening is sealed by growing the first layer from a primary plating layer surface inside the through-hole. In the step C, the through-hole is filled with plating metal by growing the second layer from a first layer surface inside the through-hole toward an upper opening.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 14, 2013
    Applicant: HOYA CORPORATION
    Inventors: Takashi FUSHIE, Hajime KIKUCHI
  • Publication number: 20120175534
    Abstract: There is described an open cell porous structure the cells of which are optionally filled with an elastomeric or thermosetting plastic comprising a nanocrystalline metallic or nanocrystalline metal matrix composite coating wherein the nanocrystals have a crystallite size of from about 5 nm to about 150 nm. A process for preparing the coated open cell porous structures is also disclosed.
    Type: Application
    Filed: June 9, 2010
    Publication date: July 12, 2012
    Applicant: UNIVERSITAET DES SAARLANDES
    Inventors: Anne Jung, Harald Natter, Rolf Hempelmann, Ehrhardt Lach
  • Publication number: 20120145551
    Abstract: A process is described for the fabrication, through electrodeposition, of FexCoyNiz (x=60-71, y=25-35, z=0-5) films that have, in their as-deposited form, a saturation magnetization of at least 24 kG and a coercivity of less than 0.3 Oe. A key feature is the addition of aryl sulfinates to the plating bath along with a suitable seed layer.
    Type: Application
    Filed: February 20, 2012
    Publication date: June 14, 2012
    Applicant: HEADWAY TECHNOLOGIES, INC.
    Inventors: Xiaomin Liu, Feiyue Li, Cherng-Chyi Han
  • Publication number: 20120135260
    Abstract: Nanopillars with nanoscale diameters are provided where the nanopillar has uniformly aligned nano-twins either perpendicular or inclined by 1-90° to the pillar-axis with no grain-boundaries or any other features.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 31, 2012
    Applicant: THE CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Dongchan Jang, Julia R. Greer
  • Patent number: 8147659
    Abstract: A gated electrode structure for altering a potential and electric field in an electrolyte near at least one working electrode is disclosed. The gated electrode structure may comprise a gate electrode biased appropriately with respect to a working electrode. Applying an appropriate static or dynamic (time varying) gate potential relative to the working electrode modifies the electric potential and field in an interfacial region between the working electrode and the electrolyte, and increases electron emission to and from states in the electrolyte, thereby facilitating an electrochemical, electrolytic or electrosynthetic reaction and reducing electrode overvoltage/overpotential.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: April 3, 2012
    Assignee: The Regents of the University of California
    Inventors: Rakesh K. Lal, Likun Shen, Umesh Kumar Mishra
  • Patent number: 8117743
    Abstract: A method includes providing a voltage switchable dielectric material having a characteristic voltage, exposing the voltage switchable dielectric material to a source of ions associated with an electrically conductive material, and creating a voltage difference between the source and the voltage switchable dielectric material that is greater than the characteristic voltage. Electrical current is allowed to flow from the voltage switchable dielectric material, and the electrically conductive material is deposited on the voltage switchable dielectric material. A body comprises a voltage switchable dielectric material and a conductive material deposited on the voltage switchable dielectric material using an electrochemical process. In some cases, the conductive material is deposited using electroplating.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: February 21, 2012
    Assignee: Shocking Technologies, Inc.
    Inventor: Lex Kosowsky
  • Patent number: 8062496
    Abstract: An apparatus and method is disclosed for simultaneously electroplating at least two parts in a series electrical configuration in an electroplating system using a shared electrolyte with excellent consistency in thickness profiles, coating weights and coating microstructure. Parts in high volume and at low capital and operating cost are produced as coatings or in free-standing form.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: November 22, 2011
    Assignee: Integran Technologies Inc.
    Inventor: Klaus Tomantschger