Reversing Current Or Voltage Patents (Class 205/103)
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Patent number: 6790332Abstract: A method for galvanically depositing nickel, cobalt, nickel alloys or cobalt alloys in a galvanic bath includes using electrolytes containing nickel compounds or cobalt compounds. At least one anode and at least one cathode of the bath are subject to periodic current pulses. The IA/IC ratio of the anode current density IA to the cathode current density IC is selected to be greater than 1 and smaller than 1.5, where the anode current density IA and the cathode current density IC are defined as current densities with respect to a deposition body on which deposition occurs during the application of periodic current pulses where the deposition body serves as anode and cathode respectively. The charge ratio QA/QC=TAIA/TCIC of the charge QA, transported during anode pulse of duration TA, to the charge QC transported during a cathode pulse of duration TC, is between 30% and 45%.Type: GrantFiled: December 7, 2001Date of Patent: September 14, 2004Assignee: Astrium GmbHInventors: Rüdiger Ewald, Peter Filke, Michael Heckmann, Wolflgang Keinath, Günter Langel, Anton Schmidt
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Patent number: 6783654Abstract: A plating bath which accommodates an insoluble anode and a printed-circuit board, and a copper dissolved bath which supplies copper ions are arranged. The insoluble anode is arranged as opposed to the printed-circuit board being a cathode, and a forward/reverse current is applied between both of the electrodes. Iron ions are added to a plating solution.Type: GrantFiled: March 14, 2001Date of Patent: August 31, 2004Assignee: Kabushiki Kaisha Toyoda Jidoshokki SeisakushoInventors: Toshiki Inoue, Kyoko Kumagai
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Patent number: 6783657Abstract: The present invention provides methods and systems for the electrolytic removal of platinum and/or other of the Group 8-11 metals from substrates.Type: GrantFiled: August 29, 2002Date of Patent: August 31, 2004Assignee: Micron Technology, Inc.Inventors: Eugene P. Marsh, Stefan Uhlenbrock, Donald L. Westmoreland
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Patent number: 6776891Abstract: A method for forming a plated magnetic thin film of high saturation magnetization and low coercivity having the general form Co100−a−bFeaMb, where M can be Mo, Cr, W, Ni or Rh, which is suitable for use in magnetic recording heads that write on narrow trackwidth, high coercivity media. The plating method includes four current application processes: direct current, pulsed current, pulse reversed current and conditioned pulse reversed current.Type: GrantFiled: May 18, 2001Date of Patent: August 17, 2004Assignee: Headway Technologies, Inc.Inventors: Chaopeng Chen, Kevin Lin, Jei Wei Chang
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Patent number: 6773570Abstract: A method and apparatus are described for performing both electroplating of a metal layer and planarization of the layer on a substrate. Electroplating and electroetching of metal (such as copper) are performed in a repeated sequence, followed by chemical-mechanical polishing. An electroplating solution, electroetching solution, and a non-abrasive slurry are dispensed on a polishing pad in the respective process steps. The substrate is held against the pad with a variable force in accordance with the process, so that the spacing between substrate and pad may be less during electroplating than during electroetching.Type: GrantFiled: November 14, 2002Date of Patent: August 10, 2004Assignee: International Business Machines CorporationInventors: Laertis Economikos, Hariklia Deligianni, John M. Cotte, Henry J. Grabarz, Bomy Chen
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Publication number: 20040149584Abstract: An object of the present invention is to provide a plating method which can form defect-free, completely-embedded interconnects of a conductive material in recesses in the surface of a substrate even when the recesses are of a high aspect ratio, and which can improve the flatness of a plated film on the substrate even when narrow trenches and broad trenches are co-present in the surface of the substrate. A plating method according to the present invention includes: providing a high resistance structure between a surface of a substrate, said surface being connected to a cathode electrode, and an anode electrode; filling the space between the substrate and the anode electrode with a plating solution while applying a voltage between the cathode electrode and the anode electrode; and growing a plated film on the surface of the substrate while controlling an electric current flowing between the cathode electrode and the anode electrode at a constant value.Type: ApplicationFiled: December 23, 2003Publication date: August 5, 2004Inventors: Mizuki Nagai, Koji Mishima, Hiroyuki Kanda
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Patent number: 6761814Abstract: A via filling method that provides superior filling properties and superior planarization of the deposited metal layer is provided. This is achieved by a method having a F/R ratio, the ratio of the electric current densities between the forward electrolysis and the reverse electrolysis, is in the range of 1/1 to 1/10 in a PPR electric current method applied with a cycle wherein the forward electrolysis interval is from 1 to 50 msec and the reverse electrolysis interval is from 0.2 to 5 msec.Type: GrantFiled: December 20, 2002Date of Patent: July 13, 2004Assignee: Shipley Company, L.L.C.Inventors: Masaru Kusaka, Hideki Tsuchida
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Patent number: 6755955Abstract: A method for producing a catalytic converter includes depositing a layer of catalytically active metallic material by electrochemical deposition on a planar substrate by immersing the substrate in an electrolyte that contains the catalytically active metallic material. A high overvoltage at which a large number of seeds of the metallic material are formed on the substrate is set for a predetermined first time period between the substrate and the opposing electrode. The overvoltage is reduced for a predetermined second time period to a value at which the seeds which are deposited in the first time period grow on the substrate.Type: GrantFiled: September 24, 2001Date of Patent: June 29, 2004Assignee: DaimlerChrysler AGInventors: Hubertus Biegert, Gabriele Stäb, Gabor Toth, Peter Urban
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Publication number: 20040118691Abstract: An electroplating method not that is especially suited for the filling of vias is provided. In this method, a current is applied in a forward method for a set period of time and then reversed for a set period of time. This method utilizes a rest time either before or after or both before and after the reverse current period.Type: ApplicationFiled: December 23, 2002Publication date: June 24, 2004Applicant: Shipley Company, L.L.C.Inventors: Masaru Kusaka, Hideki Tsuchida
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Patent number: 6750144Abstract: A method for filling recesses of different sizes on a semiconductor substrate comprising immersing a semiconductor substrate having a surface provided with recesses of different sizes in an electroplating bath containing ions of a metal to be deposited on the surface; immersing a counter electrode in the plating bath; passing an electric current between the substrate and the counterelectrode; wherein, in a first electroplating step, the electric current is a modulated reversing electric current comprising a train of pulses that are cathodic with respect to the substrate and pulses that are anodic with respect to the substrate, whereby the pulse train in the first step has a first period, the cathodic pulses have an on-time of from about 0.Type: GrantFiled: February 14, 2003Date of Patent: June 15, 2004Assignee: Faraday Technology Marketing Group, LLCInventor: E. Jennings Taylor
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Patent number: 6746591Abstract: A method and apparatus for electrochemically depositing a metal onto a substrate. The apparatus generally includes a head assembly having a cathode and a wafer holder disposed above the cathode. The apparatus further includes a process kit disposed below the head assembly, the process kit including an electrolyte container configured to receive and maintain a fluid electrolyte therein, and an anode disposed in the electrolyte container. The apparatus further includes a power supply in electrical communication with the cathode and the anode, the power supply being configured to provide a varying amplitude electrical signal to the anode and cathode.Type: GrantFiled: October 16, 2001Date of Patent: June 8, 2004Assignee: Applied Materials Inc.Inventors: Bo Zheng, Renren He, Girish Dixit
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Patent number: 6743501Abstract: The invention concerns the manufacture of complex metallic or metallized porous structures, wherein the electroplating metal over the entire developed surface is preceded by a specific pre-metallization of the basic structure. The pre-metallization is obtained by depositing a conductive polymer, which is deposited on the entire developed surface of the structure by the steps of an oxidizing pre-treatment of the structure, depositing in the liquid phase, a monomer having a polymerized form that is electrically conductive, and polymerizing by oxidation-doping of the monomer. The structures according to the invention are particularly intended for use as electrodes for the electrolysis of liquid effluents, as electrode supports for electrochemical generators, as catalyst supports, filtration media, phonic insulation, electromagnetic and nuclear protection structures, or for other applications.Type: GrantFiled: July 12, 2001Date of Patent: June 1, 2004Assignee: S.C.P.S. Societe de Conseil et de Prospective Scientifique S.A.Inventors: Bernard Bugnet, Max Costa, Denis Doniat
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Patent number: 6740220Abstract: The present invention relates to a method of producing an electrocatalytic cathode for use in an electrochemical cell system comprising the steps of providing a carbon substrate and simultaneously depositing palladium and iridium on the carbon substrate by cyclic voltammetry or by controlled potential coulometry. The simultaneous deposition of the palladium and iridium is preferably carried out using a solution containing 1.0 mM palladium chloride, 2.0 mM sodium hexachloroiridate, 0.2M potassium chloride, and 0.1M hydrochloric acid.Type: GrantFiled: July 28, 2000Date of Patent: May 25, 2004Assignee: The United States of America as represented by the Secretary of the NavyInventors: Maria G. Medeiros, Eric G. Dow, Russell R. Bessette, James M. Cichon
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Patent number: 6736953Abstract: A method of forming an electrically conductive structure on a substrate. An electrically conductive electrode layer is formed on the substrate, and an electrically conductive conduction layer is formed over the electrode layer. The conduction layer is formed by placing the substrate in a plating solution. A first current is applied to the substrate at a first bias and a first density for a first duration. A second current is applied to the substrate at a second bias and a second density for a second duration. The first current and the second current are cyclically applied at a frequency of between about thirty hertz and about one hundred and thirty hertz.Type: GrantFiled: September 28, 2001Date of Patent: May 18, 2004Assignee: LSI Logic CorporationInventors: Mei Zhu, Zhihai Wang
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Publication number: 20040074775Abstract: Pulse reverse electrolysis of acid copper solutions is used for applying copper to decorative articles, such as aluminium alloy automotive wheels and plastic parts for automotive use. The benefits include an improved thickness distribution of the copper electrodeposited on the plated article, reduced metal waste, reduced plating times and increased production capacity.Type: ApplicationFiled: October 21, 2002Publication date: April 22, 2004Inventors: Roderick Dennis Herdman, Michael Ray Crary, Ernest Long
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Patent number: 6723223Abstract: For an electromechanical machining of a work piece there is an optimal pulse duration for the machining pulses corresponding to the maximum copying accuracy. Such an optimal pulse duration corresponds to a certain value of the gap. By alternating the machining pulses with measurement pulses it is possible to obtain an accurate information about the gap dimensions on-line during the electrochemical machining process. The process control means (20) are used to automate the electromechanical machining, while keeping it in the optimal mode. For this purpose the process control means (20) comprise the pulse control unit (26) to establish the pulse duration of the voltage pulses to be applied across the gap (4).Type: GrantFiled: May 7, 2002Date of Patent: April 20, 2004Assignee: Koninklijke Philips Electronics N.V.Inventors: Alexandr Zaitsev, Sergey Bezroukov, Igor Leonidovich Agafonov, Aleksandr Leonidovich Belogorsky, Maxim Smirnov, Vladimir Zhitnikov
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Patent number: 6723219Abstract: A method of electroplating metal onto a low conductivity layer combines a potential or current reversal waveform with variation in the amplitude and duration of the applied potential or current pulse. The method includes, over time, varying the duration of the pulse and continuously decreasing the amplitude of both the cathodic and anodic portions of the waveform across the surface of the low conductivity layer as the deposition zone moves from the center of the surface of the low conductivity layer to the outside edge. By virtue of the ability to vary the amplitude and duration of the pulse, the method facilitates the filling of structures in the center of the low conductivity layer without overdepositing on the outside edge, thus ensuring a controlled deposition of material across the surface of the low conductivity layer.Type: GrantFiled: August 27, 2001Date of Patent: April 20, 2004Assignee: Micron Technology, Inc.Inventor: Dale W. Collins
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Publication number: 20030221966Abstract: In a new method of electroplating metal onto a patterned dielectric layer including small diameter vias and large diameter trenches, a pulse reverse electroplating sequence with a two-component chemistry is modified to substantially fill the vias, while in a subsequent DC deposition the bulk material is deposited to completely fill the large diameter trenches. Thus, good control quality compared to conventional three-component chemistry electroplating is obtained while the superior characteristics of a metal layer deposited by a two-component chemistry are preserved. The method is particularly advantageous in electroplating copper.Type: ApplicationFiled: October 31, 2002Publication date: December 4, 2003Inventors: Matthias Bonkass, Axel Preusse, Markus Nopper
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Publication number: 20030221967Abstract: A process for via filling is provided, wherein after flash plating, a PPR current is applied for a cycle of 1 to 50 msec positive electrolysis time and 0.2 to 5 msec reverse electrolysis time until an F/R ratio representing the ratio of positive electrolysis current density to reverse electrolysis current density is at least 1/0.2 and less than 1/1.Type: ApplicationFiled: January 15, 2003Publication date: December 4, 2003Applicant: Shipley Company, L.L.C.Inventors: Hideki Tsuchida, Masaru Kusaka
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Patent number: 6652727Abstract: A continuous layer of a metal is electrodeposited onto a substrate having both hydrodynamically inaccessible recesses and hydrodynamically accessible recesses on its surface by a two-step process in which the hydrodynamically inaccessible recesses are plated using a pulsed reversing current with cathodic pulses having a duty cycle of less than about 50% and anodic pulses having a duty cycle of greater than about 50% and the hydrodynamically accessible recesses are then plated using a pulsed reversing current with cathodic pulses having a duty cycle of greater than about 50% and anodic pulses having a duty cycle of less than about 50%.Type: GrantFiled: April 26, 2002Date of Patent: November 25, 2003Assignee: Faraday Technology Marketing Group, LLCInventors: E. Jennings Taylor, Jenny J. Sun, Maria E. Inman
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Patent number: 6641710Abstract: To provide a method of metal plating to give a metal plating coating with excellent luster and high corrosion resistance and wear resistance. This metal plating method includes pulse plating by pulsed electrolysis by periodically applying electric current. The pulsed electrolysis is carried out in condition that the pulse frequency and the current density are controlled so that the ratio of the quantity of deposited lattice per pulse to the height of the lattice is 0.28 or lower, that the duty ratio of the pulse frequency is controlled to be 0.5 or lower, and that the duration of complete pause caused by distortion of pulse waveform is controlled to be one half or longer of the duration of current interruption. The foregoing plating is carried out while fluidizing plating solution to be brought into contact with the object body 5 at a flow rate of 0.04 (m/s) or higher and making the solution evenly flow along the face to be plated.Type: GrantFiled: August 27, 2001Date of Patent: November 4, 2003Assignee: Soqi, Inc.Inventors: Yasuo Sakura, Itoyo Tsuchiya, Keiko Mano
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Publication number: 20030183527Abstract: A method of electroplating metal onto a low conductivity layer combines a potential or current reversal waveform with variation in the amplitude and duration of the applied potential or current pulse. The method includes, over time, varying the duration of the pulse and continuously decreasing the amplitude of both the cathodic and anodic portions of the waveform across the surface of the low conductivity layer as the deposition zone moves from the center of the surface of the low conductivity layer to the outside edge. By virtue of the ability to vary the amplitude and duration of the pulse, the method facilitates the filling of structures in the center of the low conductivity layer without overdepositing on the outside edge, thus ensuring a controlled deposition of material across the surface of the low conductivity layer.Type: ApplicationFiled: March 26, 2003Publication date: October 2, 2003Inventor: Dale W. Collins
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Publication number: 20030183526Abstract: A via filling method that provides superior filling properties and superior planarization of the deposited metal layer is provided. This is achieved by a method having a F/R ratio, the ratio of the electric current densities between the forward electrolysis and the reverse electrolysis, is in the range of 1/1 to 1/10 in a PPR electric current method applied with a cycle wherein the forward electrolysis interval is from 1 to 50 msec and the reverse electrolysis interval is from 0.2 to 5 msec.Type: ApplicationFiled: December 20, 2002Publication date: October 2, 2003Applicant: Shipley Company, L.L.C.Inventors: Masaru Kusaka, Hideki Tsuchida
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Publication number: 20030183528Abstract: A method of electroplating metal onto a low conductivity layer combines a potential or current reversal waveform with variation in the amplitude and duration of the applied potential or current pulse. The method includes, over time, varying the duration of the pulse and continuously decreasing the amplitude of both the cathodic and anodic portions of the waveform across the surface of the low conductivity layer as the deposition zone moves from the center of the surface of the low conductivity layer to the outside edge. By virtue of the ability to vary the amplitude and duration of the pulse, the method facilitates the filling of structures in the center of the low conductivity layer without overdepositing on the outside edge, thus ensuring a controlled deposition of material across the surface of the low conductivity layer.Type: ApplicationFiled: March 26, 2003Publication date: October 2, 2003Inventor: Dale W. Collins
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Publication number: 20030178315Abstract: A method for filling recesses of different sizes on a semiconductor substrate comprising immersing a semiconductor substrate having a surface provided with recesses of different sizes in an electroplating bath containing ions of a metal to be deposited on the surface; immersing a counter electrode in the plating bath; passing an electric current between the substrate and the counterelectrode; wherein, in a first electroplating step, the electric current is a modulated reversing electric current comprising a train of pulses that are cathodic with respect to the substrate and pulses that are anodic with respect to the substrate, whereby the pulse train in the first step has a first period, the cathodic pulses have an on-time of from about 0.Type: ApplicationFiled: February 14, 2003Publication date: September 25, 2003Inventor: E. Jennings Taylor
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Publication number: 20030141192Abstract: The present invention relates to a to-be-mounted electronic component to which functional alloy plating using a bonding material for mounting is applied with a substitute bonding material for solder (tin-lead alloy), and aims at providing alloy plating which has been put to a practical use in such a way that the function of existing alloy plating of this type has been significantly improved to eliminate toxic plating from various kinds of electronic components for use in electronic devices so that it is useful in protecting the environment.Type: ApplicationFiled: September 27, 2002Publication date: July 31, 2003Applicant: Nishihara Rikoh CorporationInventor: Masaaki Ishiyama
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Patent number: 6599411Abstract: In the NiFe electroplating method of the present invention, the atomic percent (at. %) composition of Ni and Fe in NiFe electroplated material is controlled by selection of the duty cycle of the electroplating current during the electroplating process. Generally, for a particular electroplating bath, where the electroplating current duty cycle is greatest the NiFe electroplated material has a higher Fe at. %, and where the electroplating current duty cycle is reduced, a lower Fe at. %. Therefore, electroplated NiFe components from a single electroplating bath can have differing NiFe concentrations where the electroplating current duty cycle is altered. Additionally, NiFe components can be electroplated with a graduated or changing Ni and Fe concentration by altering the electroplating current duty cycle during the electroplating process.Type: GrantFiled: April 20, 2001Date of Patent: July 29, 2003Assignee: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Thomas Edward Dinan, Neil Leslie Robertson, Alan Jun-Yuen Tam
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Patent number: 6596410Abstract: The present invention provides a chrome-plated sliding member free from periodical decreases in wear resistance or seizure resistance without the necessity to intentionally bend a multi-layer hard chrome plating film. This is a sliding member having a multi-layer hard chrome plating film on the sliding surface of the substrate 1. Microcracks 6 opening to the outer surface side of the individual hard chrome plating layers are distributed in hard chrome plating layers 2, 3, 4 and 5. The microcracks of the individual hard chrome plating layers comprise relatively shallow portions 6a where bottoms stop within a single layer, and relatively deep portions 6b and 6c where cracks run through two or more layers. The quantities of the microcracks expressed by the area ratios of microcracks on a cross-section of the hard chrome plating film include a quantity of the portions where cracks stop within a single layer within a range of from 1.5 to 35.Type: GrantFiled: September 27, 2001Date of Patent: July 22, 2003Assignee: Nippon Piston Ring Co., Ltd.Inventor: Kazuo Shimizu
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Publication number: 20030121792Abstract: A method of electroplating an object includes providing a electroplating bath solution with one or more anodes therein, disposing an object to be electroplated in the bath, and passing a complex current waveform between the anode nodes and the object. The waveform is a cyclic alternating type having two portions, a positive triangular shaped portion including one or more spikes and a negative portion. The method further includes vibrating the object and/or agitating the bath solution.Type: ApplicationFiled: December 27, 2001Publication date: July 3, 2003Applicant: The Hong Kong Polytechnic UniversityInventors: K.C. Chan, K.C. Yung, T.M. Yue
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Publication number: 20030075450Abstract: The interior of cavities and through-holes in electrically conductive substrates having high-aspect ratios of 8:1 or greater can be electroplated with a uniform layer of metal on their interior surfaces by using a pulse reverse voltage waveform having a pulse train of long cathodic pulses followed by short anodic pulses even in the absence of conventional additives such as levelers and brighteners.Type: ApplicationFiled: October 15, 2001Publication date: April 24, 2003Inventors: E. Jennings Taylor, Jenny J. Sun
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Patent number: 6551485Abstract: Microscopic mechanical elements suitable for manufacture of microelectromechanical systems (MEMS) are directly prepared by forming a low-relief base of microscopic dimensions on a substrate surface by any conventional means, and electrodepositing a metal preferentially on the upper surface of the base to produce a vertically-extending 3-dimensional structure. In a first step, the patterned substrate and a counterelectrode are contacted with an electrolyte and an electric current is passed between the substrate and counterelectrode, with the substrate being predominantly cathodic with respect the counterelectrode.Type: GrantFiled: October 17, 2000Date of Patent: April 22, 2003Assignee: Faraday Technology Marketing Group, LLCInventor: E. Jennings Taylor
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Patent number: 6551483Abstract: Controlled-potential electroplating provides an effective method of electroplating metals onto the surfaces of high aspect ratio recessed features of integrated circuit devices. Methods are provided to mitigate corrosion of a metal seed layer on recessed features due to contact of the seed layer with an electrolyte solution. The potential can also be controlled to provide conformal plating over the seed layer and bottom-up filling of the recessed features. For each of these processes, a constant cathodic voltage, pulsed cathodic voltage, or ramped cathodic voltage can be used. An apparatus for controlled-potential electroplating includes a reference electrode placed near the surface to be plated and at least one cathode sense lead to measure the potential at points on the circumference of the integrated circuit structure.Type: GrantFiled: May 10, 2001Date of Patent: April 22, 2003Assignee: Novellus Systems, Inc.Inventors: Steven T. Mayer, Jonathan Reid, Robert Contolini
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Patent number: 6547944Abstract: A method for forming a nanolaminate structure is provided which comprises plating a substrate with layers of substantially a first metal and substantially a second metal using an electrolytic plating process and controlling the plating current to obtain a desired current density at the cathode, which is maintained within a predefined range.Type: GrantFiled: December 8, 2000Date of Patent: April 15, 2003Assignee: Delphi Technologies, Inc.Inventors: Chris M. Schreiber, Mordechay Schlesinger, Robert Martinez, Haim Feigenbaum, William Robert Crumly
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Publication number: 20030038036Abstract: A method of electroplating metal onto a low conductivity layer combines a potential or current reversal waveform with variation in the amplitude and duration of the applied potential or current pulse. The method includes, over time, varying the duration of the pulse and continuously decreasing the amplitude of both the cathodic and anodic portions of the waveform across the surface of the low conductivity layer as the deposition zone moves from the center of the surface of the low conductivity layer to the outside edge. By virtue of the ability to vary the amplitude and duration of the pulse, the method facilitates the filling of structures in the center of the low conductivity layer without overdepositing on the outside edge, thus ensuring a controlled deposition of material across the surface of the low conductivity layer.Type: ApplicationFiled: August 27, 2001Publication date: February 27, 2003Inventor: Dale W. Collins
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Patent number: 6524461Abstract: A layer of a metal is electroplated onto an electrically conducting substrate having a generally smooth surface with a small recess therein, having a transverse dimension not greater than about 350 micrometers, typically from about 5 micrometers to about 350 micrometers, by immersing the substrate and a counterelectrode in an electroplating bath of the metal to be electroplated and passing a modulated reversing electric current between the electrodes. The current contains pulses that are cathodic with respect to said substrate and pulses that are anodic with respect to said substrate. The cathodic pulses typically have a duty cycle less than about 50% and the anodic pulses have a duty cycle greater than about 50%, the charge transfer ratio of the cathodic pulses to the anodic pulses is greater than one, and the frequency of the pulses ranges from about 10 Hertz to about 12000 Hertz. The on-time of the cathodic pulses may range from about 0.83 microseconds to about 50 milliseconds.Type: GrantFiled: April 3, 2001Date of Patent: February 25, 2003Assignee: Faraday Technology Marketing Group, LLCInventors: E. Jennings Taylor, Jenny J. Sun, Chengdong Zhou
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Publication number: 20030034250Abstract: A method of immersing a substrate into electrolyte solution for electroplating, the method comprising connecting an electric source between an anode immersed in the electrolyte solution and a seed layer formed on the substrate. A first voltage level of the seed layer is biased to be equal to, or more positive than, a second voltage level of the anode. The substrate is then immersed into the electrolyte solution.Type: ApplicationFiled: January 18, 2001Publication date: February 20, 2003Applicant: Applied Materials, Inc.Inventors: H. Peter W. Hey, Yezdi N. Dordi
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Publication number: 20030029731Abstract: Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.Type: ApplicationFiled: October 3, 2002Publication date: February 13, 2003Inventors: Jalal Ashjaee, Boguslaw Nagorski, Bulent M. Basol, Homayoun Talieh, Cyprian Uzoh
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Patent number: 6511591Abstract: The present invention concerns a method for the prevention of anode passivation in the electrolytic refining of copper, when periodic reversal current technology is used in electrolysis. The method is particularly suitable for the electrolytic refining of copper at high current densities. Irregular periodic reversal current technology is used in the present method, whereby current reversal is adjusted on the basis of an increase in electrolysis cell voltage.Type: GrantFiled: November 28, 2000Date of Patent: January 28, 2003Assignee: Outokumpu, OyjInventors: Henri Virtanen, Hannu Pouru
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Publication number: 20030010642Abstract: A continuous layer of a metal is electrodeposited onto a substrate having both hydrodynamically inaccessible recesses and hydrodynamically accessible recesses on its surface by a two-step process in which the hydrodynamically inaccessible recesses are plated using a pulsed reversing current with cathodic pulses having a duty cycle of less than about 50% and anodic pulses having a duty cycle of greater than about 50% and the hydrodynamically accessible recesses are then plated using a pulsed reversing current with cathodic pulses having a duty cycle of greater than about 50% and anodic pulses having a duty cycle of less than about 50%.Type: ApplicationFiled: April 26, 2002Publication date: January 16, 2003Inventors: E. Jennings Taylor, Jenny J. Sun, Maria E. Inman
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Publication number: 20030000843Abstract: A method for producing a catalytic converter includes depositing a layer of catalytically active metallic material by electrochemical deposition on a planar substrate by immersing the substrate in an electrolyte that contains the catalytically active metallic material. A high overvoltage at which a large number of seeds of the metallic material are formed on the substrate is set for a predetermined first time period between the substrate and the opposing electrode. The overvoltage is reduced for a predetermined second time period to a value at which the seeds which are deposited in the first time period grow on the substrate.Type: ApplicationFiled: September 24, 2001Publication date: January 2, 2003Inventors: Hubertus Biegert, Gabriele Stab, Gabor Toth, Peter Urban
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Patent number: 6500324Abstract: An electroplating system (30) and process makes electrical current density across, a semiconductor device substrate (20) surface more uniform during plating to allow for a more uniform or tailored deposition of a conductive material. The electrical current density modifiers (364 and 37) reduce the electrical current density near the edge of the substrate (20). By reducing the current density near the edge of the substrate (20), the plating becomes more uniform or can be tailored so that slightly more material is plated near the center of the substrate (20). The system can also be modified so that the material that electrical current density modifier portions (364) on structures (36) can be removed without having to disassemble any portion of the head (35) or otherwise remove the structures (36) from the system. This in-situ cleaning reduces the amount of equipment downtime, increases equipment lifetime, and reduces particle counts.Type: GrantFiled: May 1, 2000Date of Patent: December 31, 2002Assignee: Motorola, Inc.Inventors: Cindy Reidsema Simpson, Matthew T. Herrick, Gregory S. Etherington, James Derek Legg
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Patent number: 6482307Abstract: Deposition of conductive material on or removal of conductive material from a wafer frontal side of a semiconductor wafer is performed by providing an anode having an anode area which is to face the wafer frontal side, and electrically connecting the wafer frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the wafer frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the wafer is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the wafer frontal side surface, in its entirety, is thus permitted.Type: GrantFiled: December 14, 2000Date of Patent: November 19, 2002Assignee: NuTool, Inc.Inventors: Jalal Ashjaee, Boguslaw A. Nagorski, Bulent M. Basol, Homayoun Talieh, Cyprian Uzoh
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Publication number: 20020145826Abstract: A method is provided for the preparation of nanoscale particle arrays having highly uniform crystals of metal, semiconductor or insulator materials grown in nanopores in the surface of a substrate, wherein the method uses pulse-reverse electrodeposition of metals with a rectangular or square waveform in order to generate high homogeneity of crystals and high in-plane or out-of-plane anisotropy in a controlled manner, enabling the creation of a variety of devices, including but not limited to high density storage media.Type: ApplicationFiled: April 9, 2001Publication date: October 10, 2002Applicant: University of AlabamaInventors: Giovanni Zangari, Ming Sun, Robert M. Metzger
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Patent number: 6440289Abstract: A method is provided of forming a semiconductor seed layer starting with a non-electrochemical deposition of an initial deposition of the seed layer. This is followed by a very slow deposition rate electrochemical deposition with an organic additive at the beginning of the plating process to overcome the initial thin seed coverage at the bottom and bottom sidewall of a feature. The electrochemical deposition plates at a very low rate initially followed by a low rate deposition to build up a thicker and more uniform seed layer at the bottom and bottom sidewall. In the meantime, this slow plating rate step only adds a small thickness to the top portion of the feature where non-electrochemical deposition seed coverage was initially thicker.Type: GrantFiled: April 2, 1999Date of Patent: August 27, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Christy Mei-Chu Woo, Bhanwar Singh, Bharath Rangarajan
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Patent number: 6402924Abstract: The present invention relates to a method of electrodepositing metal onto a substrate, which comprises applying a pulsed periodic reverse current across the electrodes of a plating cell utilizing a peak reverse current density and peak forward current density; and varying the ratio of peak reverse current density to peak forward current density in periodic cycles to provide metal deposits of uniform thickness and appearance upon the substrate. The invention also relates to a process for improving the properties of an electrodeposit, particularly on substrates having uneven surfaces or apertures, by using programmed pulse periodic reverse current modulation. More particularly, it involves varying the anodic to cathodic current density ratio, in order to improve the surface uniformity appearance, grain structure and levelling of the deposit while maintaining high current density throwing power.Type: GrantFiled: May 1, 2000Date of Patent: June 11, 2002Assignee: Shipley Company LLCInventors: James L. Martin, Stephane Menard, David N. Michelen
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Publication number: 20020056645Abstract: A layer of a metal is electroplated onto an electrically conducting substrate having a generally smooth surface with a small recess therein, having a transverse dimension not greater than about 350 micrometers, typically from about 5 micrometers to about 350 micrometers, by immersing the substrate and a counterelectrode in an electroplating bath of the metal to be electroplated and passing a modulated reversing electric current between the electrodes. The current contains pulses that are cathodic with respect to said substrate and pulses that are anodic with respect to said substrate. The cathodic pulses typically have a duty cycle less than about 50% and the anodic pulses have a duty cycle greater than about 50%, the charge transfer ratio of the cathodic pulses to the anodic pulses is greater than one, and the frequency of the pulses ranges from about 10 Hertz to about 12000 Hertz. The on-time of the cathodic pulses may range from about 0.83 microseconds to about 50 milliseconds.Type: ApplicationFiled: April 3, 2001Publication date: May 16, 2002Inventors: E. Jennings Taylor, Jenny J. Sun, Chengdong Zhou
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Patent number: 6368482Abstract: A system and a method for selective plating processes are disclosed which use directed beams of high intensity acoustic waves to create non-linear effects that alter and improve the plating process. The directed beams are focused on the surface of an object, which in one embodiment is immersed in a plating solution, and in another embodiment is suspended above a plating solution. The plating processes provide precise control of the thickness of the layers of the plating, while at the same time, in at least some incidents, eliminates the need for masking.Type: GrantFiled: September 19, 2000Date of Patent: April 9, 2002Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration, Washington, DC (US)Inventors: Richard C. Oeftering, Charles Denofrio
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Publication number: 20020038764Abstract: A continuous layer of a metal is electrodeposited onto a substrate having both hydrodynamically inaccessible recesses and hydrodynamically accessible recesses on its surface by a twostep process in which the hydrodynamically inaccessible recesses are plated using a pulsed reversing current with cathodic pulses having a duty cycle of less than about 50% and anodic pulses having a duty cycle of greater than about 50% and the hydrodynamically accessible recesses are then plated using a pulsed reversing current with cathodic pulses having a duty cycle of greater than about 50% and anodic pulses having a duty cycle of less than about 50%.Type: ApplicationFiled: April 3, 2001Publication date: April 4, 2002Inventors: E. Jennings Taylor, Jenny J. Sun, Maria E. Inman
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Patent number: 6365028Abstract: This invention relates to the sphere of plasma electrolyte oxide coating of aluminium alloys. The method incorporates anode-cathode oxide coating in an alkaline electrolyte at a temperature of 15-50° C., using 50-60 Hz frequency alternating current. In the initial stage of the process oxide coating is carried on for 5-90 seconds at a current density of 160-180 A/dm2, then the current density is dropped to 3-30 A/dm2 and the process is continued in a regimen of spontaneous diminution of power demand without on-line adjustment of the regimen until the set coating thickness is achieved. The alkaline electrolyte used is an aqueous solution of alkaline metal hydroxide at 1-5 g/l, an alkaline metal silicate at 2-15 g/l, an alkaline metal pyrophosphate at 2-20 g/l and peroxide compounds at 2-7 g/l (in terms of H2O2—30%).Type: GrantFiled: June 14, 2000Date of Patent: April 2, 2002Assignee: Isle Coat LimitedInventor: Alexandr Sergeevich Shatrov
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Publication number: 20020036145Abstract: The present invention relates to a copper electroplating bath composition and method of using it for microelectronic device fabrication. In particular, the present invention relates to copper electroplating in the fabrication of interconnect structures in semiconductor devices. By use of the inventive copper electroplating bath composition, the incidence of voids in the interconnect structures is reduced.Type: ApplicationFiled: October 3, 2001Publication date: March 28, 2002Inventors: Valery Dubin, Kimin Hong, Nate Baxter