Abstract: An electronic or micromechanical device having first (11) and second (12) surfaces and a via extending through the device from the first surface to the second surface. The via comprises integrally formed first (84, 86), second (82) and third (88) portions. The first portion (84, 86) extends from the first surface (11) to the second surface (12). The second portion (82) extends over a part of the first surface (11) of the device. The third portion (88) extends over a part of the second surface (12) of the device. Preferably the first portion comprises first and second parts, the second part extending through an active region of the device and having a narrower width than the first part. A method of forming and filling the via is also disclosed.

Abstract: The present invention is directed to a pretreatment process for copper electroplating of via or trench features on a wafer, comprising filling the via or trench feature with a pretreatment solution, wherein the pretreatment solution comprises copper ions.

Abstract: A method of fluid sealing a workpiece is provided. The method includes providing a force to cause a ring to form a barrier to fluid entry with the workpiece and preventing fluid from crossing the barrier to fluid entry by forming a pressure differential across the barrier.

Abstract: Apparatus and methods for uniform metal plating onto a semiconductor wafer, such as GaAs wafer, are disclosed. One such apparatus can include an anode and a showerhead body. The anode can include an anode post and a showerhead anode plate. The showerhead anode plate can include holes sized to dispense a particular plating solution, such as plating solution that includes gold, onto a wafer. The showerhead body can be coupled to the anode post and the showerhead anode plate. The showerhead body can be configured to create a seal sufficient to substantially prevent a reduction of pressure in the plating solution flowing from the anode post to holes of the showerhead anode plate.

Abstract: A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias.

Abstract: Process of electrodepositing a metal in a high aspect ratio via in a silicon substrate to form a through-silicon-via (TSV), utilizing an electrolytic bath including a redox mediator, in an electrolytic metal plating system including a chuck adapted to hold the silicon substrate and to heat the silicon substrate to a first temperature, a temperature control device to maintain temperature of the electrolytic bath at a second temperature, in which the first temperature is maintained in a range from about 30° C. to about 60° C. and the second temperature is maintained at a temperature (a) at least 5° C. lower than the first temperature and (b) in a range from about 15° C. to about 35° C.

Abstract: A semiconductor substrate carrier for use during wet chemical processing may comprise a conductive flange to couple the carrier with processing equipment, a frame coupled with the conductive flange, where the frame is configured to hold a semiconductor substrate, and an integrated shield coupled with the frame. The integrated shield is configured to alter an electric field near at least a portion of a surface of the semiconductor substrate during the wet chemical processing.

Abstract: A disclosed electrolytic plating method includes a first step of immersing a substrate in electrolytic plating liquid including copper salt to form a first Cu layer on the substrate; and a second step of forming a second Cu layer over the first Cu layer. The first step is continued for ten seconds or less after the immersion. In the first step, the substrate is rotated at a first speed N (rpm) which satisfies D×N×??6000×? (mm/min), where D is the diameter of the substrate (mm), and D×N×? represents the peripheral speed of the substrate, and a current is supplied to the substrate at a first density of 10 mA/cm2 or less. In the second step, the substrate is rotated at a second speed higher than the first speed, and the current is supplied to the substrate at a second density higher than the first density.

Abstract: An electronic or micromechanical device having first (11) and second (12) surfaces and a via extending through the device from the first surface to the second surface. The via comprises integrally formed first (84, 86), second (82) and third (88) portions. The first portion (84, 86) extends from the first surface (11) to the second surface (12). The second portion (82) extends over a part of the first surface (11) of the device. The third portion (88) extends over a part of the second surface (12) of the device. Preferably the first portion comprises first and second parts, the second part extending through an active region of the device and having a narrower width than the first part. A method of forming and filling the via is also disclosed.

Abstract: A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distribution layer has a first end and a second end, and the first end is electrically connected to the first metallic pad. The second metallic pad is electrically connected to the second end of the re-distribution layer. The bonding wire is bonded to the second metallic pad.

Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

Abstract: A plating apparatus and method bubbles generated at the plating surfaces easily removed and the uniformity of the thickness of the plated film within the plated surface can be improved. The plating apparatus has a cassette table for loading a cassette in which a substrate having a plating surface is contained. An aligner for aligning the substrate, a rinser-dryer for rinsing and drying the substrate, and a plating unit for plating the substrate are also provided. The plating unit includes a plating vessel containing a plating solution, and a holder holds the substrate to immerse the substrate in the plating solution in the plating vessel. The plating surface is exposed to a nozzle which ejects the plating solution toward the plating surface.

Abstract: The present disclosure provides a method of electrodeposition of a metal or metal alloy on at least one surface of a semiconductor material. The method of the present invention provides full coverage of an electrodeposited metallic film on the at least one surface of the semiconductor material. The method of the present disclosure includes providing a semiconductor material. A metallic film is applied to at least one surface of the semiconductor material by an electrodeposition process. The electrodeposition process employed uses current waveforms that apply a low current density initially, and after a predetermined period of time, the current density is changed to a high current density.

Abstract: A plating method, employing a face-down manner of plating and using a resistor body between a substrate and an anode, can securely bring an entire surface to be plated of the substrate into contact with a plating solution without permitting intrusion of air bubbles to the surface to be plated. A resistor body is disposed above the anode and immersed in the plating solution, allowing the plating solution to flow along an upper surface of the resistor body from the periphery toward the center of the resistor body. Thus, a raised portion of the plating solution is created in the center of the upper surface of the resistor body. The substrate is then lowered with the surface facing downwardly so as to fill the space between the surface to be plated of the substrate and the upper surface of the resistor body with the plating solution.

Abstract: A method and composition for electroplating Cu onto a substrate in the manufacture of a microelectronic device involving and electrolytic solution containing a source of Cu ions and a substituted pyridyl polymer compound for leveling.

Abstract: A method of electroplating conductive material on semiconductor wafers controls undesirable surface defects by reducing the electroplating current as the wafer is being initially immersed in a plating bath. Further defect reduction and improved bottom up plating of vias is achieved by applying a static charge on the wafer before it is immersed in the bath, in order to enhance bath accelerators used to control the plating rate. The static charge is applied to the wafer using a supplemental electrode disposed outside the plating bath.

Abstract: A substantially uniform layer of a metal is electroplated onto a work piece having a seed layer thereon. This is accomplished by employing a “high resistance ionic current source,” which solves the terminal problem by placing a highly resistive membrane (e.g., a microporous ceramic or fretted glass element) in close proximity to the wafer, thereby swamping the system's resistance. The membrane thereby approximates a constant current source. By keeping the wafer close to the membrane surface, the ionic resistance from the top of the membrane to the surface is much less than the ionic path resistance to the wafer edge, substantially compensating for the sheet resistance in the thin metal film and directing additional current over the center and middle of the wafer.

Abstract: A method of fluid processing a semiconductor workpiece, including disposing a workpiece holder with a housing capable of containing a fluid, the workpiece holder retaining the workpiece, providing an agitation system connected to the housing and comprising a member disposed within the housing adjacent the workpiece holder, and agitating the fluid by moving the member substantially parallel to a surface of the workpiece with a non-uniform oscillatory motion, the non-uniform oscillatory motion being a series of substantially continuous geometrically asymmetric oscillations wherein each consecutive oscillation of the series is geometrically asymmetric having at least two substantially continuous opposing strokes wherein reversal positions of each substantially continuous stroke of the substantially continuous asymmetric oscillation are disposed asymmetrically with respect to a center point of each immediately preceding substantially continuous stroke of the oscillation.

Abstract: The present invention generally relates to apparatus and methods for plating conductive materials on a substrate. One embodiment of the present invention provides an apparatus for plating a conductive material on a substrate. The apparatus comprises a fluid basin configured to retain an electrolyte, a contact ring configured to support the substrate and contact the substrate electrically, and an anode assembly disposed in the fluid basin, wherein the anode assembly comprises a plurality of anode elements arranged in rows.

Abstract: Disclosed are embodiments of a circuit and method for electroplating a feature (e.g., a BEOL anti-fuse device) onto a wafer. The embodiments eliminate the use of a seed layer and, thereby, minimize subsequent processing steps (e.g., etching or chemical mechanical polishing (CMP)). Specifically, the embodiments allow for selective electroplating metal or alloy materials onto an exposed portion of a metal layer in a trench on the front side of a substrate. This is accomplished by providing a unique wafer structure that allows a current path to be established from a power supply through a back side contact and in-substrate electrical connector to the metal layer. During electrodeposition, current flow through the current path can be selectively controlled. Additionally, if the electroplated feature is an anti-fuse device, current flow through this current path can also be selectively controlled in order to program the anti-fuse device.

Abstract: A method of manufacturing a non-shrinking ceramic substrate according to an aspect of the invention may include: preparing a ceramic laminate having a via electrode therein; firing the ceramic laminate so that a void is formed at the interface between the via electrode and the ceramic laminate; and performing plating to fill the void with a conductive material.

Abstract: An electrode assembly for use with an electrodeposition process. According to an exemplary embodiment, the electrode assembly includes an electrode for exchanging electrical current with a solution, a passageway for removing gas that becomes trapped between a workpiece and the solution, and a sleeve for electrically isolating the electrode from the workpiece.

Abstract: A lead frame having improved connectivity with a molded portion and a method of manufacturing the lead frame are provided. The lead frame includes a die pad on which a semiconductor chip is to be disposed; at least one lead portion arranged to be connected to the semiconductor chip; and at least one plating layer formed on at least one of the at least one lead portion and the die pad, wherein a top surface of the at least one plating layer has an uneven portion having a first average surface roughness.

Abstract: A method of electrodepositing germanium compound materials on an exposed region of a substrate structure, which includes forming a plating solution by dissolving at least one germanium salt and at least one salt containing an element other than germanium in water; obtaining a substrate with a clean surface; immersing the substrate in the solution; and electroplating germanium compound materials on the substrate by applying an electrical potential between the substrate and an anode in the plating solution, in which the substrate is included in a semiconductor or phase change device.

Abstract: A peeling prevention layer for preventing an insulation film and a protection layer from peeling is formed in corner portions of a semiconductor device. The peeling prevention layer can increase its peeling prevention effect more when formed in a vacant space of the semiconductor device other than the corner portions, for example, between ball-shaped conductive terminals. In a cross section of the semiconductor device, the peeling prevention layer is formed on the insulation film on the back surface of the semiconductor substrate, and the protection layer formed of a solder resist or the like is formed covering the insulation film and the peeling prevention layer. The peeling prevention layer has a lamination structure of a barrier seed layer and a copper layer formed thereon when formed by an electrolytic plating method.

Abstract: Apparatus and methods for electrochemically processing microfeature wafers. The apparatus can have a vessel including a processing zone in which a microfeature wafer is positioned for electrochemical processing. The apparatus further includes at least one counter electrode in the vessel that can operate as an anode or a cathode depending upon the particular plating or electropolishing application. The apparatus further includes a supplementary electrode and a supplementary virtual electrode. The supplementary electrode is configured to operate independently from the counter electrode in the vessel, and it can be a thief electrode and/or a de-plating electrode depending upon the type of process. The supplementary electrode can further be used as another counter electrode during a portion of a plating cycle or polishing cycle.

Abstract: Disclosed is a method for making semiconductor electrodes. In the method, there is provided a wafer. The wafer includes first metal layers. A second metal layer is provided on the wafer so that the first metal layers are shielded with the second metal layer. Photo-resist is provided on the second metal layer so that the first metal layers are not shielded with the photo-resist. An electroplating device is used to provide third metal layers on the second metal layer so that each of the first metal layers is shielded with a related one of the third metal layers. The wafer is divided from the photo-resist, thus forming semiconductor electrodes.

Abstract: An article and method of forming the article is disclosed. The article includes a heat source, a heat-sink, and a thermal interface element having a plurality of freestanding nanosprings, a top layer, and a bottom layer. The nanosprings, top layer, and the bottom layers of the article include at least one inorganic material. The article can be prepared using a number of methods including the methods such as GLAD and electrochemical deposition.

Abstract: An initial pulse current cycle is supplied to at least one through-hole via. The pulse current cycle includes a forward pulse current. The magnitude of the forward pulse current is lower than the magnitude of the reverse pulse current. A corresponding forward and reverse current density is generated across the via causing conductive material to be deposited within the via, thereby reducing the effective aspect ratio of the via. At least one subsequent pulse current cycle is supplied. The magnitudes of the forward and reverse pulse currents of the subsequent pulse current cycle are determined in relation to the reduced effective aspect ratio. A subsequent corresponding forward and reverse current density is generated across the through-hole via causing conductive material to be deposited within the via, thereby further reducing the effective aspect ratio of the via.

Abstract: A method and apparatus for measuring differential voltages in an electrolyte of an electrochemical plating cell. Current densities are calculated from the measured differential voltages and correlated to thickness values of plated materials. A real time thickness profile may be generated from the thickness values.

Abstract: A multi-layered wafer support apparatus is provided for performing an electroplating process on a semiconductor wafer (“wafer”). The multi-layered wafer support apparatus includes a bottom film layer and a top film layer. The bottom film layer includes a wafer placement area and a sacrificial anode surrounding the wafer placement area. The top film layer is defined to be placed over the bottom film layer. The top film layer includes an open region to be positioned over a surface of the wafer to be processed, i.e., electroplated. The top film layer provides a liquid seal between the top film layer and the wafer, about a periphery of the open region. The top film layer further includes first and second electrical circuits that are each defined to electrically contact a peripheral top surface of the wafer at diametrically opposed locations about the wafer.

Abstract: Effective fillability and the uniformity electrodeposition of a copper electroplating solution is judged by determining the time-dependent potential change thereof at a cathode current density of 0.1-20 A/dm2. The potential change is determined at a working electrode rotation of 100-7500 rpm, and the fillability with the solution is judged from the curve profile. The time-dependent potential change curve within a predetermined period of time after the start of electrolysis is approximated according to the Boltzmann's function, and the potential change speed dx and the potential convergent point A2 are obtained to judge the fillability with a plating solution.

Abstract: A conformal metallic layer is applied to a selected region of a substrate by forming a pattern of electrically conductive lines on the substrate, placing a bead of a selected metal on the substrate at an edge of the region selected for coating, and passing an electric current through the bead and through conductive lines that extend over the region of the substrate selected for coating with the electric current having a current density sufficient to melt the bead so that metallic material therefrom flows over the conductive lines to form the coating. A pair of electrically conductive connectors is placed in contact with the electrically conductive lines, and an electric power supply is connected to the pair of electrically conductive connectors such that electric current passes through the bead, melts the bead to form a liquid metal, and carries the liquid metal in a continuous stream along the conductive lines, coating the conductive lines conformally in the process.

Abstract: Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.

Abstract: A superstrate, such as a sheet of polymer film, is used as a transport during metallization of solar cells. The back sides of the solar cells are attached to the sheet of polymer film. Contact holes are formed through the sheet of polymer film to expose doped regions of the solar cells. Metals are formed in the contact holes to electrically connect to the exposed doped regions of the solar cells. The metals are electroplated to form metal contacts of the solar cell. Subsequently, the solar cells are separated from other solar cells that were metallized while supported by the same sheet of polymer film to form strings of solar cells or individual solar cells.

Abstract: A process of electrodepositing high purity copper in a via in a silicon substrate to form a through-silicon-via (TSV), including immersing the silicon substrate into an electrolytic bath in an electrolytic copper plating system in which the electrolytic bath includes an acid, a source of copper ions, a source of ferrous and/or ferric ions, and at least one additive for controlling physical-mechanical properties of deposited copper; and applying an electrical voltage for a time sufficient to electrodeposit high purity copper to form a TSV, in which a Fe+2/Fe+3 redox system is established in the bath to provide additional copper ions to be electrodeposited by dissolving copper ions from a source of copper metal.

Abstract: A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. High copper concentration and low acidity electroplating solution is used for deposition copper into the through silicon vias.

Abstract: Mass distribution within programmable surface control devices is controlled by the presence or absence of an electrodeposition of metal and/or metal ions from a solid solution upon application of a suitable electric field. One such programmable surface control device includes a tunable cantilever assembly whose resonant frequency is changed by depositing and dissolving an electrodeposit on a surface of the assembly using an electric field.

Abstract: A method for electroplating low-resistance metal wire for resolving the problem to fabricate the metal wire on large-area substrate through the technology of photolithographing and etching in the prior art. Then the invention improves the RC-delay characteristic of circuit on large-area substrate and reduces the number of masks for processing of a structure of gate overlap lightly-doped drain (source) (GOLDD).

Abstract: A method for metallizing a via feature in a semiconductor integrated circuit device substrate, wherein the semiconductor integrated circuit device substrate comprises a front surface, a back surface, and the via feature and wherein the via feature comprises an opening in the front surface of the substrate, a sidewall extending from the front surface of the substrate inward, and a bottom. The method comprises contacting the semiconductor integrated circuit device substrate with an electrolytic copper deposition chemistry comprising (a) a source of copper ions and (b) a leveler compound, wherein the leveler compound is a reaction product of a dipyridyl compound and an alkylating agent; and supplying electrical current to the electrolytic deposition chemistry to deposit copper metal onto the bottom and sidewall of the via feature, thereby yielding a copper filled via feature.

Abstract: A method of selectively depositing metal features on a conductive surface of a substrate. An electrode assembly that includes a plurality of electrodes connected in series so as to be oppositely polarized when a voltage is applied thereacross is positioned over the conductive surface of the substrate. The plurality of electrodes is in close proximity to, but does not contact, the conductive surface of the substrate. Positively charged portions and negatively charged portions of the conductive surface of the substrate are created and metal ions are deposited on the negatively charged portions.

Abstract: First and second electrodes are disposed at first and second locations, respectively, proximate to a periphery of a wafer support, wherein the first and second location are substantially opposed to each other relative to the wafer support. Each of the first and second electrodes can be moved to electrically connect with and disconnect from a wafer held by the wafer support. An anode is disposed over and proximate to the wafer such that a meniscus of electroplating solution is maintained between the anode and the wafer. As the anode moves over the wafer from the first location to the second location, an electric current is applied through the meniscus between the anode and the wafer. Also, as the anode is moved over the wafer, the first and second electrodes are controlled to connect with the wafer while ensuring that the anode does not pass over an electrode that is connected.

Abstract: In order to make plating thickness uniform in a metal plating apparatus, a metal plating apparatus capable of performing metal plating to a uniform thickness is provided by aligning lines of electric force uniformly and in parallel by disposing a pair of conductive perforated plates 20a and 20b, which are electrically connected to each other, between plating metals 16 immersed in a plating solution and an object 18 to be plated.

Abstract: A method of electroplating conductive material on semiconductor wafers controls undesirable surface defects by reducing the electroplating current as the wafer is being initially immersed in a plating bath. Further defect reduction and improved bottom up plating of vias is achieved by applying a static charge on the wafer before it is immersed in the bath, in order to enhance bath accelerators used to control the plating rate. The static charge is applied to the wafer using a supplemental electrode disposed outside the plating bath.

Abstract: A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.

Abstract: A non-plating line (NPL) plating method is provided. The NPL plating method is featured in that at first it forms a circuit layer on a bump side only, and therefore a plating current can be transmitted via a plating metal layer on a ball side to the circuit layer (enclosed by an insulation layer, e.g., a solder resist or a photoresist) on the bump side, and thus forming a protection layer, e.g., plating gold, on the plating metal layer on the circuit layer and the ball side. In such a way, the plating gold is formed after the insulation layer, so that there won't be any plating gold existed beneath the insulation layer of the bump side (connected with dies). Hence, the insulation layer can be prevented from dropping off from the protection layer, i.e., the plating gold, and thus the reliability of the products can be improved.

Abstract: A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon via may be more than about 3 micrometers in diameter and more that about 20 micrometers deep. Low copper concentration and high acidity electroplating solution is used for deposition copper into the through silicon vias.

Abstract: A nano-sensor including a substrate including pores formed thereon and a detecting mechanism for detecting changes in capacitance due to the presence of a substance. A method of measuring humidity by sampling air with the nano-sensor, detecting changes in capacitance, and determining the relative humidity of air. A method of detecting the presence of a substance by taking a sample with the nano-sensor, detecting changes in capacitance, and determining the presence of a substance. A method of making the nano-sensor by forming nano-pores on a substrate, and forming, on the surface of the substrate, a detecting mechanism for detecting changes in capacitance due to the presence of a substance.

Abstract: The present invention relates to an electrodeposition composition intended particularly for coating a semiconductor substrate in order to fabricate structures of the “through via” type for the production of interconnects in integrated circuits. According to the invention, the said solution comprises copper ions in a concentration of between 14 and 120 mM and ethylenediamine, the molar ratio between ethylenediamine and copper being between 1.80 and 2.03 and the pH of the electrodeposition solution being between 6.6 and 7.5. The present invention also relates to the use of the said electrodeposition solution for the deposition of a copper seed layer, and to the method for depositing a copper a seed layer with the aid of the electrodeposition solution according to the invention.

Abstract: An electroplating method calls for immersing a body to be plated in a plating solution containing tin and bismuth to form a tin-bismuth alloy skin layer on surfaces of the body. The plating is carried out such that a solid tin metal and a solid bismuth metal placed in the plating solution are connected to an anode and the body to be plated is connected to a cathode of a power supply.