Adhesively Bonding Resist To Substrate Patents (Class 216/43)
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Publication number: 20010017184Abstract: In order to form a holographic grating of the invention, a resist pattern having a groove depth deeper than a desired depth of diffraction grating grooves is engraved in a photoresist layer provided on an optical glass base plate by an exposure method. Then, the photoresist layer is etched by an ion beam generated by a mixed gas containing a fluorine based gas and oxygen until the photoresist layer is completely deleted. In etching the photoresist layer, the ion beam is irradiated from a direction, which is perpendicular to a grooving direction of the resist pattern and is inclined from a normal line direction of the base plate. As a result, there can be formed the holographic grating in which the diffraction grating grooves are directly engraved in the optical glass base plate. Since the diffraction grating grooves are directly engraved in the optical base plate, the photoresist layer is not peeled off as in the conventional grating, and the holographic grating of the invention has excellent durability.Type: ApplicationFiled: December 14, 2000Publication date: August 30, 2001Applicant: SHIMADZU CORPORATIONInventors: Masaru Koeda, Yuji Tanaka, Akio Soejima
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Patent number: 6280555Abstract: A printed circuit board can be formed by a method that includes the step of cutting a circuit pattern out of a low cost plastic sheet material, and transferring the pattern onto a tape. The tape, with the pattern adhesively attached, is transferred onto a conductive film surface on a dielectric board. Thereafter, the tape is removed, leaving the pattern on the conductive film. An acid-etching step is performed on the exposed areas of the conductive film, after which the pattern is removed from the non-etched areas of the conductive film.Type: GrantFiled: March 30, 1999Date of Patent: August 28, 2001Inventor: Robert L. Wilbur
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Patent number: 6156485Abstract: A method of high aspect ratio etching (HARE) of metal layers in quarter micron technology is disclosed. High aspect ratio patterns are encountered because of the shrinking lateral dimensions over the constant remaining thickness of the features of ultra large scaled integrated chips. HARE is accomplished by employing a tungsten W-hardmask with a high selectivity of 10:1 with respect to the immediately underlying aluminum-copper metal layer. In order to protect the lithographic integrity, overlying organic BARC is used to prevent reflections from the W-hardmask as well as from the underlying metal layer. The lithographic resolution is further improved by using a thin photoresist layer in combination with the high selectivity hardmask. In this manner, the tradeoff that normally has to be made between a high resolution process and a reliable metal etch is circumvented.Type: GrantFiled: January 19, 1999Date of Patent: December 5, 2000Assignee: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Wen-Hsiang Tang, Yi-Fei Wang, Chih-Shen Hung, Cheng-Hao Huang
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Patent number: 6138349Abstract: A method for forming a protective coating on an exposed surface of an electronic device, including forming the protective coating on a conductive termination connected to a circuit element in the electronic device, and making a window in the protective coating to expose the termination.Type: GrantFiled: December 18, 1997Date of Patent: October 31, 2000Assignee: VLT CorporationInventors: Patrizio Vinciarelli, Jeffrey A. Curhan
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Patent number: 5972234Abstract: The present invention discloses a method for marking an electronic substrate without the splatter or debris defect which can be carried out by first providing a tape, then creating a cavity or a mark through the tape by a high-intensity energy beam or any other suitable mechanical means such that the tape can be laminated to a top surface of the substrate and exposed to an etchant until a similar mark in the substrate is reproduced by the etching process. After the tape is removed, the mark is reproduced in the surface of the electronic substrate.Type: GrantFiled: April 6, 1998Date of Patent: October 26, 1999Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuo-Yao Weng, Yu-Chi Lin
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Patent number: 5882536Abstract: A method of removing a silver cladding from high temperature superconducting material clad in silver (HTS) is disclosed. The silver clad HTS is contacted with an aqueous solution of HNO.sub.3 followed by an aqueous solution of NH.sub.4 OH and H.sub.2 O.sub.2 for a time sufficient to remove the silver cladding from the superconducting material without adversely affecting the superconducting properties of the superconducting material. A portion of the silver cladding may be masked with a material chemically impervious to HNO.sub.3 and to a combination of NH.sub.4 OH and H.sub.2 O.sub.2 to preserve the Ag coating. A silver clad superconductor is disclosed, made in accordance with the method discussed.Type: GrantFiled: October 12, 1995Date of Patent: March 16, 1999Assignee: The University of ChicagoInventors: Uthamalingam Balachandran, Anand N. Iyer, Jiann Yuan Huang
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Patent number: 5770721Abstract: This method for preparing micromatrices consists in applying a specially-patterned intermediate layer of laser-absorbing substance on a solid support. The configuration of the sublayer fully corresponds to the topology of the manufactured matrix. The intermediate layer is further covered by a continuous layer of gel , the gel and the material of the support being transparent towards laser radiation. The gel layer is irradiated by a laser beam for a time needed to evaporate simultaneously the gel in the places immediately above the laser-absorbing sublayer and the sublayer itself. Oligonucleotides from a chosen set are then attached to the formed gel `cells`, one oligonucleotide to each cell.This method is intended for use in biotechnology, specifically for deciphering the nucleotide sequence of DNA.Type: GrantFiled: May 19, 1995Date of Patent: June 23, 1998Assignee: University of ChicagoInventors: Gennady Moiseevich Ershov, Andrei Darievich Mirzabekov
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Patent number: 5714079Abstract: A metallic sheet (10) is laminated between a pair of photoresist layers (26, 30) having different properties which permit one photoresist (26) to be stripped from the metallic sheet, substantially without effecting the other photoresist (30). A thin gauge blank or article (56) is photo-chemically machined from the lamination and the photoresist (26) is stripped from one side, leaving the other photoresist (30) to provide electrical insulation on just one side of the article.Type: GrantFiled: December 8, 1995Date of Patent: February 3, 1998Assignee: Eastman Kodak CompanyInventors: Edwin Anthony Mycek, Larry Lee Lapa
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Patent number: 5681485Abstract: A method of producing multilayer circuit boardschar comprising repeating a procedure comprising the steps of (1) laminating a photosensitive film composition shaped in a film form onto an insulating material carrying a conductor pattern formed thereon, (2) exposing the laminated photosensitive film composition to light through a negative type photomask, (3) dissolving the domains not irradiated in the above exposure step, (4) heat-curing the domains not dissolved in step (3), (5) forming a copper plating layer on the surface of the photosensitive film composition heat-cured in step (4) by electroless copper plating with or without further electroplating of copper, and (6) forming, on the plated copper layer formed in step (5), a photosensitive etch resist layer and subjecting said layer to light exposure through a photomask having a circuit pattern drawn thereon, developing and etching to thereby form a conductor pattern, said photosensitive film composition for lamination containing at least 50% by weight ofType: GrantFiled: November 30, 1995Date of Patent: October 28, 1997Assignee: Nippon Paint Co., Ltd.Inventors: Yoshikazu Yamagami, Shinji Seo, Akio Kashihara
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Patent number: 5670062Abstract: In accordance with the invention a metal film structure having tapered sidewalls is made by the steps of applying a first layer of metal on a substrate, applying a second layer of a different material over the first layer, forming a pattern of resist on the second layer and etching the first and second layers in an etchant. The material of the second layer is chosen to interact with the metal of the first layer to increase the lateral etch rate of the second layer, thereby producing a metal film structure having tapered sidewalls. In preferred embodiments, the first layer is Cr, the material of the second layer is Mo, and the etchant is ceric ammonium nitrate. The preferred application of the method is to make conductive thin film lines for thin film transistor arrays used in active matrix liquid crystal displays.Type: GrantFiled: June 7, 1996Date of Patent: September 23, 1997Assignee: Lucent Technologies Inc.Inventors: Cheng-yih Lin, Paul Patrick Mulgrew
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Patent number: 5647999Abstract: A unique method is proposed for fine patterning of a polymeric resin film on a substrate surface or fine patterning of the substrate surface with the patterned resin film as the resist. The method comprises the steps of: (a) forming a thin film of the resin on the substrate surface; (b) pressing the resin film pattern-wise under a pressure in a specified range by using, for example, a fine needle tip so as to enhance adhesion of the resin molecules to the substrate surface; and (c) dissolving away the resin film with an organic solvent selectively in the areas where the pressure is not applied in step (c) leaving the resin in a pattern-wise area after application of the pressure. The fineness of this patterning can be extremely high to be in the molecular size order.Type: GrantFiled: March 20, 1996Date of Patent: July 15, 1997Assignee: Japan as represented by Director General of Agency of Industrial Science and TechnologyInventors: Tetsuya Tada, Toshihiko Kanayama
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Patent number: 5641541Abstract: An improved method for applying a primer to a wafer surface prior to coating the wafer with photoresist is provided. The method comprises priming a wafer with HMDS, removing the wafer from the priming chamber, and closing the chamber. Next, the chamber, piping and primer source are evacuated. The bubbler canister, piping and wafer chamber are held at a pressure of about 15 inches H.sub.2 O while the priming tool is idle between wafer priming operations. By maintaining the vaporizer, piping and wafer chamber at a partial vacuum, the primer will be prevented from condensing and forming harmful droplets on the wafer surface. The invention prevents primer condensation from forming on the wafer, thus improving photolithographic yields and device yields.Type: GrantFiled: September 29, 1995Date of Patent: June 24, 1997Assignee: Taiwan Semiconductor Manufacturing CompanyInventor: Yung-Ta Chen
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Patent number: 5501350Abstract: A process for producing a printed wiring board, comprising the steps of forming a photosensitive resist layer on a copper layer provided on an insulating substrate, patterning the photosensitive resist layer, and etching the copper layer made bare from the photosensitive resist layer to form a copper wiring layer, wherein the surface of the copper layer is subjected to pretreatment comprising the steps of black-oxide treating the surface by the use of an alkaline oxidizing solution and subsequently finely surface-roughening the black-oxide treated surface by the use of an acidic treating solution comprised of phosphoric acid or an organic acid, followed by drying in the presence of oxygen, and thereafter the photosensitive resist layer is formed thereon. Such pretreatment enables formation of fine and uniform roughness on the copper layer surface to bring about an improvement in its adhesion to the resist layer, so that ethcing solutions can be prevented from penetrating the interface between these layers.Type: GrantFiled: January 5, 1995Date of Patent: March 26, 1996Assignee: Toppan Printing Co., Ltd.Inventors: Risaburo Yoshida, Kiyotomo Nakamura, Akitsu Ota, Mitsuaki Taguchi