Application Of Energy To The Gaseous Etchant Or To The Substrate Being Etched Patents (Class 216/63)
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Publication number: 20040094508Abstract: There is provided a method for surface treating where the environmental load is small. The surface treating method of the invention comprises that a cluster bonded by the first molecule and the second molecule by means of an intermolecular force is produced in a gas phase. At least a part of internal energy released in producing the cluster is utilized whereby the first molecule contained in the cluster is made in a state having higher reactivity than that of the first molecular not bonded with the second molecular. The surface of the member to be treated is treated in a gas phase with the cluster containing the first molecule made in a state of higher reactivity.Type: ApplicationFiled: November 14, 2003Publication date: May 20, 2004Applicant: Kabushiki Kaisha ToshibaInventor: Yasushi Nakasaki
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Publication number: 20040084409Abstract: An integrated etch process, for example as used for etching an anti-reflection layer and an underlying aluminum layer, in which the chamber wall polymerization is controlled by coating polymer onto the sidewall by a plasma deposition process prior to inserting the wafer into the chamber, etching the structure, and after removing the wafer from the chamber, plasma cleaning the polymer from the chamber wall. The process is process is particularly useful when the etching is performed in a multi-step process and the polymer is used for passivating the etched structure, for example, a sidewall in an etched structure and in which the first etching step deposits polymer and the second etching step removes polymer. The controlled polymerization eliminates interactions of the etching with the chamber wall material, produces repeatable results between wafers, and eliminates in the etching plasma instabilities associated with changing wall conditions.Type: ApplicationFiled: November 4, 2002Publication date: May 6, 2004Applicant: Applied Materials, Inc.Inventors: Shashank C. Deshmukh, Thorsten B. Lill
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Patent number: 6730370Abstract: A method and apparatus for locally raising the temperature of a material in order to facilitate chemical reactions or processes related to growth or removal of the material utilizes an electrode to apply, in the presence of a growth or removal medium, a controlled succession of thermal spikes or shockwaves of varying energy. The scale of the thermal spikes or shockwaves, and the area of the material affected by the resulting energy transfer, is on the order of a few nanometers to several hundred micrometers, and the duration of the thermal spikes or shockwaves ranges from a few picoseconds to several hundred nanoseconds. The growth or removal medium may be a cryogenic liquid, although other growth media, including liquids, solids, gases in critical or non-critical state, and mixtures of liquids and solids, solids and gases, and liquids and gases, may also be employed.Type: GrantFiled: September 26, 2000Date of Patent: May 4, 2004Inventor: Sveinn Olafsson
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Publication number: 20040074869Abstract: A fluorine-free integrated process for plasma etching aluminum lines in an integrated circuit structure including an overlying anti-reflection coating (ARC) and a dielectric layer underlying the aluminum, the process being preferably performed in a single plasma reactor. The ARC open uses either BCl3/Cl2 or Cl2 and possibly a hydrocarbon passivating gas, preferably C2H4. The aluminum main etch preferably includes BCl3/Cl2 etch and C2H4 diluted with He. The dilution is particularly effective for small flow rates of C2H4. An over etch into the Ti/TiN barrier layer and part way into the underlying dielectric may use a chemistry similar to the main etch. A Cl2/O2 chamber cleaning may be performed, preferably with the wafer removed from the chamber and after every wafer cycle.Type: ApplicationFiled: October 18, 2002Publication date: April 22, 2004Applicant: Applied Materials, Inc.Inventors: Xikun Wang, Hui Chen, Anbei Jiang, Hong Shih, Steve S. Y. Mak
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Publication number: 20040060904Abstract: A micro-tool and corresponding method are disclosed herein for working a very small surface of a substrate. The micro-tool has a tip of diameter on the order of 1 mm or less for placement in close proximity to a location on a substrate to be worked, and at least two open electrodes located near an end of the tip, such that the gap between the open electrodes is on the order of a few microns or less. The micro-tool further includes a housing which holds the tip and wiring extending from the open electrodes to permit connection to a voltage source. When the electrodes of the micro-tool are connected by such wiring to a voltage, an electric field and electron emission arises between the open electrodes such that electron emission currents are established. In the corresponding method, a localized electric field is generated in close proximity to a substrate using a tool having at least two open electrodes with a gap between them on the order of a few microns or less, by applying a voltage to the open electrodes.Type: ApplicationFiled: September 30, 2002Publication date: April 1, 2004Applicant: International Business Machines CorporationInventors: Steven Brett Herschbein, Herschel Maclyn Marchman, Chad Rue, Michael R. Sievers
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Patent number: 6703626Abstract: First, a region including the defect is observed with the atomic force microscope (AFM) and a pattern putting together the shape and position of the defect is extracted from and AFM image. The extracted pattern is then converted to a shape format for a for an ion beam defect repairing apparatus and transferred. At this time, a pattern that is observable with the ion beam defect repairing apparatus is selected as a position alignment pattern. The extracted/converted position alignment pattern is combined with a pattern corresponding to a secondary electron image or a secondary ion image. Repairing of the irradiation region and similar repairing is then performed with respect to matching processing for a pattern for a normal secondary ion image or secondary electron image for the ion beam defect repairing apparatus and extraction is performed by the AFM. A defect region finely adjusted using alignment of the position alignment pattern is then corrected using an ion beam.Type: GrantFiled: January 15, 2002Date of Patent: March 9, 2004Assignee: Seiko Instruments Inc.Inventors: Osamu Takaoka, Satoru Yabe
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Patent number: 6699398Abstract: A process for gas-phase etching of actinide oxides from a substrate by using plasma power comprising the steps of: a) preheating actinide oxides on the substrate within a process chamber filled with fluorine-containing gas and exposing it to plasma power, and subsequently b) etching actinide oxides from the substrate using a plasma gas-phase reactant system.Type: GrantFiled: April 1, 2002Date of Patent: March 2, 2004Assignee: Hanyang Hak Won Co., Ltd.Inventor: Yong-Soo Kim
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Publication number: 20040033425Abstract: The invention refers to a procedure for etching of materials at the surface by focussed electron beam induced chemical reactions at said surface. The invention is characterized in that in a vacuum atmosphere the material which is to be etched is irradiated with at least one beam of molecules, at least one beam of photons and at least one beam of electrons, whereby the irradiated material and the molecules of the beam of molecules are excited in a way that a chemical reaction predetermined by said material and said molecules composition takes place and forms a reaction product and said reaction product is removed from the material surface —irradiation and removal step.Type: ApplicationFiled: May 2, 2003Publication date: February 19, 2004Inventors: Hans Wilfried Peter Koops, Klaus Edinger
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Patent number: 6693040Abstract: A method for cleaning a contact area of a metal line wherein a nitride barrier layer is formed on a sidewall of an insulating interlayer within the contact area by introducing the nitrogen-based radical to the contact area, whereby it is possible to prevent a low dielectric insulating interlayer from becoming deteriorated by the redeposition of metal ions and by hydrogen radical activated during reactive cleaning, thereby maintaining a low dielectric characteristic of the insulating interlayer.Type: GrantFiled: April 11, 2002Date of Patent: February 17, 2004Assignee: Hynix Semiconductor Inc.Inventor: Dong Joon Kim
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Patent number: 6692903Abstract: A method of processing a substrate 30 comprises exposing the substrate 30 to an energized process gas to etch features 67 on the substrate 30 and exposing the substrate 30 to an energized cleaning gas to remove etchant residue 70 and/or remnant resist 60 from the substrate 30. To enhance the cleaning process, the substrate 30 may be treated before, during or after the cleaning process by exposing the substrate 30 to an energized treating gas comprising a halogen species.Type: GrantFiled: December 13, 2000Date of Patent: February 17, 2004Assignee: Applied Materials, IncInventors: Haojiang Chen, James S. Papanu, Mark Kawaguchi, Harald Herchen, Jeng H. Hwang, Guangxiang Jin, David Palagashvili
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Publication number: 20040026369Abstract: A method of etching a layer of magnetic material using a hard mask and an etchant comprising BCl3. The method finds use in etching magnetic materials during fabrication of magneto-resistive random access memory (MRAM) devices.Type: ApplicationFiled: August 12, 2002Publication date: February 12, 2004Inventors: Chentsau Ying, Xiaoyi Chen, Padmapani C. Nallan, Ajay Kumar
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Patent number: 6685848Abstract: A dry-etching method comprises the step of dry-etching a metal thin film as a chromium-containing half-tone phase-shift film, wherein the method is characterized by using, as an etching gas, a mixed gas including (a) a reactive ion etching gas, which contains an oxygen-containing gas and a halogen-containing gas, and (b) a reducing gas added to the gas component (a), in the process for dry-etching the metal thin film. The dry-etching method permits the production of a half-tone phase-shift photomask by forming patterns to be transferred to a wafer on a photomask blank for a chromium-containing half-tone phase-shift mask. The photomask can in turn be used for manufacturing semiconductor circuits. The method permits the decrease of the dimensional difference due to the coexistence of coarse and dense patterns in a plane and the production of a high precision pattern-etched product.Type: GrantFiled: July 27, 1999Date of Patent: February 3, 2004Assignees: Ulvac Coating Corporation, Mitsubishi Denki Kabushiki KaishaInventors: Takaei Sasaki, Noriyuki Harashima, Satoshi Aoyama, Shouichi Sakamoto
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Patent number: 6686290Abstract: The surface of a substrate having a transmission index is irradiated with a beam of atoms having a slow enough velocity to be adsorbed on the substrate. A laser beam whose frequency is detuned by 1 to 10 gigahertz from the resonant frequency of the atoms is projected onto the substrate at an angle, producing total reflection. The atom beam is reflected at regions at which an intensity of an evanescent wave emitted at this time from the substrate surface is high, and adsorbed at regions where the intensity is low, thereby achieving atomic fabrication patterns on a substrate. By using a hologram image to create the pattern, it is possible to form an atomic fabrication patterns in which the size of features correspond to the diameter of the laser beam, enabling the size to be reduced to the diffraction limit of the laser light.Type: GrantFiled: August 27, 2001Date of Patent: February 3, 2004Assignee: Communications Research LaboratoryInventor: Ryuzo Ohmukai
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Publication number: 20040011764Abstract: Method for generating an atmospheric pressure glow plasma (APG), wherein said plasma is generated in a discharge space between a plurality of electrodes. A dielectric is present on at least one of said electrodes, said dielectric having a boundary surface with said plasma enabling interactions between said plasma and said surface. Said dielectric is arranged for releasing electrons contributing to said plasma from said surface by said interactions.Type: ApplicationFiled: July 19, 2002Publication date: January 22, 2004Inventors: Hindrik Willem De Vries, Fuyuhiko Mori, Eugen Aldea, Mauritius Cornelius Maria Van de Sanden
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Publication number: 20040004056Abstract: In a thin-film magnetic head, a top pole layer for defining the recording track width includes a first layer that touches a recording gap layer, and a second layer located on the first layer. The top pole layer is formed in the following manner. First, a magnetic layer is formed on the recording gap layer. Next, the second layer is formed on the magnetic layer by plating. Using the second layer as a mask, the magnetic layer is selectively etched by reactive ion etching to form the first layer. The reactive ion etching uses an etching gas that contains a halogen type gas and a carbon oxide type gas.Type: ApplicationFiled: July 2, 2002Publication date: January 8, 2004Applicants: Headway Technologies, Inc., SAE Magnetics (H.K.) Ltd.Inventors: Yoshitaka Sasaki, Hironori Araki, Takehiro Kamigama
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Publication number: 20030226822Abstract: A composite shadow ring that is constructed of an upper ring and a lower ring assembled together by a plurality of dowel pins and a method for using the ring. The upper ring and the lower ring each has a predetermined outside diameter that is substantially the same, a planar top surface and a planer bottom surface parallel to the planar top surface. Each of the planar bottom surface of the upper ring and the planar top surface of the lower ring has at least two blind holes formed therein. A plurality of dowel pins are used to frictionally engage the at least two blind holes in the upper ring and the at least two blind holes in the lower ring.Type: ApplicationFiled: June 7, 2002Publication date: December 11, 2003Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chang-Jung Li, Wen-Ming Chen, Kun-Yen Fan, Wen-Chi Wang
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Patent number: 6660177Abstract: Reactive atom plasma processing can be used to shape, polish, planarize, and clean surfaces of difficult materials with minimal subsurface damage. The apparatus and methods use a plasma torch, such as a conventional ICP torch. The workpiece and plasma torch are moved with respect to each other, whether by translating and/or rotating the workpiece, the plasma, or both. The plasma discharge from the torch can be used to shape, planarize, polish, clean and/or deposit material on the surface of the workpiece, as well as to thin the workpiece. The processing may cause minimal or no damage to the workpiece underneath the surface, and may involve removing material from, and/or redistributing material on, the surface of the workpiece.Type: GrantFiled: November 7, 2001Date of Patent: December 9, 2003Assignee: Rapt Industries Inc.Inventor: Jeffrey W. Carr
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Patent number: 6653058Abstract: A method of removing photoresist material from a semiconductor substrate includes providing a semiconductor substrate having a patterned photoresist mask. A layer comprised of polymer material is formed over the patterned photoresist mask. The layer comprised of polymer material and a portion of the patterned photoresist mask are then removed. The layer comprised of polymer material is preferably formed by introducing a process gas into a plasma environment and is preferably formed with less thickness in a low aspect ratio area relative to a high aspect ratio area.Type: GrantFiled: September 6, 2001Date of Patent: November 25, 2003Assignee: Lam Research CorporationInventors: Vahid Vahedi, Yosias Melaku
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Patent number: 6647994Abstract: An improved and new process for photoresist stripping for use during fabrication of semiconductor integrated circuits, which use porous low-k dielectric materials, such as OSG or HSQ, as the interlevel and intra-level insulating layers, has been developed. Photoresist stripping in microwave or rf generated plasmas in gaseous mixtures of NH3 and CO takes place without attack or damage to underlying layers of OSG or HSQ. Optimum results are obtained when the ratio of CO to NH3 is between about 0.8 and 1.2.Type: GrantFiled: January 2, 2002Date of Patent: November 18, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Ming-Huei Lui, Mei-Hui Sung
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Publication number: 20030209519Abstract: A layer-by-layer etching apparatus and an etching method using a neutral beam which enables to control etching depth to an atomic level by controlling the etching of each atom of a material layer to be etched under precise control of the supply of an etching gas and irradiation of the neutral beam and enables to minimize etching damage. In the layer-by-layer etching method, a substrate to be etched, on which a layer to be etched is exposed, is loaded on a stage in a reaction chamber. An etching gas is supplied into the reaction chamber to adsorb the etching gas on the surface of an exposed portion of the layer to be etched. Excessive etching gas remaining after being adsorbed is removed. A neutral beam is irradiated on the layer to be etched on which the etching gas is adsorbed. Etch by-products generated by the irradiation of the neutral beam is removed.Type: ApplicationFiled: May 21, 2003Publication date: November 13, 2003Inventors: Geun-Young Yeom, Min-Jae Chung, Do-Haing Lee, Sung-Min Cho, Sae-Hoon Chung
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Patent number: 6627095Abstract: A magnetic recording disk having on its surface a texture structure of fine surface irregularities with reduced variations, which is suitable for high-density magnetic recording, and a method of manufacturing such a magnetic recording disk are provided. A magnetic recording disk has a substrate 11, 12 (16) coated on a surface thereof with a magnetic layer 13, a carbon layer 14, and a lubricating film 15. The substrate has on a surface thereof a texture structure of fine surface irregularities for reducing friction when the substrate is brought into contact with a head and controlling an amount of lift of the head. The fine surface irregularities have a height of 20 nm or less and are formed from a pattern shape or profile of a shield with a high-speed atomic beam emitted from a high-speed atomic beam source.Type: GrantFiled: December 19, 2000Date of Patent: September 30, 2003Assignee: Ebara CorporationInventors: Masahiro Hatakeyama, Katsunori Ichiki, Kenji Watanabe, Kazuo Yamauchi, Shinta Kunitomo, Yasushi Tohma, Tohru Satake
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Patent number: 6626188Abstract: The present invention relates generally to the field of semiconductor device manufacturing, and more specifically to a method for cleaning and preconditioning a dome in a chemical vapor deposition system. During cleaning, the direction of flow of cooling water through an induction coil in the dome is reversed. During preconditioning, the direction of cooling water flow is preferably reversed again, such that it is the same direction as during deposition. The preconditioning portion of the method comprises introducing a hydrogen gas into the CVD chamber, and then introducing a mixture of hydrogen gas and nitrogen gas into the chamber.Type: GrantFiled: June 28, 2001Date of Patent: September 30, 2003Assignee: International Business Machines CorporationInventors: John A. Fitzsimmons, Thomas H. Ivers, Pavel Smetana
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Patent number: 6613242Abstract: Ruthenium, osmium and their oxides can be etched simply and rapidly by supplying an atomic oxygen-donating gas, typically ozone, to the aforementioned metals and their oxides through catalysis between the metals and their reactors and application of the catalysis not only to the etching but also to chamber cleaning ensures stable operation of reactors and production of high quality devices.Type: GrantFiled: October 23, 2001Date of Patent: September 2, 2003Inventors: Miwako Nakahara, Toshiyuki Arai, Shigeru Ohno, Takashi Yunogami, Sukeyoshi Tsunekawa, Kazuto Watanabe
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Publication number: 20030160024Abstract: In a plasma processing method which comprises supplying a processing gas to a vacuum vessel 2 forming a plasma production part, producing a plasma 6 using an antenna 1 and a Faraday shield 8 which are provided at outer periphery of the vacuum vessel and to which a high-frequency electric power can be applied, and carrying out the processing, a voltage of at least 500 V is applied to the Faraday shield 8 and a sample 12 which is disposed in the vacuum vessel 2 and which is a nonvolatile material as a material to be etched is etched.Type: ApplicationFiled: February 27, 2002Publication date: August 28, 2003Inventors: Tadayashi Kawaguchi, Tadamitsu Kanekiyo, Akihiko Mitsuda, Takeshi Shimada, Saburou Kanai
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Patent number: 6610211Abstract: The invention encompasses methods of processing internal surfaces of a chemical vapor deposition reactor. In one implementation, material is deposited over internal surfaces of a chemical vapor deposition reactor while processing semiconductor substrates therein. The deposited material is treated with atomic oxygen. After the treating, at least some of the deposited material is etched from the reactor internal surfaces. In one embodiment, first etching is conducted of some of the deposited material from the reactor internal surfaces. After the first etching, remaining deposited material is treated with atomic oxygen. After the treating, second etching is conducted of at least some of the remaining deposited material from the reactor internal surfaces. In one embodiment, the deposited material is first treated with atomic oxygen. After the first treating, first etching is conducted of some of the deposited material from the reactor internal surfaces.Type: GrantFiled: March 1, 2000Date of Patent: August 26, 2003Assignee: Micron Technology, Inc.Inventors: F. Daniel Gealy, Husam N. Al-Shareef, Scott Jeffrey DeBoer
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Patent number: 6592770Abstract: This invention relates to a method of heating an insulating layer, such as is found in semiconductor devices, in which a formation has been etched through a layer of resist comprising reactive etching the resist, inhibiting absorption of or removing water vapor and/or oxygen at the exposed surfaces of the etched formation and filling the formation with conductive metal in the absence of said water vapor and/or oxygen.Type: GrantFiled: May 11, 2000Date of Patent: July 15, 2003Assignee: Trikon Holdings LimitedInventor: Christopher David Dobson
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Patent number: 6592771Abstract: A method in which etching or ashing is conducted by providing satisfactory kinetic energy of reaction seeds such as ions or radicals without damaging a substrate, and an apparatus used in this method are provided. A predetermined film of for example polycrystalline silicon on the substrate is etched in vapor phase using reaction seeds or precursors thereof generated by contacting a reaction gas such as CF4 with a heated catalyst of for example tungsten.Type: GrantFiled: April 7, 2000Date of Patent: July 15, 2003Assignee: Sony CorporationInventors: Hideo Yamanaka, Kikuo Kaise
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Publication number: 20030127427Abstract: A method of forming a contact in an integrated circuit between a first metalization layer and a silicon substrate. In one embodiment the method comprises forming a premetal dielectric layer over the silicon substrate, etching a contact hole through the premetal dielectric layer and then forming a thin silicon nitride layer on an outer surface of the contact hole. The silicon nitride layer reduces overetching that may otherwise occur when oxidation build-up is removed from the silicon interface within the contact hole by a preclean process. After the preclean process, the contact hole is then filled with one or more conductive materials. In various embodiments the silicon nitride layer is formed by exposing the contact hole to a nitrogen plasma, depositing the layer by a chemical vapor deposition process and depositing the layer by an atomic layer deposition process. In other embodiments, the method is applicable to the formation of vias through intermetal dielectric layers.Type: ApplicationFiled: January 7, 2002Publication date: July 10, 2003Applicant: Applied Materials, Inc.Inventors: Zheng Yuan, Steve Ghanayem, Randhir P.S. Thakur
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Patent number: 6586049Abstract: A method of patterning at least one object layer, includes a step of forming a mask on the object layer, and a step of selectively etching the object layer using the mask. The mask is made of a magnetic metallic compound with a basic metal of nickel or cobalt containing at least group 3B element and/or group 5B element.Type: GrantFiled: December 11, 2000Date of Patent: July 1, 2003Assignee: TDK CorporationInventors: Yasufumi Uno, Toru Inoue, Tetsuya Mino, Koji Matsukuma
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Publication number: 20030116277Abstract: A semiconductor etching apparatus and a method for etching semiconductor devices using the apparatus. The semiconductor etching apparatus includes a chamber for accommodating a wafer, a radical source for supplying a radical into the chamber, a beam source for supplying ion beams or plasma into the chamber, a wafer stage for supporting and holding the wafer accommodated by the chamber, and a neutralizer for neutralizing charge within the chamber ionized by the ion beams, plasma or the radical. The method of etching semiconductor devices includes the steps of forming a reaction layer on the surface of a semiconductor wafer through radical absorption, and etching the surface of the semiconductor wafer by desorbing the reaction layer formed on the surface of the semiconductor wafer.Type: ApplicationFiled: February 12, 2003Publication date: June 26, 2003Inventors: Kyeong-Koo Chi, Seung-Pil Chung
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Publication number: 20030111438Abstract: A method including in a wafer processing environment, introducing a liquid via a carrier gas, and separate from the liquid, introducing a first gas comprising ozone and a legacy amount of oxygen and a second gas comprising an effective amount of oxygen to modify a process operation. A system including a chamber, a liquid source, a first gas source, and a second gas source, a controller configured to control the introduction into the chamber of a liquid from the liquid source, a first gas comprising ozone and a legacy amount of oxygen from the first source, a second gas comprising oxygen from the second gas source, and a memory coupled to the controller comprising a machine-readable medium having a program embodied therein for controlling the second gas to introduce an effective amount of oxygen into the chamber to modify a process operation.Type: ApplicationFiled: December 18, 2001Publication date: June 19, 2003Inventors: Kevin M. Mukai, Shankar Chandran
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Patent number: 6576151Abstract: The present invention discloses a method for removing silicon nitride from a substrate, characterised in that it comprises contacting said substrate with a molten halogen salt.Type: GrantFiled: September 8, 2000Date of Patent: June 10, 2003Assignee: Internuiversitair Microelektronica CentrumInventors: Guy Vereecke, Marc Meuris
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Patent number: 6576152Abstract: In a dry etching method for etching a structure obtained by successively depositing, on a substrate, a gate insulating film, a silicon base film, a tungsten film or an alloy film containing tungsten, the dry etching includes a first process of dry-etching the tungsten film or the alloy film including tungsten, and a second process of dry-etching the silicon base film, and the first process employs, as an etching gas, a gas mixture obtained by mixing O2 gas into a gas including at least C and F, with the flow ratio of the O2 gas being 10˜50% by volume percentages. This dry etching method realizes highly-precise dry etching by which a vertical configuration of the poly-metal structure is obtained, and the selection ratio of W with respect to poly-Si can be controlled and, moreover, penetration through the underlying gate oxide film is prevented.Type: GrantFiled: July 6, 2001Date of Patent: June 10, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Tetsuya Matsutani
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Publication number: 20030098291Abstract: A layer-by-layer etching apparatus and an etching method using a neutral beam which enables to control etching depth to an atomic level by controlling the etching of each atom of a material layer to be etched under precise control of the supply of an etching gas and irradiation of the neutral beam and enables to minimize etching damage. In the layer-by-layer etching method, a substrate to be etched, on which a layer to be etched is exposed, is loaded on a stage in a reaction chamber. An etching gas is supplied into the reaction chamber to adsorb the etching gas on the surface of an exposed portion of the layer to be etched. Excessive etching gas remaining after being adsorbed is removed. A neutral beam is irradiated on the layer to be etched on which the etching gas is adsorbed. Etch by-products generated by the irradiation of the neutral beam is removed.Type: ApplicationFiled: February 28, 2002Publication date: May 29, 2003Inventors: Geun-Young Yeom, Min-Jae Chung, Do-Haing Lee, Sung-Min Cho, Sae-Hoon Chung
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Patent number: 6569775Abstract: A method of improving plasma processing of a semiconductor wafer by exposing the wafer or the plasma to photons while the wafer is being processed. One embodiment of the method comprises the steps of etching an aluminum layer and, during the etching, exposing the semiconductor wafer containing the aluminum layer to photons that photodesorb copper chloride from the surface of the layer thus improving the etch process performance.Type: GrantFiled: February 17, 2000Date of Patent: May 27, 2003Assignee: Applied Materials, Inc.Inventors: Peter K. Loewenhardt, John M. Yamartino, Hui Chen, Diana Xiaobing Ma
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Patent number: 6568067Abstract: The present invention provides a method of efficiently manufacturing a dielectric waveguide with high reliability and precision. In the method, a resist material is formed on the outer surface of a green compact provided with a removal inhibiting layer, and predetermined portion of the green compact defined by the resist material is removed by the sand blasting method using the resist material as a mask, until the removal inhibiting layer is exposed to obtain a shaped green compact structure. The thus-obtained structure is fired to obtain a sintered body which comprises a dielectric strip and a wing.Type: GrantFiled: February 9, 2001Date of Patent: May 27, 2003Assignee: Murata Manufacturing Co., Ltd.Inventor: Toshikazu Takeda
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Publication number: 20030085205Abstract: A transformer-coupled plasma source using toroidal cores forms a plasma with a high-density of ions along the center axis of the torus. In one embodiment, cores of a plasma generator are stacked in a vertical alignment to enhance the directionality of the plasma and generation efficiency. In another embodiment, cores are arranged in a lateral array into a plasma generating plate that can be scaled to accommodate substrates of various sizes, including very large substrates. The symmetry of the plasma attained allows simultaneous processing of two substrates, one on either side of the plasma generator.Type: ApplicationFiled: April 20, 2001Publication date: May 8, 2003Applicant: Applied Materials, Inc.Inventors: Canfeng Lai, Michael S. Cox, Peter K. Loewenhardt, Tsutomu Tanaka, Shamouil Shamouilian
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Patent number: 6558559Abstract: A method of sacrificial layer etching of micromechanical surface structures, in which a sacrificial layer is deposited on a heatable silicon substrate and is structured. A temperature difference between the substrate and the vapor phase of an etching medium is established in such a way that exposed metal contacts made of aluminum alloys are not attacked at the same time and are not subsequently exposed to any risk of corrosion.Type: GrantFiled: February 5, 1998Date of Patent: May 6, 2003Assignee: Robert Bosch GmbHInventors: Volker Becker, Franz Laermer, Michael Offenberg, Andrea Schilp
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Publication number: 20030080088Abstract: A manufacturing method of a thin-film magnetic head provided with an MR element includes a step of forming an MR multi-layered structure in which a current flows in a direction perpendicular to surfaces of layers of the MR multi-layered structure, on a lower electrode film, a step of depositing an insulation film on the formed MR multi-layered structure and the lower electrode film, a step of flattening the deposited insulation film until at least upper surface of the MR multi-layered structure is exposed, and a step of forming an upper electrode film on the flattened insulation film and the MR multi-layered structure.Type: ApplicationFiled: October 24, 2002Publication date: May 1, 2003Inventors: Takeo Kagami, Naoki Ohta, Tetsuya Kuwashima
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Patent number: 6551520Abstract: In a method for exhausting processing gases out of a dry etching apparatus, processing gases are introduced into a processing chamber of the dry etching apparatus and converted into a gas plasma to etch a semiconductor workpiece. After plasma etching the semiconductor workpiece, the gas plasma is centrally gathered under the semiconductor workpiece by a sucking force formed surrounding the bottom periphery of the semiconductor workpiece, and then, is exhausted. The semiconductor workpiece to be processed is placed on a chuck under which an exhausting means is arranged.Type: GrantFiled: June 8, 2000Date of Patent: April 22, 2003Assignee: Nanya Technology Corp.Inventor: Ron-Fu Chu
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Publication number: 20030071017Abstract: There is provided an alarm apparatus for checking an amount of electric current supplied to each of the lamps of a wafer etching equipment and timely exchanging defective lamps if the amount of the current is less than a predetermined level, thereby minimizing process failures. The alarm apparatus includes a plurality of lamps provided above a dome cover of a reaction chamber to uniformly maintain a constant temperature of the dome cover, current quantity detecting devices provided on each of electric lines supplying electric power to each of the lamps, a controller for checking the amount of electric current through each of the current quantity detecting devices to compare the detected amount of electric current with a predetermined amount of electric current, and an alarm indicating a proper time to exchange lamps having an amount of electric current less than the predetermined amount of electric current in response to a comparison result from the controller.Type: ApplicationFiled: March 18, 2002Publication date: April 17, 2003Inventor: Il Kwon Sin
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Publication number: 20030062128Abstract: A compensation ring 31 disposed to surround a periphery of a wafer W on a susceptor 30 is concentrically divided into an inside first compensation ring member 32 and an outside second compensation ring member 33. A width of a first compensation ring member 32 is made such thin as one to three times mean free path of treatment gas molecules, thereby suppressing heat transfer between a susceptor 30 and a second compensation ring member 33. A base of a second compensation ring member, through a layer of conductive silicone rubber 34, is made to come into an intimate contact with an upper surface of a susceptor 30, thus helping to cool.Type: ApplicationFiled: November 15, 2002Publication date: April 3, 2003Inventor: Kazuki Denpoh
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Publication number: 20030059984Abstract: A method for forming on a substrate an electronic device including an electrically conductive or semiconductive material in a plurality or regions, the operation of the device utilising current flow from a first region to a second region, the method comprising: forming a mixture by mixing the material with a liquid; forming on the substrate a confinement structure including a first zone in a first area of the substrate and a second zone in a second area of the substrate, the first zone having a greater repellence for the mixture than the second zone, and a third zone in a third area of the substrate spaced from the second area by the first area, the first zone having a greater repellence for the mixture than the third zone, and depositing the material on the substrate by applying the mixture over the substrate whereby the deposited material may be confined by the relative repellence of the first zone to spaced apart regions defining the said first and second regions of the device and being electrically separaType: ApplicationFiled: June 21, 2002Publication date: March 27, 2003Applicant: PLASTIC LOGIC LIMITEDInventors: Henning Sirringhaus, Takeo Kawase, Richard Henry Friend
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Publication number: 20030052087Abstract: In a plasma generating apparatus including a reaction chamber for providing a reaction space cut off from the outside; a plasma electrode installed at the outer upper portion of the reaction chamber, receiving high frequency power from the outside and generating plasma inside the reaction chamber; a grid horizontally installed to the reaction space, dividing the reaction space into an upper plasma generating space and a lower processing space and having plural through holes connecting the upper and lower spaces; an upper gas injector for providing gas to the plasma generating space; a lower gas injector for providing gas to the processing space; and a substrate supporting board installed to the processing space to be horizontally mounted with a substrate, by installing the grid in the reaction space, injecting inert gas through the upper gas injector and injecting process gas such as CxFy, etc. through the lower gas injector, a selective etching ratio of SiO2 can be improved.Type: ApplicationFiled: September 4, 2002Publication date: March 20, 2003Applicant: Jusung Engineering Co.Inventors: Gi-Chung Kwon, Hong-Sik Byun, Hong-Seub Kim, Joung-Sik Kim, Seong-Hyuk Choi, Hong-Young Chang, Keun-Hei Bai
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Publication number: 20030052079Abstract: A method of processing specimens, an apparatus therefor, and a method of manufacture of a magnetic head are provided wherein a complicated conventional post processing step for removing corrosion products is eliminated by a corrosion prevention processing for removing only a residual chlorine compound produced in the gas plasma etching. More specifically, the method is comprised of the steps of: forming a lamination film including a seed layer made of NiFe alloy, an upper magnetic pole made of NiFe alloy connected to the seed layer, a gap layer made of oxide film in close contact with the seed layer, and a shield layer made of NiFe alloy in close contact with the gap layer; plasma-etching the seed layer with a gas which contains chlorine using the upper magnetic pole as a mask; and after that removing the residual chlorine compound by a plasma post treatment with a gas plasma which contains H2O or methanol.Type: ApplicationFiled: October 25, 2002Publication date: March 20, 2003Inventors: Ken Yoshioka, Yoshimi Torii, Moriaki Fuyama, Tomohiro Okada, Saburou Kanai, Takehito Usui, Hitoshi Harata
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Publication number: 20030052086Abstract: This invention relates to a method for etching an organic insulating film used in the production of semiconductor devices.Type: ApplicationFiled: February 25, 2002Publication date: March 20, 2003Inventors: Michinobu Mizumura, Ryooji Fukuyama, Yutaka Ohmoto, Katsuya Watanabe
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Patent number: 6532647Abstract: A manufacturing method of a composite type thin-film magnetic head with a reading head element and an inductive writing head element, includes a step of forming the reading head element and its lead conductor layers on a first insulation layer, a step of forming a second insulation layer to cover the reading head element and the lead conductor layers, a step of forming a second shield layer on the second insulation layer, a step of forming a third insulation layer, and a step of forming via holes and a back gap hole. The via holes and back gap hole forming step is executed by reactive ion etching (RIE) for simultaneously removing the second insulation layer and the third insulation layer located at the via holes and the third insulation layer located at the back gap hole.Type: GrantFiled: February 18, 2000Date of Patent: March 18, 2003Assignee: TDK CorporationInventors: Kazuya Maekawa, Akio Iijima, Tetsuya Mino
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Publication number: 20030042227Abstract: A scavenger assembly for use with a plasma etching chamber having an electrode. The scavenger assembly including an adjustable scavenger plug adapted to extend from the electrode into the plasma etching chamber. The adjustable scavenger plug provides a structure for spatially tailoring an etch profile in the plasma etch chamber. Additionally, a method is provided for etching a substrate in a plasma etching chamber. The method includes the steps of providing the substrate on a chuck assembly within the plasma etching chamber, providing an electrode within the plasma etching chamber opposite the chuck assembly, and providing an adjustable scavenger plug extending from the electrode into the plasma etching chamber. The method further includes the step of performing an etching operation on the substrate by spatially tailoring an etch profile in the plasma etch chamber using the adjustable scavenger plug.Type: ApplicationFiled: August 29, 2002Publication date: March 6, 2003Applicant: TOKYO ELECTRON LIMITEDInventor: Steven T. Fink
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Patent number: 6527968Abstract: A process for etching a substrate 25 in an etching chamber 105, and simultaneously removing etch residue deposited on the surfaces of the walls 110 and components of the etching chamber 105. In one version, a two-stage method of opening a nitride mask layer on the substrate includes a first stage of providing a highly chemically reactive process gas in the chamber 105 to etch the nitride layer 32 and/or an underlying oxide layer 34, and a second stage of providing a less chemically reactive process gas in the chamber to etch the nitride layer 32 and/or the oxide layer 34 at a slower rate than the first stage. The first and second stage process gases may each comprise a fluorine containing gas, with the fluorine ratio of the first gas higher than the fluorine ratio of the second gas.Type: GrantFiled: March 27, 2000Date of Patent: March 4, 2003Assignee: Applied Materials Inc.Inventors: Xikun Wang, Scott Williams, Shaoher X. Pan
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Publication number: 20030033979Abstract: A substrate processing chamber has a substrate support to support a substrate, and an exhaust conduit about the substrate support. A first process gas distributor directs a first process gas, such as a non-reactive gas, about the substrate perimeter and toward the exhaust conduit at a first flow rate to form a curtain of non-reactive gas about the substrate. A second process gas distributor directs a second process gas, such as reactive CVD or etchant gas, toward a central portion of the substrate at a second flow rate which is lower than the first flow rate. A gas energizer energizes the first and second process gases in the chamber. A controller operates the substrate support, gas flow meters, gas energizer, and throttle valve, to process the substrate in the energized gas.Type: ApplicationFiled: August 16, 2001Publication date: February 20, 2003Applicant: Applied Materials, Inc.Inventors: Arnold V. Kholodenko, Dan Katz, Wing L. Cheng