Specific Configuration Of Electrodes To Generate The Plasma Patents (Class 216/71)
  • Patent number: 8652342
    Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: February 18, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
  • Publication number: 20140034612
    Abstract: A method of controlling distribution of a plasma parameter in a plasma reactor having an RF-driven electrode and two (or more) counter electrodes opposite the RF driven electrode and facing different portions of the process zones. The method includes providing two (or more) variable reactances connected between respective ones of the counter electrodes and ground, and governing the variable reactances to change distribution of a plasma parameter such as plasma ion density or ion energy.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 6, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Yang Yang, Kartik Ramaswamy, Kenneth S. Collins, Steven Lane, Douglas A. Buchberger, JR., Lawrence Wong, Nipun Misra
  • Patent number: 8642481
    Abstract: A method of etching exposed silicon-and-nitrogen-containing material on patterned heterogeneous structures is described and includes a remote plasma etch formed from a fluorine-containing precursor and an oxygen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the exposed regions of silicon-and-nitrogen-containing material. The plasmas effluents react with the patterned heterogeneous structures to selectively remove silicon-and-nitrogen-containing material from the exposed silicon-and-nitrogen-containing material regions while very slowly removing other exposed materials. The silicon-and-nitrogen-containing material selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: February 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Yunyu Wang, Anchuan Wang, Jingchun Zhang, Nitin K. Ingle, Young S. Lee
  • Patent number: 8623471
    Abstract: A plasma treatment system for treating a workpiece with a downstream-type plasma. The processing chamber of the plasma treatment system includes a chamber lid having a plasma cavity disposed generally between a powered electrode and a grounded plate, a processing space separated from the plasma cavity by the grounded plate, and a substrate support in the processing space for holding the workpiece. A direct plasma is generated in the plasma cavity. The grounded plate is adapted with openings that remove electrons and ions from the plasma admitted from the plasma cavity into the processing space to provide a downstream-type plasma of free radicals. The openings may also eliminate line-of-sight paths for light between the plasma cavity and processing space. In another aspect, the volume of the processing chamber may be adjusted by removing or inserting at least one removable sidewall section from the chamber lid.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: January 7, 2014
    Assignee: Nordson Corporation
    Inventors: James S. Tyler, James D. Getty, Robert S. Condrashoff, Thomas V. Bolden, II
  • Patent number: 8591754
    Abstract: A tray for a dry etching apparatus includes substrate accommodation holes penetrating a thickness direction and a substrate support portion supporting an outer peripheral edge portion of a lower surface of a substrate. An upper portion includes a tray support surface supporting a lower surface of the tray, substrate placement portions on each of which a lower surface of the substrate to be placed, and a concave portion for accommodating the substrate support portion. A dc voltage applying mechanism applies a dc voltage to an electrostatic attraction electrode. A heat conduction gas supply mechanism supplies a heat conduction gas between the substrate and substrate placement portion. During carrying of the substrate, the outer peripheral edge of the lower surface of the substrate is supported by the substrate accommodation hole. During processing of the substrate, the substrate support portion is accommodated in the concave portion.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Ryuzou Houchin, Hiroyuki Suzuki
  • Patent number: 8591660
    Abstract: The invention relates to a method of cleaning the surface of a material that is coated with an organic substance. The inventive method is characterized in that it comprises the following steps, consisting in: introducing the material into a treatment chamber, having a pressure of between 10 mbar and 1 bar therein, which is supplied with a gas stream containing at least 90 volume percent of oxygen; and generating a plasma by passing an electric discharge between the surface of the material and a dielectric-covered electrode in order to break down the organic substance under the action of the free radicals O thus produces. The invention also relates to an installation that is used to carry out said method.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: November 26, 2013
    Assignee: Usinor
    Inventors: Eric Silberberg, Eric Michel, Francois Reniers, Claudine Buess-Herman
  • Patent number: 8592319
    Abstract: A substrate processing apparatus includes a chamber accommodating a wafer, a susceptor disposed inside the chamber and on which the wafer is held, an upper electrode facing the susceptor, and a second high frequency power source connected to the susceptor, wherein the upper electrode is electrically connected to a ground and is moveable with respect to the susceptor. The substrate processing apparatus divides a potential difference between plasma generated in a processing space and the ground into a potential difference between the plasma and a dielectric and a potential difference between the dielectric and the ground by burying the dielectric in the upper electrode, and changes a gap between the upper electrode and the susceptor. Accordingly, plasma density between the upper electrode and the susceptor is changed.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: November 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Nobuhiro Wada, Makoto Kobayashi, Hiroshi Tsujimoto, Jun Tamura, Mamoru Naoi, Jun Oyabu
  • Patent number: 8591755
    Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: November 26, 2013
    Assignee: Lam Research Corporation
    Inventor: Rajinder Dhindsa
  • Patent number: 8574445
    Abstract: Provided are a method for generating hollow cathode plasma and a method for treating a large area substrate using the hollow cathode plasma. In the methods, the hollow cathode plasma is generated by a gas introduced between a hollow cathode in which a plurality of lower grooves where plasma is generated is defined in a bottom surface thereof and a baffle in which a plurality of injection holes is defined. A substrate disposed on a substrate support member is treated using the hollow cathode plasma passing through the injection holes. The uniform plasma having high density can be generated by hollow cathode effect due to the hollow cathode having the lower grooves and the injection holes of the baffle. Also, since the substrate can be treated using a hydrogen gas and a nitrogen gas in an ashing process, a damage of a low dielectric constant dielectric can be minimized.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: November 5, 2013
    Assignee: PSK Inc.
    Inventors: Jeonghee Cho, Jong Ryang Joo, Shinkeun Park
  • Patent number: 8522716
    Abstract: A flexible polymer or elastomer coated RF return strap to be used in a plasma chamber to protect the RF strap from plasma generated radicals such as fluorine and oxygen radicals, and a method of processing a semiconductor substrate with reduced particle contamination in a plasma processing apparatus. The coated RF strap minimizes particle generation and exhibits lower erosion rates than an uncoated base component. Such a coated member having a flexible coating on a conductive flexible base component provides an RF ground return configured to allow movement of one or more electrodes in an adjustable gap capacitively coupled plasma reactor chamber.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: September 3, 2013
    Assignee: Lam Research Corporation
    Inventors: Bobby Kadkhodayan, Jon McChesney, Eric Pape, Rajinder Dhindsa
  • Patent number: 8518284
    Abstract: A remote plasma source comprises a first plate-like electrode (7s) and a second plate-like electrode (7b) which are arranged in parallelism and mutually electrically DC isolated. The two electrodes (7s, 7b) are operationally connected to an Rf generator (11). The first electrode (7s) has a surface which is freely exposed to a substrate holder (3) and has a pattern of through-openings (19) distributed along its surface extent.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: August 27, 2013
    Assignee: Tel Solar AG
    Inventors: Ulrich Kroll, Boris Legradic
  • Patent number: 8518830
    Abstract: Disclosed is a plasma etching method capable of carrying out an etching process while preventing an etching shape defect such as a bowing from occurring. The plasma etching method includes etching an organic film formed on the substrate to a middle depth using an inorganic film as a mask by generating plasma between an upper electrode a surface of which is formed with a silicon containing material and a lower electrode where a substrate to be processed is placed thereon in a processing chamber; forming a protective film including the silicon containing material of the upper electrode on a side wall of an etching region formed from the etching process by applying a negative DC voltage on the upper electrode while generating the plasma; and continuing the etching process using the plasma thereby etching the organic film to a predetermined depth.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 27, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Yoshiki Igarashi, Kazuki Narishige
  • Publication number: 20130213935
    Abstract: Methods for processing a substrate are provided herein. In some embodiments, a method of etching a dielectric layer includes generating a plasma by pulsing a first RF source signal having a first duty cycle; applying a second RF bias signal having a second duty cycle to the plasma; applying a third RF bias signal having a third duty cycle to the plasma, wherein the first, second, and third signals are synchronized; adjusting a phase variance between the first RF source signal and at least one of the second or third RF bias signals to control at least one of plasma ion density non-uniformity in the plasma or charge build-up on the dielectric layer; and etching the dielectric layer with the plasma.
    Type: Application
    Filed: March 25, 2013
    Publication date: August 22, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventor: APPLIED MATERIALS, INC.
  • Patent number: 8501630
    Abstract: A method for selectively etching a substrate is described. The method includes preparing a substrate comprising a silicon nitride layer overlying a silicon-containing contact region, and patterning the silicon nitride layer to expose the silicon-containing contact region using a plasma etching process in a plasma etching system. The plasma etching process uses a process composition having as incipient ingredients a process gas containing C, H and F, and a non-oxygen-containing additive gas, wherein the non-oxygen-containing additive gas includes H, or C, or both H and C, and excludes a halogen atom.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: August 6, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Andrew W. Metz, Hongyun Cottle
  • Publication number: 20130186859
    Abstract: RF power is coupled to one or more RF drive points (50-56) on an electrode (20-28) of a plasma chamber such that the level of RF power coupled to the RF drive points (51-52, 55-56) on the half (61) of the electrode that is closer to the workpiece passageway (12) exceeds the level of RF power coupled to the RF drive points (53-54), if any, on the other half (62) of the electrode. Alternatively, RF power is coupled to one or more RF drive points on an electrode of a plasma chamber such that the weighted mean of the drive point positions is between the center (60) of the electrode and the workpiece passageway. The weighted mean is based on weighting each drive point position by the time-averaged level of RF power coupled to that drive point position. The invention offsets an increase in plasma density that otherwise would exist adjacent the end of the electrode closest to the passageway.
    Type: Application
    Filed: December 31, 2012
    Publication date: July 25, 2013
    Applicant: Applied Materials, Inc. a corporation of the State of Delaware, U.S.A.
    Inventor: Applied Materials, Inc. a corporation of the State of Delaware, U.S.A
  • Patent number: 8486798
    Abstract: A replaceable chamber element for use in a plasma processing system, such as a plasma etching system, is described. The replaceable chamber element includes a chamber component configured to be exposed to plasma in a plasma processing system, wherein the chamber component is fabricated to include a semiconductor junction, and wherein a capacitance of the chamber component is varied when a voltage is applied across the semiconductor junction.
    Type: Grant
    Filed: February 5, 2012
    Date of Patent: July 16, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Zhiying Chen, Jianping Zhao, Lee Chen, Merritt Funk, Radha Sundararajan
  • Patent number: 8480807
    Abstract: The invention relates to a method of cleaning and/or sterilization of an object provided in a hermetically sealed enclosure, providing a pressure difference between an internal volume of the enclosure and surroundings and generating a plasma solely inside the enclosure for said cleaning and/or sterilization of the object. The invention further relates to an apparatus for enabling the same. The apparatus 10 comprises a vacuum chamber 1, which can be evacuated using a vacuum pump 2, and a source 3 arranged to generate plasma of a suitable gas in an enclosure 8, which is substantially hermetically closed with respect to the atmosphere of the vacuum chamber. The enclosure 8 may be of a flexible type or may be manufactured from a rigid material. In case when the enclosure is rigid the pressure inside the enclosure may be lower than an outside pressure.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: July 9, 2013
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderziek TNO
    Inventors: Norbertus Benedictus Koster, René Koops, Kemal Agovic, Fokko Pieter Wieringa
  • Patent number: 8470095
    Abstract: A process for surface preparation of a substrate (2), which comprises introducing or running a substrate (2) into a reaction chamber (6, 106). A dielectric barrier (14, 114) is placed between electrodes (1, 10, 110). A high-frequency electrical voltage is generated, to generate filamentary plasma (12, 112). Molecules (8, 108) are introduced into the reaction chamber (6, 106). Upon contact with the plasma, they generate active species typical of reacting with the surface of the substrate. An adjustable inductor (L) placed in parallel with the inductor of the installation is employed to reduce the phase shift between the voltage and the current generated and to increase the time during which the current flows in the plasma (12, 112).
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: June 25, 2013
    Assignee: AGC Glass Europe
    Inventors: Eric Tixhon, Joseph Leclercq, Eric Michel
  • Patent number: 8465658
    Abstract: In a method of forming a main pole, an initial accommodation layer is etched by RIE using a first etching mask having a first opening, whereby a groove is formed in the initial accommodation layer. Next, a part of the initial accommodation layer including the groove is etched by RIE using a second etching mask having a second opening, so that the groove becomes an accommodation part. The main pole is then formed in the accommodation part. The first etching mask has first and second sidewalls that face the first opening and are opposed to each other at a first distance in a track width direction. The second etching mask has third and fourth sidewalls that face the second opening and are opposed to each other at a second distance greater than the first distance.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: June 18, 2013
    Assignee: Headway Technologies, Inc.
    Inventors: Hironori Araki, Yoshitaka Sasaki, Hiroyuki Ito, Kazuki Sato, Shigeki Tanemura, Yukinori Ikegawa
  • Patent number: 8460568
    Abstract: A continuous method for making a nanostructured surface comprises (a) placing a substrate comprising a nanoscale mask on a cylindrical electrode in a vacuum vessel, (b) introducing etchant gas to the vessel at a predetermined pressure, (c) generating plasma between the cylindrical electrode and a counter-electrode, (d) rotating the cylindrical electrode to translate the substrate, and (e) anisotropically etching a surface of the substrate to provide anisotropic nanoscale features on the surface.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: June 11, 2013
    Assignee: 3M Innovative Properties Company
    Inventors: Moses M. David, Ta-Hua Yu
  • Patent number: 8460508
    Abstract: Synchronous pulse plasma etching equipment includes a first electrode and one or more second electrodes configured to generate plasma in a plasma etching chamber. A first radio frequency power output unit is configured to apply a first radio frequency power having a first frequency and a first duty ratio to the first electrode, and to output a control signal including information about a phase of the first radio frequency power. At least one second radio frequency power output unit is configured to apply a second radio frequency power having a second frequency and a second duty ratio to a corresponding second electrode among the second electrodes. The second radio frequency power output unit is configured to control the second radio frequency power to be synchronized with the first radio frequency power or to have a phase difference from the first radio frequency power in response to the control signal.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: June 11, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ken Tokashiki, Hong Cho, Jeong-Dong Choe
  • Patent number: 8449731
    Abstract: Local plasma density, e.g., the plasma density in the vicinity of the substrate, is increased by providing an ion extractor configured to transfer ions and electrons from a first region of magnetically confined plasma (typically a region of higher density plasma) to a second region of plasma (typically a region of lower density plasma). The second region of plasma is preferably also magnetically shaped or confined and resides between the first region of plasma and the substrate. A positively biased conductive member positioned proximate the second region of plasma serves as an ion extractor. A positive bias of about 50-300 V is applied to the ion extractor causing electrons and subsequently ions to be transferred from the first region of plasma to the vicinity of the substrate, thereby forming higher density plasma. Provided methods and apparatus are used for deposition and resputtering.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Anshu A. Pradhan, Douglas B. Hayden, Ronald L. Kinder, Alexander Dulkin
  • Publication number: 20130126475
    Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 23, 2013
    Applicant: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Alexei Marakhtanov, Gerardo Delgadino, Eric Hudson, Bi Ming Yen, Andrew D. Bailey, III
  • Patent number: 8444870
    Abstract: A method and apparatus are provided for processing a substrate with a radiofrequency inductive plasma in the manufacture of a device. The inductive plasma is maintained with an inductive plasma applicator having one or more inductive coupling elements. There are thin windows between the inductive coupling elements and the interior of the processing chamber. Various embodiments have magnetic flux concentrators in the inductive coupling elements and feed gas holes interspersed among the inductive coupling elements. The thin windows, magnetic flux concentrators, and interspersed feed gas holes are useful to effectuate uniform processing, high power transfer efficiency, and a high degree of coupling between the applicator and plasma. In some embodiments, capacitive current is suppressed using balanced voltage to power an inductive coupling element.
    Type: Grant
    Filed: May 23, 2009
    Date of Patent: May 21, 2013
    Assignee: Mattson Technology, Inc.
    Inventor: Valery Godyak
  • Publication number: 20130119020
    Abstract: A plasma process chamber includes a top electrode, a bottom electrode disposed opposite the top electrode, the bottom electrode capable of supporting a substrate. The plasma process chamber also includes a plasma containment structure defining a plasma containment region, the plasma containment region being less than an entire surface of the substrate. The plasma containment structure rotates relative to the substrate and wherein the plasma containment region includes a center point of the substrate throughout the rotation of the plasma containment structure relative to the substrate. The plasma containment structure includes multiple gaps. A vacuum source is coupled to the gaps in the plasma containment structure. A method of processing a substrate is also described.
    Type: Application
    Filed: December 1, 2011
    Publication date: May 16, 2013
    Inventor: Eric Hudson
  • Patent number: 8431035
    Abstract: A plasma processing apparatus for processing a substrate by using a plasma includes a processing chamber for accommodating and processing the substrate therein, a lower electrode for mounting the substrate thereon in the processing chamber, an upper electrode disposed to face the lower electrode in the processing chamber, a radio frequency power supply for supplying a radio frequency power to at least one of the lower and the upper electrode, to thereby generate the plasma between the lower and the upper electrode, and an electrical characteristic control unit for adjusting an impedance of a circuit at the side of an electrode to the plasma for a frequency of at least one radio frequency wave present in the processing chamber such that the circuit does not resonate.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: April 30, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Manabu Iwata, Chishio Koshimizu, Yohei Yamazawa
  • Patent number: 8425791
    Abstract: In a method of controlling the temperature of an in-chamber member used in a plasma processing apparatus that processes a target substrate with plasma, a plurality of power-feeding portions is provided in the in-chamber member and the in-chamber member is heated by supplying electric power thereto through the power-feeding portions. A resistance value or resistivity of the in-chamber member is measured and the electric power is controlled based on the temperature of the in-chamber member estimated from the resistance value or resistivity. The in-chamber member includes one or more annular members arranged around the target substrate. The in-chamber member is a member making contact with plasma within a chamber and existing near the target substrate.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: April 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Chishio Koshimizu, Manabu Iwata, Tatsuo Matsudo
  • Patent number: 8426318
    Abstract: Provided is a method of setting a thickness of a dielectric, which restrains the dielectric formed in an electrode from being consumed when etching a silicon dioxide film on a substrate by using plasma. In a substrate processing apparatus including an upper electrode facing a susceptor and the dielectric formed of silicon dioxide in the upper electrode, a silicon dioxide film formed on a wafer being etched by using plasma, an electric potential of the plasma facing the dielectric in a case where the dielectric is not formed in the upper electrode is estimated based on a bias power applied to the susceptor and an A/C ratio in a chamber, and the thickness of the dielectric is determined so that an electric potential of the plasma, which is obtained by multiplying the estimated electric potential of the plasma by a capacity reduction coefficient calculated when a capacity of the dielectric and a capacity of a sheath generated around a surface of the dielectric are combined, is 100 eV or less.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: April 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Jun Oyabu, Takashi Kitazawa
  • Patent number: 8420547
    Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: April 16, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Yoshinobu Ooya
  • Patent number: 8404596
    Abstract: A plasma ashing method is used for removing a patterned resist film in a processing chamber after etching a portion of a low-k film from an object to be processed in the processing chamber by using the patterned resist film as a mask. The method includes a first step of supplying a reaction product removal gas including at least CO2 gas into the processing chamber, generating plasma of the reaction product removal gas by applying a high frequency power for the plasma generation, and removing reaction products deposited on an inner wall of the processing chamber; and a second step of supplying an ashing gas into the processing chamber, generating plasma of the ashing gas by applying a high frequency power for the plasma generation, and removing the resist film.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: March 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Shigeru Tahara, Naotsugu Hoshi
  • Patent number: 8398875
    Abstract: Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: March 19, 2013
    Assignee: Lam Research Corporation
    Inventors: Gregory S. Sexton, Andrew D. Bailey, III, Alan M. Schoepp, John D. Boniface
  • Patent number: 8343371
    Abstract: The invention can provide apparatus and methods of processing a substrate in real-time using a Quasi-Neutral Beam (Q-NB) curing system to improve the etch resistance of photoresist layer. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Merritt Funk, Lee Chen, Radha Sundararajan
  • Patent number: 8344482
    Abstract: In the bevel etching apparatus relating to the present invention, a substrate is inserted between electrically connected electrodes. A high-frequency power source is connected to the electrodes, and ground potential is applied to a support unit that supports the substrate. Gas (atmosphere) is supplied to the gap between the electrodes and the application of the high-frequency electric power to the electrodes causes the generation of atmospheric-pressure glow discharge between the electrode and the substrate. Bevel etching is performed by rotating the substrate along the circumferential direction in this condition. According to this construction, the bevel etching can be simultaneously performed to the front surface, the rear surface and the side of the substrate without causing any configuration change in the substrate.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventor: Shin-ichi Imai
  • Publication number: 20120318773
    Abstract: The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron spinning control. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a processing chamber having a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a support pedestal disposed in the interior processing region of the processing chamber, and a plasma generator source disposed in the processing chamber operable to provide predominantly an electron beam source to the interior processing region.
    Type: Application
    Filed: April 25, 2012
    Publication date: December 20, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Banqiu Wu, Ajay Kumar, Kartik Ramaswamy, Omkaram Nalamasu
  • Publication number: 20120312780
    Abstract: A method for processing a substrate in a capacitively-coupled plasma processing system having a plasma processing chamber and at least an upper electrode and a lower electrode. The substrate is disposed on the lower electrode during plasma processing. The method includes providing at least a first RF signal, which has a first RF frequency, to the lower electrode. The first RF signal couples with a plasma in the plasma processing chamber, thereby inducing an induced RF signal on the upper electrode. The method also includes providing a second RF signal to the upper electrode. The second RF signal also has the first RF frequency, A phase of the second RF signal is offset from a phase of the first RF signal by a value that is less than 10%, The method further includes processing the substrate while the second RF signal is provided to the upper electrode.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Inventors: Rajinder Dhindsa, Hudson Eric, Alexei Marakhtanov, Andreas Fischer
  • Patent number: 8329055
    Abstract: Apparatus and method for improving the plasma uniformity in a plasma based system are described. The apparatus may include a plurality of electrical conductors, to which one or more types of electrical potentials may be applied. The conductors may be arranged in an array and may preferably be positioned near the plasma. By applying the bias voltages to the various electrically conductors, the plasma can be manipulated. For example, the conductors may extract or confine the electrons in the plasma, thereby locally adjusting the plasma density near the conductors. In the process, uniformity of the plasma density or ion concentration in the plasma may be improved. In a further embodiment, a magnetic field is included in the same direction as the electric field created by the bias voltage so as to better confine the charged particles.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: December 11, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Bon-Woong Koo
  • Patent number: 8319141
    Abstract: The present invention is a cooling block that forms an electrode for generating a plasma for use in a plasma process, and includes a channel for a cooling liquid, the cooling block comprising: a first base material and a second base material respectively made of aluminum, at least one of the first and second base materials having a recess for forming a channel for a cooling liquid; and a diffusion bonding layer, in which zinc is diffused in aluminum, and an anti-corrosion layer of a zinc oxide film, the layers being formed by interposing zinc between the first and second base materials, and by bonding the first and second base materials with zinc interposed therebetween in a heating atmosphere containing oxygen.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: November 27, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Toshifumi Ishida, Daisuke Hayashi
  • Patent number: 8308969
    Abstract: A plasma system for substrate processing comprising, a conducting electrode (b, bb) on which one or more substrates (d) can be held; a second conducting electrode (a) placed adjacent but separated from the substrate holding electrode on the side away from the side where the substrates are held; and a gas mixture distribution shower head (e) placed away from the conducting electrode on the side where the substrates are held for supplying the gas mixture (f) needed for processing the substrates in a uniform manner; such that a plasma configuration initiated and established, between the conducting electrode holding the substrates and the second conducting electrode envelops the electrode holding the substrate, is kept away from the shower head activating and distributing the gas mixture through orifices (ee) in the shower head, thereby providing the advantages of improved uniformity, yield and reliability of the process.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: November 13, 2012
    Assignee: Aixtron, SE
    Inventors: Kenneth B. K. Teo, Nalin L. Rupesinghe
  • Patent number: 8298381
    Abstract: A vacuum process for etching a metal strip running over a backing roll facing a counterelectrode by magnetron sputtering, and a vacuum chamber etching installation implementing the process. A plasma is created in a gas close to the metal strip so as to generate radicals and/or ions that act on the strip, and at least one closed magnetic circuit, the width of which is approximately equal to that of the metal strip, is selected from a series of at least two closed magnetic circuits of different and fixed widths, then the selected magnetic circuit is positioned so as to face the metal strip, and then the etching of the moving metal strip is carried out.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: October 30, 2012
    Assignee: Arcelormittal France
    Inventors: Hugues Cornil, Benoit Deweer, Claude Maboge, Jacques Mottoulle
  • Patent number: 8299390
    Abstract: A number of RF power transmission paths are defined to extend from an RF power source through a matching network, through a transmit electrode, through a plasma to a number of return electrodes. A number of tuning elements are respectively disposed within the number of RF power transmission paths. Each tuning element is defined to adjust an amount of RF power to be transmitted through the RF power transmission path within which the tuning element is disposed. A plasma density within a vicinity of a particular RF power transmission path is directly proportional to the amount of RF power transmitted through the particular RF power transmission path. Therefore, adjustment of RF power transmitted through the RF power transmission paths, as afforded by the tuning element, enables control of a plasma density profile across a substrate.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: October 30, 2012
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Felix Kozakevich, Lumin Li, Dave Trussell
  • Patent number: 8287967
    Abstract: The present invention is a processing method for applying predetermined processing to a workpiece with said workpiece mounted on a mounting stage arranged in a process chamber in a depressurized atmosphere, in which when no workpiece is mounted on the mounting stage, an inactive gas is discharged from at least a heat transfer gas supply hole of the mounting stage in the process chamber so that a gas layer is formed on a mounting surface of the mounting stage. The present invention is also a processing apparatus.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: October 16, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Hiroshi Nishikawa
  • Patent number: 8282850
    Abstract: An apparatus for controlling a plasma etching process includes plasma control structure that can vary a size of a plasma flow passage, vary a speed of plasma flowing through the plasma flow passage, vary plasma concentration flowing through the plasma flow passage, or a combination thereof.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: October 9, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih Ming Chang, Chi-Lun Lu
  • Publication number: 20120248067
    Abstract: Provided is a parallel flat-panel type plasma processing apparatus which includes a recipe storing unit storing a processing recipe for performing a plasma processing, a compensation setting unit setting an accumulation time of the plasma processing or the number of processed substrates after starting using a new second electrode and the compensation value of the set temperature of the second electrode in an input screen, and a storage unit storing the compensated set value. The plasma processing apparatus is further equipped with a program for controlling a temperature adjusting mechanism based on a set temperature after compensation by adding a set temperature of an upper electrode written in the processing recipe to the compensation value stored within the storage unit. As a result, the non-uniformity in the plasma processing between the substrates caused by the change of processing atmosphere is suppressed.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 4, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tatsuya Ogi, Wataru Ozawa, Kimihiro Fukasawa, Kazuhiro Kanaya
  • Publication number: 20120228263
    Abstract: In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; and a pulse power supply to repeatedly apply a voltage waveform including a negative voltage pulse and a positive voltage pulse of which delay time from the negative voltage pulse is 50 nano-seconds or less to the second electrode while superposing on the RF voltage.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 13, 2012
    Inventors: Akio UI, Hisataka Hayashi, Keisuke Kikutani
  • Patent number: 8241514
    Abstract: A plasma etching method includes disposing a first electrode and a second electrode to face each other; preparing a part in the processing chamber; supporting a substrate; vacuum-evacuating the processing chamber; supplying an etching gas into a processing space between the first electrode and the second electrode; generating a plasma of the etching gas in the processing space by applying a radio wave power to the first electrode or the second electrode; and etching a film to be processed on a surface of the substrate by using the plasma. Further, a DC voltage is applied to the part during the etching process, the part being disposed away from the substrate and being etched by reaction with reactant species in the plasma.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: August 14, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Honda, Hiroyuki Nakayama, Manabu Sato
  • Patent number: 8231800
    Abstract: There is provided a plasma processing apparatus including a plasma generating unit for generating a plasma in a processing chamber in which a set processing is performed on a substrate serving as an object to be processed. The plasma processing apparatus further includes a particle moving unit for electrostatically driving particles in a region above the substrate to be removed out of the region above the substrate in the processing chamber while the processing on the substrate is performed by using the plasma. In addition, there is provided a plasma processing method of a plasma processing apparatus including the steps of generating plasma in a processing chamber in which a set processing is performed on a substrate serving as an object to be processed; and performing the processing on the substrate by the plasma.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: July 31, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Moriya, Hiroyuki Nakayama
  • Patent number: 8231798
    Abstract: A tray for a dry etching apparatus includes substrate accommodation holes penetrating a thickness direction and a substrate support portion supporting an outer peripheral edge portion of a lower surface of a substrate. A dielectric plate includes a tray support surface supporting a lower surface of the tray, substrate placement portions inserted from a lower surface side of the tray into the substrate accommodation holes and having a substrate placement surface at its upper end surface. A dc voltage applying mechanism applies a dc voltage to an electrostatic attraction electrode. A heat conduction gas supply mechanism supplies a heat conduction gas between the substrate and substrate placement surface. The substrate is retained on the substrate placement surface with high degree of adhesion. Cooling efficiency of the substrate is improved and processing is uniform at the entire region of the substrate surface.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: July 31, 2012
    Assignee: Panasonic Corporation
    Inventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Ryuzou Houchin, Hiroyuki Suzuki
  • Publication number: 20120187086
    Abstract: A plasma generation system and related method for generating plasma in a cavity of a narrow tube, the system including: a first electrode including a conductive member covered with an insulator or dielectric, the first electrode being inserted into the cavity of the narrow tube to generate the plasma; a power supply to apply an alternating voltage or pulse voltage to the first electrode; and a second electrode located outside the narrow tube and connected to the power supply, the power supply applying the alternating voltage or pulse voltage between the first electrode and the second electrode, wherein the conductive member is made of a wire, a portion of the narrow tube is provided between the first electrode and the second electrode, and the second electrode is arranged and shaped so that a discharge is unevenly performed in a circumferential direction of the first electrode.
    Type: Application
    Filed: April 2, 2012
    Publication date: July 26, 2012
    Applicant: TOYO ADVANCED TECHNOLOGIES CO., LTD.
    Inventors: Takehiko SATO, Tatsuyuki Nakatani, Tatsuo Kimura
  • Patent number: 8211324
    Abstract: In a plasma processing chamber, a method for processing a substrate is provided. The substrate is disposed above a chuck and surrounded by an edge ring, which is electrically isolated from the chuck. The method includes providing first RF power to the chuck. The method also includes providing an edge ring RF voltage control arrangement, which is coupled to the edge ring to provide second RF power to the edge ring. The second RF power being delivered to the edge ring has a frequency of about 20 KHz to about 10 MHz, resulting in the edge ring having anedgering potential. The method further includes generating a plasma within the plasma processing chamber to process the substrate, the substrate being processed while the edge ring RF voltage control arrangement is configured to control the second RF power to the edge ring such that a predefined potential difference is maintained between the edge ring and the substrate.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: July 3, 2012
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Alexei Marakhtanov
  • Patent number: 8206604
    Abstract: A method for confining plasma within a plasma processing chamber while processing a substrate is provided. The method includes igniting the plasma within a plasma generating area, wherein the plasma generating area is surrounded by a set of confinement rings. The method also includes providing a chamber wall outside of the set of confinement rings. The method further includes providing a dielectric liner electrode arrangement positioned between the chamber wall and the set of confinement rings, wherein the dielectric liner electrode arrangement having an electrode encapsulated within a dielectric liner, the dielectric liner electrode arrangement being coupled with the chamber wall to create a modified chamber wall. The method yet also includes providing a parallel LC circuit arrangement, the parallel LC circuit arrangement being coupled between the dielectric liner electrode arrangement and the chamber wall.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: June 26, 2012
    Assignee: Lam Research Corporation
    Inventor: Sebastien Dine