Abstract: A composition comprising a solution of potassium monopersulfate having an active oxygen content of from about 3.4% to about 6.8% and a process for its preparation including neutralization with an alkaline material is disclosed.

Abstract: A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.

Abstract: A process is described for making contact to the buried capping layers of GMR and MTJ devices without the need to form and fill via holes. CMP is applied to the structure in three steps: (1) conventional CMP (2) a Highly Selective Slurry (HSS) is substituted for the conventional slurry to just expose the capping layer, and (3) the HSS is diluted and used to clean the surface as well as to cause a slight protrusion of the capping layers above the surrounding dielectric surface, making it easier the contact them without damaging the devices below.

Abstract: The instant invention is a method of polishing a substrate including contacting a substrate having at least one metal layer including copper with a chemical-mechanical polishing composition. The CMP composition includes an abrasive, a surfactant, an oxidizer, an organic acid including polyacrylic acid or polymethacrylic acid, a corrosion inhibitor, and a liquid carrier. A portion of the copper in the metal layer is abraded to polish the substrate. A second CMP composition contacts the abraded substrate, the second acrylate free composition including an abrasive, a surfactant, an oxidizer, and a corrosion inhibitor, and a liquid carrier. Any dendrites that may have formed on the substrate are removed through abrasion.

Abstract: A carrier head for chemical mechanical polishing of a substrate includes a base and a flexible membrane extending beneath the base. The flexible membrane includes a central portion with an outer surface providing a substrate receiving surface, a perimeter portion connecting the central portion to the base, and at least one flap extending from an inner surface of the central portion. The flap divides a volume between the flexible membrane and the base into a plurality of chambers, and the flap includes a laterally extending first section and an angled second section extending beneath the first section and connecting the laterally extending first section to the central portion.

Abstract: A metal-polishing liquid used for chemical-mechanical polishing of a conductor film of copper or a copper alloy in a process for manufacturing a semiconductor device, the metal-polishing liquid comprising: (1) an amino acid derivative represented by the formula (I); and (2) a surfactant, wherein, in the formula (I), R1 represents an alkyl group having 1 to 4 carbon atoms and R2 represents an alkylene group having 1 to 4 carbon atoms.

Abstract: The present invention provides nanoporous ?-alumina powders comprising powder comprising interconnected ?-alumina primary particles having an average particle size of less than about 100 nm and an interpenetrated array of pores or voids. The invention also provides nanosized ?-alumina powders comprising ?-alumina particles having an average particle size of less than about 100 nm and slurries, particularly aqueous slurries, which comprise nanosized ?-alumina powders of the invention. The invention further provides methods of manufacturing nanoporous ?-alumina powders and nanosized ?-alumina powders of the invention and methods of polishing using slurries of the invention.

Abstract: A polishing slurry containing a slurry dispersing particles of tetravalent metal hydroxide in a medium therein and an additive, characterized in that the additive is a polymer containing at least one kind of monomer component selected from a group of monomers represented with a general formulae (I) and (II) below (In the general formulae (I) and (II), R1 denotes hydrogen, a methyl group, a phenyl group, a benzil group, a chlorine group, a difluoromethyl group, a trifluoromethyl group or a cyano group, R2 and R3 denote hydrogen or an alkyl chain having 1 to 18 carbon atoms, a methylol group, an acetyl group or a diacetonyl group, and a case where both are hydrogen is not included. R4 denotes a morpholino group, a thiomorpholino group, a pyrrolidinyl group or a piperidino group.

Abstract: A method for manufacturing a current perpendicular to plane magnetoresistive sensor that allows for dynamic adjustment of free layer biasing to compensate for variations in thickness of an electrically insulating layer that separates the hard bias layers from the free layer. During fabrication of the sensor, the actual thickness of the insulation layers is measured. Then, to maintain a desired magnetic stabilization of the free layer one of three options can be utilized. Option one; adjust the stripe height target to maintain the desired magnetic stabilization. Option two; adjust the hard magnet thickness to maintain the desired magnetic stabilization. Option three; use a combination of option one and option two, adjusting both the stripe height target and the hard magnet thickness to maintain the desired magnetic stabilization.

Abstract: A slurry composition for polishing metal includes a polymeric polishing accelerating agent, the polymeric polishing accelerating agent including a backbone of hydrocarbon and a side substituent having at least one of a sulfonate ion (SO3?) and a sulfate ion (OSO3?), and an acidic aqueous solution.

Abstract: By providing an interlayer dielectric material with different removal rates, a desired minimum material height above gate electrode structures of sophisticated transistor devices of the 65 nm technology or 45 nm technology may be obtained. The reduced removal rate above the gate electrode may thus provide enhanced process robustness during the planarization of the interlayer dielectric layer stack prior to the formation of contact elements.

Abstract: An abrasive liquid for a metal comprising (1) an oxidizing agent for a metal, (2) a dissolving agent for an oxidized metal, (3) a first protecting film-forming agent such as an amino acid or an azole which adsorbs physically on the surface of the metal and/or forms a chemical bond, to thereby form a protecting film, (4) a second protecting film-forming agent such as polyacrylic acid, polyamido acid or a salt thereof which assists the first protecting film-forming agent in forming a protecting film and (5) water; and a method for polishing.

Abstract: Disclosed are embodiments of a method of removing patterned circuit structures from the surface of a semiconductor wafer. The method embodiments comprise blasting the surface of the semiconductor wafer with particles so as to remove substantially all of the patterned circuit structures. The blasting process is followed by one or more grinding, polishing and/or cleaning processes to remove any remaining circuit structures, to remove any lattice damage and/or to achieve a desired smoothness across the surface of the semiconductor wafer.

Abstract: During the formation of metallization layers of sophisticated semiconductor devices, the damaging of sensitive dielectric materials, such as ULK materials, may be significantly reduced during a CMP process by applying a compressive stress level. This may be accomplished, in some illustrative embodiments, by forming a compressively stressed cap layer on the ULK material, thereby suppressing the propagation of micro cracks into the ULK material.

Abstract: A heterocoagulate comprises first particles, having a particle size of at most 999 nm, on a second particle, having a particle size of at least 3 microns. The first particles comprise cerium oxide, and second particle comprises at least one member selected from the group consisting of silicon oxides, aluminum oxides and zirconium oxides.

Abstract: An apparatus and method suitable for the pre-conditioning of a polishing pad on a CMP apparatus prior to the polishing of production wafers on the apparatus. The apparatus includes a pre-conditioning arm on which is mounted an ingot of suitable material. In use, the ingot is pressed against the polishing surface of the rotating polishing pad for a selected period of time to increase the temperature of the polishing surface by friction. The pre-conditioned polishing pad facilitates uniform polishing rates of production semiconductor wafers subsequently polished on the apparatus.

Abstract: In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±40 ?m to ±100 ?m. Since with that bow device fabrication by photolithography is challenging, reducing the bow to +30 ?m to ?20 ?m is the goal. The surface deflected concavely is ground to impart to it a damaged layer that has a stretching effect, making the surface become convex. The damaged layer on the surface having become convex is removed by etching, which curtails the bow. Alternatively, the convex surface on the side opposite the surface having become convex is ground to generate a damaged layer. With the concave surface having become convex due to the damaged layer, suitably etching off the damaged layer curtails the bow.

Abstract: A slurry composition includes an acidic aqueous solution and one or both of, an amphoteric surfactant and a glycol compound. Examples of the amphoteric surfactant include a betaine compound and an amino acid compound, and examples of the amino acid compound include lysine, proline and arginine. Examples of the glycol compound include diethylene glycol, ethylene glycol and polyethylene glycol.

Abstract: A factory, an apparatus, and methods of using an in situ finishing information for finishing workpieces and semiconductor wafers are described. Changes or improvements to cost of manufacture of a workpiece using current in-process cost of manufacture information, tracked current in-process cost of manufacture information, or current cost of manufacture parameters are discussed. Appreciable changes to quality or cost of manufacture of a workpiece using tracking, using in-process tracked information, networks including a multiplicity of apparatus, and using in situ finishing information are discussed. A factory, apparatus, and methods to change or improve process control are discussed. A factory, apparatus, and methods to change or improve real-time process control are discussed. A factory, apparatus, and methods to change or improve feedforward and feedback control are discussed. The workpieces can be tracked individually or by process group such as a process batch.

Abstract: The present invention relates to a method of polishing an implantable medical device. The method may include positioning an implantable medical device on a support. At least a portion of a surface of the implantable medical device may include a polymer. A fluid may be contacted with at least a portion of the surface of the positioned implantable medical device. In an embodiment, the fluid may be capable of dissolving at least a portion of the polymer at or near the surface of the implantable medical device. The method may further include allowing the fluid to modify at least a portion of the surface of the positioned medical device. A majority of the contacted fluid may be removed from the surface of the implantable medical device. In certain embodiments, the modified portion of the surface may be substantially less thrombogenetic and substantially more mechanically stable than an unmodified surface.

Abstract: According to the substrate processing method of the invention, a jet of droplets generated from a gas and a heated processing liquid is supplied to the surface of a substrate. A resist stripping liquid to strip off the resist from the surface of the substrate is then supplied to the surface of the substrate.

Abstract: To provide a polishing composition capable of increasing polishing rate and reducing surface roughness, without causing surface defects on a surface of an object to be polished; and a polishing process for a substrate to be polished. [1] a polishing composition comprising water, an abrasive, an intermediate alumina, and a polycarboxylic acid having 4 or more carbon atoms with no OH groups or a salt thereof, wherein a content of the intermediate alumina is from 1 to 90 parts by weight, based on 100 parts by weight of the abrasive; and [2] a polishing process for a substrate to be polished, comprising polishing a substrate to be polished under conditions that a composition of a polishing liquid during polishing is the composition as defined in item [1] above.

Abstract: A wafer is produced at a step of polishing a predetermined face of a wafer to flatten the predetermined face while supplying a polishing liquid onto a bonded abrasive cloth, wherein the bonded abrasive cloth comprises a urethane bonding material consisting of a soft segment having a polyfunctional isocyanate and a hard segment having a polyfunctional polyol and having an expansion ratio of 1.1-4 times and silica having an average particle size of 0.2-10 ?m and a hydroxy group, and has a given ratio of the hard segment occupied in the urethane bonding material, a given volume ratio of silica and a given Shore D hardness.

Abstract: An apparatus for applying different amounts of pressure to different locations of a backside of a semiconductor device structure during polishing thereof. The apparatus is configured to be associated with a wafer carrier of a polishing apparatus and includes pressurization structures configured to be biased against the backside of the semiconductor device structure during polishing thereof. The pressurization structures are independently movable with respect to one another. The amount of force or pressure applied by each pressurization structure to the backside of the semiconductor device structure is controlled by at least one corresponding actuator. The actuator may magnetically facilitate movement of the corresponding pressurization structure toward or away from the backside of the semiconductor device structure. The actuator may alternatively comprise a positive or negative pressure source.

Abstract: The present invention relates to the reduction or complete prevention of Cu corrosion during a planarization or polishing process. In one aspect of the invention, RF signal is used to establish a negative bias in front of the wafer surface following polishing to eliminate Cu+ or Cu2+ migrations. In another aspect of the invention, a DC Voltage power supply is used to establish the negative bias.

Abstract: The present invention discloses a method of fabricating mirrors for LCOS (Liquid Crystal On Silicon) display device, including: forming a dielectric layer over a silicon substrate; forming a stop layer over the dielectric layer; forming an insulation layer over the stop layer; etching the insulation layer and the stop layer until the dielectric layer is exposed, thus forming an insulation fence; forming a metal layer over the dielectric layer and the insulation fence; and planarizing the metal layer and the insulation fence, hence the planarized insulation fence isolating the metal layer into mirror array. Therefore no pits can be generated in the metal layer and no pits can be generated in the mirrors formed subsequently, resulting in high quality mirror surface.

Abstract: There is provided a method of manufacturing a circuit board having a first fixed contact and a second fixed contact that extend substantially orthogonal to each other on the same surface, the life span required for the first fixed contact being longer than that required for the second fixed contact. The method includes: etching a copper foil formed on the entire surface of an insulating substrate to form the patterns of the first and second fixed contacts; polishing the surface of the insulating substrate with buff to remove an oxide film adhered to the copper foil; and sequentially forming a nickel layer having a thickness of about 1 to about 5 ?m and a gold layer having a thickness of about 0.01 to about 0.5 ?m on each of the first and second fixed contacts. In the method, the buffing direction is substantially aligned with a direction in which a first movable contact slides on the first fixed contact.

Abstract: A method for making a MEMS structure comprises patterning recesses in a dielectric layer overlying a substrate, each recess being disposed between adjacent mesas of dielectric material. A conformal layer of semiconductor material is formed overlying the recesses and mesas. The conformal layer is chemical mechanically polished to form a chemical mechanical polished surface, wherein the chemical mechanical polishing is sufficient to create dished portions of semiconductor material within the plurality of recesses. Each dished portion has a depth proximate a central portion thereof that is less than a thickness of the semiconductor material proximate an outer portion thereof. A semiconductor wafer is then bonded to the chemical mechanical polished surface. The bonded semiconductor wafer is patterned with openings according to the requirements of a desired MEMS transducer. Lastly, the MEMS transducer is released.

Abstract: The invention provides a polishing composition comprising (a) silica, (b) one or more compounds that increase the removal rate of silicon, (c) one or more tetraalkylammonium salts, and (d) water, wherein the polishing composition has a pH of about 7 to about 11. The invention further provides a method of polishing a substrate with the polishing composition.

Abstract: Disclosed herein are a chemical mechanical polishing slurry composition for chemical mechanical planarization of metal layers, which comprises a non-ionized, heat-activated nano-catalyst, and a polishing method using the same. The polishing slurry composition comprises: a non-ionized, heat-activated nano-catalyst which releases electrons and holes by energy generated in a chemical mechanical polishing process; an abrasive; and an oxidizing agent. The non-ionized heat-activated nano-catalyst and the abrasive are different from each other, and the non-ionized, heat-activated nano-catalyst is preferably a semiconductor material which releases electrons and holes at a temperature of 10 to 100° C. in an aqueous solution state, more preferably a transition metal silicide selected from the group consisting of CrSi, MnSi, CoSi, ferrosilicon (FeSi), mixtures thereof, and most preferably, a semiconductor material such as nano ferrosilicon.

Abstract: A polishing cloth used in the chemical mechanical polishing treatment comprises a molded body of (meth)acrylic copolymer having an acid value of 10 to 100 mg KOH/g and a hydroxyl group value of 50 to 150 mg KOH/g.

Abstract: Disclosed are a polishing device and polishing method for forming a wafer with high flatness using a CMP process. For the polishing of the wafer, a polishing device including a chuck section and a polishing member having a needle member is used. In the polishing, the wafer is fixed on the chuck section and then, a working fluid containing no abrasive grains is supplied to a wafer surface as well as the needle member is pressed against the wafer surface and is caused to rapidly vibrate. By doing so, the needle member tip is caused to vibrate to rub the wafer surface, thereby performing the polishing. As a result, dishings due to asperities on the wafer surface or scratches extending over a wide range are prevented from occurring, so that the wafer with high flatness can be obtained.

Abstract: A method realizes a multispacer structure including an array of spacers having same height. The method includes realizing, on a substrate, a sacrificial layer of a first material; b) realizing, on the sacrificial layer, a sequence of mask spacers obtained by SnPT, which are alternately obtained in at least two different materials; c) chemically etching one of the two different materials with selective removal of the mask spacers of this etched material and partial exposure of the sacrificial layer; d) chemically and/or anisotropically etching the first material with selective removal of the exposed portions of the sacrificial layer; e) chemically etching the other one of the two different materials with selective removal of the mask spacers of this etched material and obtainment of the multispacer structure.

Abstract: Provided is a planarizing method in which a planarization with high flatness can be performed, without being restricted by the distribution of film thickness in the applied resist film. The planarizing method comprises the steps of: forming a resist film on a film to be planarized formed on a substrate; exposing the resist film with the amounts of exposure light in respective sections into which an area in which the film to be planarized is formed is divided, the amounts of exposure light being determined so as to realize film thicknesses to be left for planarization of the resist film in the respective sections; developing the exposed resist film, to form a resist film pattern with a controlled distribution of film thickness; and etching the resist film pattern and the film to be planarized, until eliminating the thickness amounts to be eliminated of the film to be planarized.

Abstract: The invention provides a chemical-mechanical polishing composition comprising a cationic abrasive, a cationic polymer, a carboxylic acid, and water. The invention further provides a method of chemically-mechanically polishing a substrate with the aforementioned polishing composition. The polishing composition exhibits selectivity for removal of silicon nitride over removal of silicon oxide.

Abstract: A method of manufacturing thin closure magnetic read/write heads, such as magnetic tape heads is provided. The method provides improved flexural strength of the closure so that the closure breakage during fabrication of the heads is mitigated and closure thickness is reduced. An array of chips is fabricated on a wafer. The array is closed, with a closure strip bonded to each row of the array. Closures span only the length of a row, so that the closures are not subjected to flexure during processing and breakage due to flexure is mitigated. Side bars are bonded to the array to form a column with dimensions similar to prior art columns. This allows columns manufactured by the invention to undergo additional processing using existing processes.

Abstract: The polishing solution is useful for removing barrier materials in the presence of at least one nonferrous interconnect metal with limited erosion of dielectrics. The solution contains 0 to 20 weight percent oxidizer, at least 0.001 weight percent inhibitor for reducing removal rate of the nonferrous interconnect metals, 1 ppm to 4 weight percent organic-containing ammonium cationic salt formed with a quanternary ammonium structure, 1 ppm to 4 weight percent anionic surfactant, the anionic surfactant having 4 to 25 carbon atoms and the total carbon atoms in of the ammonium cationic salt plus the anionic surfactant being 6 to 40 carbon atoms, 0 to 50 weight percent abrasive and balance water; and the solution having a pH of less than 7.

Abstract: An aqueous dispersion for chemical mechanical polishing is provided, which includes water and a resin particle. The resin particles accompany with a projection having a curvature radius ranging from 10 nm to 1.65 ?m on a surface. The maximum length of the resin particles is not more than 5 ?m and is 2.5 to 25 times as large as the curvature radius.

Abstract: A method of texturing a surface of a magnetic hard disk substrate includes the steps of rotating the magnetic hard disk substrate, supplying polishing slurry on the surface of the substrate, and pressing a polishing tape on the substrate surface and running the polishing tape. The polishing slurry includes abrading particles of monocrystalline diamond that are cluster particles with corners having diameters in the range of 1-10 nm, dispersed in a dispersant such as water and a water-based aqueous solution. The cluster particles are tasseled assemblies of crystalline particles with no directionality.

Abstract: A catalyst-aided chemical processing method is a novel processing method having a high processing efficiency and suited for processing in a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: immersing a workpiece in a processing solution in which a halogen-containing molecule is dissolved, said workpiece normally being insoluble in said processing solution; and bringing a platinum, gold or ceramic solid catalyst close to or into contact with a processing surface of the workpiece, thereby processing the workpiece through dissolution in the processing solution of a halogenide produced by chemical reaction between a halogen radical generated at the surface of the catalyst and a surface atom of the workpiece.

Abstract: The invention provides a chemical-mechanical polishing system for polishing a substrate comprising (a) a polishing component selected from an abrasive, a polishing pad, or both an abrasive and a polishing pad, (b) an aqueous carrier, and (c) the halogen adduct resulting from the reaction of (1) an oxidizing agent selected from the group consisting of iodine, bromine, and a combination thereof, and (2) a carbon acid having a pKa of about 3 to about 14, wherein the halogen adduct is present in a concentration of about 0.01 mM or more in the aqueous carrier. The invention also provides a method of polishing a substrate comprising (i) providing the aforementioned chemical-mechanical polishing system, (ii) contacting the substrate with the polishing system, and (iii) abrading at least a portion of the surface of the substrate with the polishing system to polish the substrate.

Abstract: A method and apparatus for ultra thin wafer backside processing are disclosed. The apparatus includes an outer ring holding a high temperature grinding and/or dicing tape to form a support structure. An ultra thin wafer or diced wafer is adhered to the tape within the ring for wafer backside processing. The wafer backside processing includes ion implantation, annealing, etching, sputtering and evaporation while the wafer is in the support structure. Alternative uses of the support structure are also disclosed including the fabrication of dies having metalized side walls.

Abstract: Described herein are embodiments of a slurry used for the chemical mechanical polishing a substrate that includes aluminum or an aluminum alloy features having a width of less than 1 um. The slurry includes a precipitated silica abrasive having a diameter of less than or equal to 100 nm and a chelating buffer system comprising citric acid and oxalic acid to provide a pH of the slurry in the approximate range of 1.5 and 4.0.

Abstract: Provided herein are chemical mechanical polishing (CMP) slurries and methods for producing the same. Embodiments of the invention include CMP slurries that include (a) a metal oxide; (b) a quaternary ammonium base; and (c) a fluorinated surfactant. In some embodiments, the fluorinated surfactant is a non-ionic perfluoroalkyl sulfonyl compound. Also provided herein are methods of polishing a polycrystalline silicon surface, including providing a slurry composition according to an embodiment of the invention to a polycrystalline silicon surface and performing a CMP process to polish the polycrystalline silicon surface.

Abstract: The disclosure is directed to a processing fluid including an aliphatic hydrocarbon component having an average chain length of 8 to 16 carbons and about 0.0001 wt % to about 50.0 wt % of a Lewis active component.

Abstract: In some embodiments, the present invention is directed to methods that involve the combination of step-and-flash imprint lithography (SFIL) with a multi-tier template to simultaneously pattern multiple levels of, for example, an integrated circuit device. In such embodiments, the imprinted material generally does not serve or act as a simple etch mask or photoresist, but rather serves as the insulation between levels and lines, i.e., as a functional dielectric material. After imprinting and a multiple step curing process, the imprinted pattern is filled with metal, as in dual damascene processing. Typically, the two printed levels will comprise a “via level,” which is used to make electrical contact with the previously patterned under-level, and a “wiring level.” The present invention provides for the direct patterning of functional materials, which represents a significant departure from the traditional approach to microelectronics manufacturing.

Abstract: A method of producing a glass substrate for a mask blank has the steps of measuring a convex/concave profile of a surface of the glass substrate, controlling a flatness of the surface of the glass substrate to a value not greater than a predetermined reference value by specifying the degree of convexity of a convex portion present on the surface of the glass substrate with reference to a result of measurement obtained in the profile measuring step and executing local machining upon the convex portion under a machining condition depending upon the degree of convexity, and polishing, after the flatness control step, the surface of the glass substrate subjected to the local machining. The surface of the glass substrate subjected to the local machining is subjected to acid treatment after the flatness control step and before the polishing step.

Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.

Abstract: A method for forming a template useful for nanoimprint lithography comprises forming at least one pillar which provides a topographic feature extending from a template base. At least one conformal pattern layer and one conformal spacing layer, and generally a plurality of alternating pattern layers and spacing layers, are formed over the template base and pillar. A planarized filler layer is formed over the pattern and spacing layers, then the filler, the spacing layer and the pattern layer are partially removed, for example using mechanical polishing, to expose the pillar. One or more etches are performed to remove at least a portion of the pillar, the filler, and the spacing layer to result in the pattern layer protruding from the spacing layer and providing the template pattern.

Abstract: A catalyst-aided chemical processing method can process hard-to-process materials, especially SiC, GaN, etc. whose importance as electronic device materials is increasing these days, with high processing efficiency and high precision even for a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: putting a workpiece in a processing liquid in which halogen-containing molecules are dissolved; and moving the workpiece and a catalyst composed of molybdenum or a molybdenum compound relative to each other while keeping the catalyst in contact with or close proximity to a surface to be processed of the workpiece, thereby processing the surface of the workpiece.