Semiconductor-type Nonmetallic Material Patents (Class 228/123.1)
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Patent number: 9161485Abstract: The system contains a lamination press. The first cavity is formed in a chassis. A film assembly is fitted within the chassis. A buffer mounts over the film assembly and within the chassis. A tool set is shaped to fit within the first cavity. The tool set and chassis are positioned within the lamination press to confer heat and pressure from the lamination press to the film assembly and chassis.Type: GrantFiled: December 9, 2013Date of Patent: October 13, 2015Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: John W. Lahood, Edward M. Hardy
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Patent number: 9126384Abstract: A bonded body 10 includes a plate-shaped alumina or aluminum nitride ceramic member 12 and a Mo or Ti terminal 14 having a Ni coating, a Au coating, or a Ni—Au coating (Au on Ni) and joined to a recess 12a in the ceramic member 12 with a joint layer 16 therebetween. The joint layer 16 contains Au, Ge, Ag, Cu, and Ti and is in contact with at least part of the side surfaces (herein the entire side surfaces) and the bottom surface of the recess 12a. Ti is rich in the joint interface between the joint layer 16 and the ceramic member 12. The percentage (porosity) of the sum of the cross-sectional areas of pores to the cross-sectional area of the joint layer 16 in a cross-section taken across the thickness of the bonded body 10 is 0.1% to 15%.Type: GrantFiled: November 4, 2013Date of Patent: September 8, 2015Assignee: NGK Insulators, Ltd.Inventors: Tomoyuki Minami, Tetsuya Kawajiri
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Patent number: 9093447Abstract: The present disclosure provides a bonding apparatus. The bonding apparatus includes a cleaning module designed for cleaning chips; and a chip-to-wafer bonding chamber configured to receive the chips from the cleaning module and designed for bonding the chips to a wafer.Type: GrantFiled: February 14, 2013Date of Patent: July 28, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Jui-Pin Hung, Weng-Jin Wu, Jean Wang, Wen-Chih Chiou
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Patent number: 9027821Abstract: A process of assembly by direct bonding of a first and second element, each having a surface including copper portions separated by a dielectric material, the process includes: polishing the surfaces such that the surfaces to be assembled allow assembly by bonding; forming a diffusion barrier selectively in copper portions of the first and second elements, wherein the surface of the diffusion barrier of the first and second elements is level with the surface, to within less than 5 nanometers; and bringing the two surfaces into contact, such that the copper portions of one surface cover at least partly the copper portions of the other surface, and such that direct bonding is obtained between the surfaces.Type: GrantFiled: July 21, 2011Date of Patent: May 12, 2015Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Lea Di Cioccio, Pierric Gueguen
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Patent number: 9027822Abstract: An adhesive layer forming step of forming an adhesive layer on a surface of a substrate; a solder layer forming step of forming a solder layer on the adhesive layer by loading plural solder powders with in-between spaces; and a filler supplying step of supplying fillers to the in-between spaces of the solder powders that have been formed on the adhesive layer are included.Type: GrantFiled: August 25, 2011Date of Patent: May 12, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventor: Daisuke Sakurai
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Patent number: 9010616Abstract: A method is provided for the forming of a metallic solder joint without a liquid flux to create a solder joint that has minimal voids and can be reflowed multiple times without void propagation. This process can be done for any solder alloy, and is most specifically used in the application of first level thermal interface in a IC or micro processor or BGA microprocessor.Type: GrantFiled: May 30, 2012Date of Patent: April 21, 2015Assignee: Indium CorporationInventors: Jordan Peter Ross, Amanda M. Hartnett
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Patent number: 8991681Abstract: A die bonder and a bonding method are disclosed which make it possible to provide high-quality products, particularly even if a die is rotated through predetermined degrees relative to an already-bonded die and then laminated. In the die bonder and bonding method in which a die is picked up from a wafer by a pick-up head which then places the die on an alignment stage, and the die is picked up from the alignment stage by a bonding head which then bond the die onto a substrate or an already-bonded die, a posture of the die is rotated through predetermined degrees on a plane parallel to a plane on which the bonding is performed, before the bonding head picks up the die from the alignment stage.Type: GrantFiled: March 6, 2012Date of Patent: March 31, 2015Assignee: Hitachi High-Tech Instuments Co., Ltd.Inventors: Hiroshi Maki, Masayuki Mochizuki, Yukio Tani, Takehito Mochizuki
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Patent number: 8939347Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages.Type: GrantFiled: April 28, 2010Date of Patent: January 27, 2015Assignee: Intel CorporationInventors: Rajasekaran Swaminathan, Ravindranath V. Mahajan
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Patent number: 8887980Abstract: When electrodes of a BGA plated by electroless Ni plating are soldered with solder balls of a lead-free solder, peeling of soldered joints readily takes place under an external impact. When a BGA electrode plated by electroless Ni plating is soldered with a lead-free solder to which 0.03-0.1 mass percent of P is added, the growth of brittle SnNi intermetallic compounds formed on the portion being soldered and a P layer on the electroless Ni plating surface is suppressed, resulting in an increased bonding strength.Type: GrantFiled: June 10, 2005Date of Patent: November 18, 2014Assignee: Senju Metal Industry Co., Ltd.Inventors: Ryoichi Kurata, Daisuke Soma, Hiroshi Okada
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Patent number: 8832933Abstract: A testing probe card for wafer level testing semiconductor IC packaged devices. The card includes a circuit board including testing circuitry and a testing probe head. The probe head includes a probe array having a plurality of metallic testing probes attached to a substrate including a plurality of conductive vias. In one embodiment, the probes have a relatively rigid construction and have one end that may be electrically coupled to the vias using a flip chip assembly solder reflow process. In one embodiment, the probes may be formed from a monolithic block of conductive material using reverse wire electric discharge machining.Type: GrantFiled: September 15, 2011Date of Patent: September 16, 2014Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yung-Hsin Kuo, Wensen Hung, Po-Shi Yao
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Patent number: 8820612Abstract: Solder bumps of uniform height are provided on a substrate through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned layer of photoresist. Solder is injected over the pillars or BLM, filling the channels. The solder, which does not contain flux, is allowed to solidify. It forms a plurality of solder structures (bumps) of equal heights. Solder injection and solidification are preferably carried out in a nitrogen environment or a forming gas environment. Molten solder can be injected in channels formed in round wafers without spillage using a carrier assembly that accommodates such wafers and a fill head.Type: GrantFiled: June 18, 2012Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Claudius Feger, Mark H. McLeod, Jae-Woong Nah, Eric D. Perfecto
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Patent number: 8820611Abstract: The present invention relates to a method for printing a substrate, in particular a printed circuit board, with a printing paste, in particular a solder paste, comprising the following steps: —applying a printing screen to the substrate, —printing the substrate using screen printing technology through openings in the printing screen so as to achieve at least one printed structure consisting of printing paste, —separating the printing screen and the substrate by lifting these parts off from one another, —inserting an optical inspection unit between the printing screen and the substrate, —checking the printed structure in terms of the printing paste thickness thereof by means of the inspection unit, —ending the printing when the result of the printing corresponds to at least one preset value. The invention furthermore relates to an inspection unit (1) and a printing device (2).Type: GrantFiled: October 12, 2010Date of Patent: September 2, 2014Assignee: Ekra Automatisierungssysteme GmbHInventor: Torsten Vegelahn
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Patent number: 8794501Abstract: A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.Type: GrantFiled: February 13, 2012Date of Patent: August 5, 2014Assignee: LuxVue Technology CorporationInventors: Andreas Bibl, John A. Higginson, Hung-Fai Stephen Law, Hsin-Hua Hu
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Patent number: 8794499Abstract: In a method for manufacturing a substrate, connections are provided through metal columns of bumps press-fitted into an insulating resin layer between metal foils contact-bonded to a thermosetting insulating resin layer. Bumps of a conductive paste containing metal fillers are formed on a metal foil which is to be contact-bonded to an insulating resin layer, the bumps are heated to bound the metal fillers to each other, and form a metallic bond between the bumps and the metal foil, the metal columns are press-fitted into the insulating resin layer to contact-bond the metal foil to the insulating resin layer, and join the tips of the metal columns to a metal foil, the metal columns are then reheated to form a metallic bond between the metal columns and the metal foil.Type: GrantFiled: November 29, 2011Date of Patent: August 5, 2014Assignee: Murata Manufacturing Co., Ltd.Inventor: Yasuyuki Sekimoto
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Patent number: 8794498Abstract: In a method for producing an electronic component device, a heat bonding step is performed in a state in which low melting point metal layers including low melting point metals including, for example, Sn as the main component, are arranged to sandwich, in the thickness direction, a high melting point metal layer including a high melting point metal including, for example, Cu as the main component, which is the same or substantially the same as high melting point metals defining first and second conductor films to be bonded. In order to generate an intermetallic compound of the high melting point metal and the low melting point metal, the distance in which the high melting point metal is to be diffused in each of the low melting point metal layers is reduced. Thus, the time required for the diffusion is reduced, and the time required for the bonding is reduced.Type: GrantFiled: July 13, 2011Date of Patent: August 5, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Yuji Kimura, Hiroki Horiguchi
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Patent number: 8789744Abstract: Reflow solderable, surface mount LED optic mounting devices are provided. Embodiments that include turnings (e.g., made on a swiss turning machine) and stampings (e.g., made with a progressive die) are provided. The LED optic mounting devices are suitably positioned by the same pick-and-place machine that is used to mount LED on planar surface with circuitry and solder pads and are attached to the solder pads by soldering.Type: GrantFiled: October 16, 2011Date of Patent: July 29, 2014Inventor: Philip Premysler
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Patent number: 8752754Abstract: Disclosed are an apparatus for adhering solder powder to finely adhere the solder powder to an electronic circuit board and a method for adhering solder powder to the electronic circuit board.Type: GrantFiled: January 18, 2011Date of Patent: June 17, 2014Assignee: Showa Denko K.K.Inventors: Takashi Shoji, Takekazu Sakai
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Publication number: 20130247979Abstract: The invention relates to an electrical conductor (2) having a longitudinal axis (A) parallel to the rolling direction of a conductor wire, comprising copper material and an attachment surface (7) configured for attaching to a receiving surface of a silicon wafer (3) to establish an electrical connection. The copper material has a purity of at least 99.5% wherein the grains have a cubic texture comprising a set of cubic axes directed within an up to 20 degree angular range to the longitudinal axis (A), and whereby at least 65% of the grains have said cubic texture. The invention also relates to a process for manufacturing conductor (2) and photo voltaic modules comprising said conductor (2), and silicon wafers.Type: ApplicationFiled: November 30, 2010Publication date: September 26, 2013Applicant: LUVATA ESPOO OYInventors: Tag Hammam, Bevis Hutchinson, Lena Ryde
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Patent number: 8499998Abstract: A core layer has on its front surface a pair of connecting electrodes forming a wiring pattern and a resist formed between the pair of electrodes; an electronic component having a pair of connecting terminals; a solder part joining between electrodes and connecting terminals; and a sealing resin part filling a gap between the bottom surface of the electronic component and the front surface of the core layer and covering the resist and the solder part, to prevent a defect of a component built-in printed circuit substrate.Type: GrantFiled: October 9, 2009Date of Patent: August 6, 2013Assignee: Panasonic CorporationInventors: Yoshiyuki Wada, Tadahiko Sakai
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Patent number: 8496159Abstract: Solder bumps of uniform height are provided on a substrate through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned layer of photoresist. Solder is injected over the pillars or BLM, filling the channels. The solder, which does not contain flux, is allowed to solidify. It forms a plurality of solder structures (bumps) of equal heights. Solder injection and solidification are preferably carried out in a nitrogen environment or a forming gas environment. Molten solder can be injected in channels formed in round wafers without spillage using a carrier assembly that accommodates such wafers and a fill head.Type: GrantFiled: June 6, 2011Date of Patent: July 30, 2013Assignee: International Business Machines CorporationInventors: Claudius Feger, Mark H. McLeod, Jae-Woong Nah, Eric D. Perfecto
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Patent number: 8492242Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.Type: GrantFiled: May 25, 2010Date of Patent: July 23, 2013Assignee: Micron Technology, Inc.Inventors: Owen Fay, Xiao Li, Josh Woodland, Shijian Luo, Jaspreet Gandhi, Te-Sung Wu
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Patent number: 8485417Abstract: A micromachined switch is provided including a base substrate, a bond pad on the base substrate, a cantilever arm connected to the bond pad, the cantilever arm having a conductive via from the bond pad, a first actuation electrode on the base substrate, and a second actuation electrode on the cantilever arm connected to the bond pad by way of the conductive via, positioned such that an actuation voltage applied between the first actuation electrode and the second actuation electrode will deform the cantilever arm, wherein the first actuation electrode is facing a side of the cantilever arm opposite the second actuation electrode.Type: GrantFiled: May 11, 2012Date of Patent: July 16, 2013Assignee: HRL Laboratories, LLCInventors: David T. Chang, Tsung-Yuan Hsu
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Patent number: 8485416Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.Type: GrantFiled: January 5, 2012Date of Patent: July 16, 2013Assignee: Silex Microsystems ABInventors: Thorbjorn Ebefors, Edward Kalvesten, Niklas Svedin, Anders Eriksson
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Patent number: 8448838Abstract: A solder ball loading method capable of securely loading solder balls on connection pads includes applying flux on each connection pad group of a printed wiring board flux is not applied to a contact portion between a spacer and the printed wiring board to keep the flux from attaching to the spacer. Because the flux is not attached to the spacer, when the mask is detached from the printed wiring board, the printed wiring board need not be inverted, and damage to the solder resist layer 70 is minimized. Further, the heights of the solder balls and the upper surface of the mask are made equal by using the spacer, making it possible to securely load the solder balls on the electrode pads, one solder ball for each connection pad, and to reduce a probability that solder balls are not loaded or that a plurality of the solder balls are loaded onto a single connection pad.Type: GrantFiled: December 9, 2011Date of Patent: May 28, 2013Assignee: Ibiden Co., Ltd.Inventors: Shigeki Sawa, Katsuhiko Tanno, Osamu Kimura, Koji Kuribayashi
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Patent number: 8439251Abstract: To permanently apply lead terminals to corresponding electrodes of electronic or electro-optic components, a. providing a frame including a tensioned wire, b. providing a holding jig including at least one seat in which the components can be removably and temporarily retained, c. applying the components to the seats with the respective electrodes aligned along a respective longitudinal direction, d. applying the holding jig to the frame and orienting the same so that the longitudinal direction corresponds to the direction of the tensioned wire, the tensioned wire being thereby brought substantially in contact with (all) the electrode(s) aligned to each other on a corresponding row of components, e. electrically and mechanically bonding the tensioned wire to the corresponding electrodes, and f. cutting the wire to separate the components from each other thereby forming a respective lead terminal for each electrode.Type: GrantFiled: December 13, 2011Date of Patent: May 14, 2013Assignee: Google Inc.Inventor: Giovanni Delrosso
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Patent number: 8333315Abstract: A method for connecting a conducting wire to an electric heating film is provided. The method includes: first, opening a groove on an electric heating film carrier; then, placing one end of a connecting wire in the groove; afterwards, pouring a conductive adhesive into the groove; and finally, heating the electric heating film carrier, so that the electric heating film carrier is just melted and the connecting wire and the conductive adhesive are merged into a whole; and cooling the electric heating film carrier, and solidifying the conductive adhesive. The electric heating film carrier is made of various dielectric materials such as glass, ceramics, enamel, mica, quartz, and microcrystalline glass. Two sides of the electric heating film carrier are coated with layered electrodes, and the layered electrodes are connected in series to the electric heating film. The groove is disposed in the middle of the layered electrode, and the groove is an annular groove. The connecting wire is a pure silver wire.Type: GrantFiled: March 3, 2010Date of Patent: December 18, 2012Inventor: Riliang Luo
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Patent number: 8240545Abstract: Methods for minimizing component shift during soldering are described. One such method includes forming a pedestal pad having a preselected shape on a substrate, forming at least one intervening layer on the substrate, the at least one intervening layer including a layer including a solidifying accelerant, and a layer including a solder, the solder layer having a preselected shape about the same as the preselected shape of the pedestal pad, positioning the component on the at least one intervening layer, and heating the solder to a predetermined process temperature, wherein the pedestal pad is configured to remain a solid during the heating the solder to the predetermined process temperature, and wherein the solidifying accelerant is configured to accelerate a solidification of the solder after the heating the solder to the predetermined process temperature.Type: GrantFiled: August 11, 2011Date of Patent: August 14, 2012Assignee: Western Digital (Fremont), LLCInventors: Lei Wang, Jih-Chiou Hser
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Patent number: 8177878Abstract: A bonding material including a meltable joining material and a plurality of heterostructures distributed throughout the meltable joining material, the heterostructures comprising at least a first material and a second material capable of conducting a self-sustaining exothermic reaction upon initiation by an external energy to generate heat sufficient to melt the meltable joining material.Type: GrantFiled: November 30, 2009Date of Patent: May 15, 2012Assignee: Infineon Technologies AGInventors: Alexander Heinrich, Thorsten Scharf, Edmund Riedl, Steffan Jordan
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Patent number: 8167192Abstract: Disclosed herein is a manufacturing method for a ceramic heater. The manufacturing method includes the step of manufacturing a sintered ceramic substrate using a ceramic material and forming a conductive through hole in the ceramic substrate, the step of screen printing low temperature firing paste on the ceramic substrate, thus forming a heating wire, the step of screen printing Ag paste on the through hole, thus forming an electrode, the step of joining, using heat and pressure, a green sheet to a surface of the ceramic substrate on which the heating wire is formed, the step of firing the joined ceramic substrate and green sheet at low temperature, thus manufacturing a substrate body, and the step of brazing the lead wire to the electrode of the substrate body using filler metal while the lead wire is exposed to atmosphere.Type: GrantFiled: June 21, 2011Date of Patent: May 1, 2012Assignee: GHD Korea, Inc.Inventor: Hae Jin Kim
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Patent number: 8157157Abstract: A solder ball loading method capable of securely loading solder balls on connection pads includes applying flux on each connection pad group of a printed wiring board flux is not applied to a contact portion between a spacer and the printed wiring board to keep the flux from attaching to the spacer. Because the flux is not attached to the spacer, when the mask is detached from the printed wiring board, the printed wiring board need not be inverted, and damage to the solder resist layer 70 is minimized. Further, the heights of the solder balls and the upper surface of the mask are made equal by using the spacer, making it possible to securely load the solder balls on the electrode pads, one solder ball for each connection pad, and to reduce a probability that solder balls are not loaded or that a plurality of the solder balls are loaded onto a single connection pad.Type: GrantFiled: January 7, 2009Date of Patent: April 17, 2012Assignee: IBIDEN Co., Ltd.Inventors: Shigeki Sawa, Katsuhiko Tanno, Osamu Kimura, Koji Kuribayashi
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Publication number: 20120045869Abstract: A low thermal conductivity material layer covers a peripheral portion of the bottom surface of the conductive plate of a chip bonder head. The center portion of the conductive plate is exposed or covered with another conductive plate laterally surrounded by the low thermal conductivity material layer. During bonding, the chip bonder head holds a first substrate upside down and heats the first substrate through the conductive plate. Heating of a fillet, i.e., the laterally extruding portion, of a pre-applied underfill material is reduced because the temperature at the exposed surfaces of the low thermal conductivity material layer is lower than the temperature at the bottom surface of the conductive plate. The longer curing time and the more uniform shape of the fillet in the bonded structure enhance the structural reliability of the bonded substrates.Type: ApplicationFiled: August 23, 2010Publication date: February 23, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael A. Gaynes, Jae-Woong Nah
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Patent number: 8096463Abstract: To permanently apply lead terminals to corresponding electrodes of electronic or electro-optic components, the following steps are carried out: a. providing a frame including at least one tensioned wire, b. providing a holding jig including at least one seat in which a respective one of the components can be removably and temporarily retained, c. applying the components to the seats with the respective electrodes aligned along a respective longitudinal direction; in this way a row of aligned components is obtained, each component having a corresponding electrode aligned to the subsequent one in the row, d. applying the holding jig to the frame and orienting the same so that the longitudinal direction corresponds to the direction of the tensioned wire, the tensioned wire being thereby brought substantially in contact with (all) the electrode(s) aligned to each other on a corresponding row of components, e.Type: GrantFiled: December 29, 2004Date of Patent: January 17, 2012Assignee: MOSAID Technologies IncorporatedInventor: Giovanni Delrosso
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Patent number: 8069561Abstract: A method for manufacturing a metal-ceramic substrate with at least one metallization, patterned by etching, on at least one surface side of a laminar ceramic material. The metal-ceramic substrate includes a base substrate made of an aluminum-nitride or silicon-nitride ceramic. The metallization is applied by active soldering before patterning. An intermediate layer made of an oxidic ceramic is provided between the at least one metallization and the base substrate.Type: GrantFiled: August 22, 2006Date of Patent: December 6, 2011Assignee: Curamik Electronics GmbHInventor: Jürgen Schulz-Harder
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Publication number: 20110127314Abstract: A bonding material including a meltable joining material and a plurality of heterostructures distributed throughout the meltable joining material, the heterostructures comprising at least a first material and a second material capable of conducting a self-sustaining exothermic reaction upon initiation by an external energy to generate heat sufficient to melt the meltable joining material.Type: ApplicationFiled: November 30, 2009Publication date: June 2, 2011Applicant: INFINEON TECHNOLOGIES AGInventors: Alexander Heinrich, Thorsten Scharf, Edmund Riedl, Steffan Jordan
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Patent number: 7935430Abstract: A bonding structure and method of manufacturing the same are provided. The bonding structure of a substrate and a component include an electrode formed of metal powder and a resin component on the substrate. A low melting point solder that bonds the component to the electrode. The metal powder contains at least spherical metal powder and flake metal powder. The low melting point solder is infiltrated from the surface of the electrode into the electrode.Type: GrantFiled: October 26, 2006Date of Patent: May 3, 2011Assignee: Alps Electric Co., Ltd.Inventors: Hiroki Suzuki, Masato Uehara
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Publication number: 20110079631Abstract: A method of joining at least two parts includes steps of dispersing a joining material comprising a multi-phase nanocrystalline magnetic metal-aluminum powder at an interface between the at least two parts to be joined and applying an alternating magnetic field (AMF). The AMF has a magnetic field strength and frequency suitable for inducing magnetic hysteresis losses in the metal-aluminum powder and is applied for a period that raises temperature of the metal-aluminum powder to an exothermic transformation temperature. At the exothermic transformation temperature, the metal-aluminum powder melts and resolidifies as a metal aluminide solid having a non-magnetic configuration.Type: ApplicationFiled: May 19, 2009Publication date: April 7, 2011Applicant: The Trustees of Dartmouth CollegeInventor: Ian Baker
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Patent number: 7900808Abstract: A soldering system includes a circuit board having first soldering terminals, a soldering object having second soldering terminals, soldering blocks disposed between the circuit board and the soldering object for electrically interconnecting the first soldering terminals and the second soldering terminals respectively, and a supporting structure supporting the soldering object and having a height that determines the height of the solder blocks. A related soldering method is also provided.Type: GrantFiled: April 3, 2009Date of Patent: March 8, 2011Assignee: Chimei Innolux CorporationInventors: Po-Shan Huang, Jia-Shyong Cheng
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Patent number: 7861914Abstract: A method is provided for the production of a bond between a first element having at least one first metal coating and at least one further element having a second metal coating, the at least one further element being freely moveable in a medium and the at least one first metal coating of the first element and the second metal coating of the at least one further element being in a solid state, a liquid phase being formed upon contact of the at least one first metal coating with the second metal coating.Type: GrantFiled: October 7, 2009Date of Patent: January 4, 2011Assignee: Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V.Inventor: Hans-Hermann Oppermann
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Patent number: 7816999Abstract: MEMS switches of varying configurations provide individually acutatable contacts. The MEMS switches are sealed by an improved anodic bonding technique.Type: GrantFiled: April 12, 2005Date of Patent: October 19, 2010Assignee: Siverta, Inc.Inventors: Gary Joseph Pashby, Timothy G. Slater, Glenn Gottlieb
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Patent number: 7753253Abstract: A dispensing device (4) for charging underfill agent into a gap between a substrate (K) and a chip (C) includes means for storing underfill agent (66, 67), a chamber (52) provided for containing substrate (K) to be charged with underfill agent and capable of being opened/closed, a dispenser (73) provided in the chamber (52) and discharging underfill agent introduced from the storing means (66, 67) into the gap between the substrate (K) and the chip (C), and a first pressure reducing means (46) for reducing the pressure in the chamber (52) at a predetermined vacuum pressure prior to the discharge of underfill agent by the dispenser (73). The dispensing device (4) can supply underfill agent with no bubbles to the substrate (K). A mounting system using this dispensing device (4) is also provided by the invention.Type: GrantFiled: November 9, 2006Date of Patent: July 13, 2010Assignee: Toray Engineering Co., Ltd.Inventors: Katsumi Terada, Takashi Takei
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Patent number: 7750462Abstract: Improved microelectromechanical systems (MEMS), processes and apparatus using thermocompression bonding are disclosed. For example, process embodiments are disclosed in which wafer-scale as well as die-scale thermocompression bonding is utilized to encapsulate MEMS and/or to provide electrical interconnections with MEMS. Apparatus embodiments include apparatus for performing thermocompression bonding and bonded hybrid structures manufactured in accordance with the process embodiments. Devices having various substrate bonding and/or sealing configurations variously offer the advantage of reduced size, higher manufacturing yields, reduced costs, improved reliability, improved compatibility with existing semiconductor manufacturing process and/or greater versatility of applications.Type: GrantFiled: October 30, 2007Date of Patent: July 6, 2010Assignee: Microassembly Technologies, Inc.Inventors: Michael Bennett Cohn, Joseph T. Kung
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Patent number: 7735718Abstract: A brazing product for fluxless brazing comprises a substrate and a filler metal-forming composition applied to the substrate. The substrate preferably comprises aluminum, an aluminum alloy or another metal and may include at least one layer of a ceramic, carbide or nitride. The filler metal-forming composition comprises a liquid-forming layer comprising silicon and a braze-promoting layer comprising one or more metals selected from the group comprising nickel, cobalt, palladium and iron. The liquid-forming layer comprises one or more material layers. Where the liquid-forming layer comprises a plurality of layers, it may include at least one layer consisting essentially of silicon.Type: GrantFiled: December 2, 2009Date of Patent: June 15, 2010Assignee: Dana Canada CorporationInventors: Michael E. Graham, Richard A. Hoffman, Margaret Anna Hoffman, legal representative, Brian E. Cheadle, Kostas F. Dockus, Stefanija Kisielius, legal representative, Robert H. Krueger
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Patent number: 7724791Abstract: A laser diode package according to the present invention is composed of CTE mismatched components soldered together. The laser diode package includes a laser diode bar, at least one heat sink, and at least one exothermic layer. Solder layers are adjacent the heat sink(s) and laser diode bar, respectively. The exothermic layer(s) are positioned between the solder layers. The exothermic layer(s) are exposed to an energy source which causes an exothermic reaction to propagate through the exothermic layer thereby melting the solder layers and solder layers. The exothermic layer(s) may be designed to provide sufficient heat to melt the solder layers and solder layers but provide only minimal heat to the laser diode bar and heat sink(s). Several packages can be stacked together to form a laser diode array.Type: GrantFiled: January 18, 2008Date of Patent: May 25, 2010Assignee: Northrop Grumman Systems CorporationInventor: Edward F. Stephens, IV
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Patent number: 7719108Abstract: A method of packaging a semiconductor component with a printed wiring board is disclosed. The method includes determining a first distance, applying a thin film onto a surface of the semiconductor component such that the thin film is spaced apart from a support of the semiconductor, applying a solder pad onto the printed wiring board, placing the semiconductor component with the thin film onto the printed wiring board, and positioning the thin film adjacent the solder pad.Type: GrantFiled: January 10, 2005Date of Patent: May 18, 2010Assignee: Lockheed Martin CorporationInventors: William E. Murphy, Ryan S. Riegle, Richard Shields, David L. Vos
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Patent number: 7674651Abstract: A method for mounting a semiconductor part on a circuit substrate is provided, which includes preparing the semiconductor part having a surface thereof provided with a plurality of stud-bumps, preparing a solder substrate having a surface thereof on which solid-solders corresponding to respective ones of the plurality of stud-bumps are arranged, preparing the circuit substrate having a surface thereof provided with connecting pads corresponding to respective ones of the plurality of stud-bumps, attaching the corresponding solid-solders on the solder substrate to respective tip ends of the plurality of stud bumps, separating the solid-solders attached to the tip ends of the stud-bumps from the solder substrate, contacting the solid-solder attached to respective ones of the tip ends of the stud-bumps with the corresponding connecting pads, and heating the solid-solders contacted with the corresponding connecting pads thereby establishing solder connection between respective ones of the stud-bumps and the corresType: GrantFiled: September 6, 2007Date of Patent: March 9, 2010Assignee: International Business Machines CorporationInventors: Yukifumi Oyama, Hidetoshi Nishiwaki, Toshihiko Nishio, Kazushige Toriyama, Yasumitsu Orii
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Publication number: 20100025849Abstract: A semiconductor package and a method for constructing the package are disclosed. The package includes a substrate and a die attached thereto. A first contact region is disposed on the substrate and a second contact region is disposed on the die. The first contact region, for example, comprises copper coated with an OSP material. A copper wire bond electrically couples the first and second contact regions. Wire bonding includes forming a ball bump on the first contact region having a flat top surface. Providing the flat top surface is achieved with a smoothing process. A ball bond is formed on the second contact region, followed by stitching the wire onto the flat top surface of the ball bump on the first contact region.Type: ApplicationFiled: June 22, 2009Publication date: February 4, 2010Applicant: UNITED TEST AND ASSEMBLY CENTER LTD.Inventors: Yong Chuan KOH, Jimmy SIAT, Jeffrey Nantes SALAMAT, Lope Vallespin PEPITO, JR., Ronaldo Cayetano CALDERON, Rodel MANALAC, Pang Hup ONG, Kian Teng ENG
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Patent number: 7635077Abstract: A method of forming a sensor for sensing a physical property of a media. A substrate is provided having circuitry thereon including at least one electrical contact and a die is provided having disposed thereon corresponding electrical contacts and a sensing element for sensing a physical property of a media applied to said sensing element. One or more bonding ring or portions are arranged on the die. The die electrical contact(s) and bonding ring(s) can be bonded substantially simultaneously, with conductive bonding material, to the corresponding substrate electrical contact(s) and a surface of said substrate, respectively, to thereby form a sensor. The bonding ring(s) form a pressure seal. The substrate can include corresponding bonding ring(s). The die can include an ASIC for compensating temperature effects on said pressure sensor.Type: GrantFiled: September 27, 2005Date of Patent: December 22, 2009Assignee: Honeywell International Inc.Inventor: Paul C. Schubert
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Publication number: 20090310318Abstract: A technique for attaching components to PCBs involves providing a lead-free component and a PCB. The lead-free component has a package and lead-free component contacts, and the PCB has PCB contacts. The technique further involves disposing (e.g., printing) solder paste between the lead-free component contacts of the lead-free component and the PCB contacts of the PCB. The solder paste includes lead (Pb), a second metal (e.g., tin (Sn) and a third metal (e.g., Bismusth (Bi)). The technique further involves applying heat to melt the solder paste and form solder joints between the package of the lead-free component and the PCB contacts of the PCB. Such a technique is capable of concurrently mounting lead-free components as well as lead-based components to a PCB under lead-based assembly conditions (e.g., a temperature environment which does not exceed 230 degrees Celsius).Type: ApplicationFiled: June 16, 2008Publication date: December 17, 2009Applicant: Cisco Technology, Inc.Inventor: Mudasir Ahmad
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Publication number: 20090236404Abstract: [PROBLEMS] To provide a pasty silver particle composition, which, upon heating, allows silver particles to be easily sintered to form solid silver possessing excellent strength, electric conductivity and thermal conductivity, and a production process of solid silver and the like. [MEANS FOR SOLVING PROBLEMS] A pasty silver particle composition comprising nonspherical silver particles having an average particle diameter of 0.1 to 18 ?m and a carbon content of not more than 1.0% by weight and a volatile dispersion medium, wherein, upon heating, the volatile dispersion medium is volatilized and the nonspherical silver particles are sintered to one another to form solid silver.Type: ApplicationFiled: September 20, 2006Publication date: September 24, 2009Applicant: NIHON HANDA CO., LTD.Inventors: Kimio Yamakawa, Katsutoshi Mine
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Patent number: 7556189Abstract: Nano-structured interconnect formation and a reworkable bonding process using solder films. Large area fabrication of nano-structured interconnects is demonstrated at a very fine pitch. This technology can be used for pushing the limits of current flip chip bonding in terms of pitch, number of I/Os, superior combination of electrical and mechanical properties as well as reworkability. Sol-gel and electroless processes were developed to demonstrate film bonding interfaces between metallic pads and nano interconnects. Solution-derived nano-solder technology is an attractive low-cost method for several applications such as MEMS hermetic packaging, compliant interconnect bonding and bump-less nano-interconnects.Type: GrantFiled: May 26, 2005Date of Patent: July 7, 2009Assignee: Georgia Tech Research CorporationInventors: Ankur Aggarwal, Isaac Robin Abothu, Pulugurtha Markondeya Raj, Rao R. Tummala