Abstract: The new CCD output region provides a method of reducing the width of a wide CCD at its output to maintain a high sensitivity output node without sacrificing charge-transfer efficiency. A barrier region is shaped so the "channel width" of the CCD increases towards the input edge of the output gate. The barrier region, therefore, decreases in width towards the output end of the final CCD phase of a multi-phase device. Also, the channel width under the output gate decreases towards its output end in the direction of charge transfer towards the floating diffusion, or detection node. Since the "shaped" portion of the barrier region under the last CCD phase can be formed by the same process steps as the regular-shaped barrier regions, it is possible to form this structure without the requirement for additional masking and implant steps. The advantages of this structure over the prior art are improved charge-transfer characteristics without requiring additional process steps.

Abstract: A thin film field effect transistor (1) is formed by an insulating substrate (2,3) carrying a semiconductor layer (4) having a polycrystalline channel region (5) which is passivated to reduce the density of charge carrier traps. Source and drain electrodes (6 and 7) contact opposite ends (5a,5b) of the channel region (5), and a gate electrode (8) is provided at one major surface (4a) of the semiconductor layer (4) for controlling a conduction channel of one conductivity type in the polycrystalline channel region (5) to provide a gateable connection between the source and drain electrodes (6 and 7). An area (50) of the polycrystalline channel region (5) spaced from the electrodes (6,7,8) of the transistor (1) and lying adjacent to the other major surface (4b) of the semiconductor layer (4) is doped with impurities of the opposite conductivity type for suppressing formation of a conduction channel of the one conductivity type adjacent to the other major surface (4b).

Abstract: In charge coupled imaging devices, a major portion of the photosensitive surface area is covered by electrodes with which the charge storage and the charge transport in the semiconductor body are controlled. These electrodes are preferably made of polycrystalline silicon. This material, however, like other conductive materials known per se, has a comparatively high absorption coefficient, in particular in the short-wave portion of the visible spectrum (blue), which adversely affects the sensitivity. According to the invention, the electrodes are manufactured partly from a very thin poly layer, preferably not thicker than 50 nm, and partly from a less transparent but higher conductivity layer, for example, poly of much greater thickness.

Abstract: It is known to reduce the leakage current or dark current in charge-coupled devices with buried channels such as, for example, charge-coupled imaging devices by bringing the surface to the inverted state. In such a device, however, it is not possible to empty the channel completely locally in usual manner in that the charge is drained off through the substrate by means of a voltage pulse applied to the gates (charge reset). To be able to carry out charge reset nevertheless, the voltage pulse is applied between the substrate and the intermediate zone interposed between the substrate and the CCD channel. Since this voltage pulse is active over the entire range of the device, the device also prevents charge from being removed in locations where this is not desired when the pulse is applied.

Abstract: A charge coupled device including a first electrode consisting of a first region and a second region having lower resistance than the first region, and a second electrode consisting of a first region and a second region having lower resistance than this first region. The first region of the first electrode is adjacent to the first region of the second region at an interval of an insulating film. Capable of utilizing the force of electrical field, the device is superior in charge transfer efficiency as well as charge transfer velocity. It also has the capability to improve the performances of high picture quality solid state image sensing devices and time delay devices, which both necessitate a charge coupled device and operate at high frequencies. Additionally, a solid state image sensing device employing this device is not degraded in a dark state by generating a few pulse charges.

Abstract: It is known to bring the surface into the inverted state in CCD imaging devices with buried channels during the integration period in order to keep the dark current low (All Gates Pinning). The desired potential profile, with wells in which the charge is integrated bounded by potential beers, is obtained through the use of a two-phase structure with a doping profile in the channel or with a gate oxide having thickness differences. Owing to limiting conditions which hold for the clock voltages used for charge transport, serious limitations are imposed on the depth of the potential wells and thus also on the charge storage capacity of the pixels. This disadvantage is counteracted by the operation of the device not as a two-phase but, for example, as a four-phase CCD according to the invention, whereby a d.c. shift is present between the clock voltages for compensating the built-in, comparatively great potential differences described above.

Abstract: A CCD imager includes at least one four-phase vertical shift register having first, second, third and fourth transfer electrodes. In order to prevent nonuniform distribution of smear charge and other unwanted charge, and improve the quality of a picture, there is further provided a means for making the potential well under each first electrode deeper than the potential wells under the second, third and fourth electrodes. Preferably, a N-type semiconductor region is formed under each first electrode by ion implantation.

Abstract: A charge coupled device according to the present invention, having an output terminal, for detecting an electric charge and for outputting a detection signal corresponding to the electric charge from the output terminal, comprises a semiconductor substrate having a main surface, further having a first, second and third regions in the main surface, both the first and second regions defining the third region therebetween, a charge supply formed in the vicinity of the first region, for supplying the electric charge to the first region, a first impurity formed in the first region, for transferring the electric charge to the third region, a floating gate electrode overlying the third region, coupled to the output terminal, for detecting the electric charge and outputting the detection signal corresponding to the electric charge from the output terminal in a first condition, for transferring the electric charge to the second region in a second condition, a transfer electrode overlying the second region, applied a c

Abstract: In a charge transfer image pick-up device including vertical registers and a horizontal register, impurity density of a well layer of the vertical registers is higher than that of a well layer of the horizontal register and a buried layer formed in the well layer of the vertical registers is composed of a first buried layer which is connected to a buried layer of the well layer of the horizontal register and a second buried layer formed on the first buried layer and having impurity density higher than that of the first buried layer, so that degradation of transfer efficiency of signal charge can be avoided and the manufacturing process can be simplified.

Abstract: The present invention relates to a charge transfer device having high transfer efficiency without leaving over signal charges, a charge transfer device substantially shortened in the gate length so as to enhance the transfer speed, and a method of manufacturing and a method of driving such device. In the charge transfer device of the invention, the n.sup.- diffusion layer is formed on the semiconductor substrate. In the surface region of the n.sup.- diffusion layer, a plurality of n diffusion layers are formed at equal intervals. The interval of the adjacent n diffusion layers is about 5 to 10 .mu.m. On the n.sup.- diffusion layer, an insulation film is formed. On the insulation film, transfer electrodes having two different shapes are formed. The transfer electrodes of these two types are alternately arranged. These transfer electrodes differ in length. The length of the longer transfer electrodes is about twice the length of the shorter transfer electrodes.

Abstract: A CCD image sensor of an interlaced scanning type comprising a plurality of uniformly spaced photodetectors arranged in series in vertical and horizontal directions, a plurality of VCCD regions arranged between sets of said photodetectors arranged in the vertical directions, a plurality of channel stop regions for electrically isolating said plurality of photodetectors from one another, a plurality of gate electrodes formed on said VCCD regions, each of said plurality of gate electrodes being connected simultaneously to transfer gate electrodes of adjacent ones of said plurality of photodetectors on odd and even horizontal lines, a plurality of barrier layers, each formed at a portion of each of said VCCD regions corresponding to a boundary with each of said gate electrodes on said VCCD regions, for forming a desired potential barrier, and a HCCD region formed under said plurality of VCCD regions, for transferring signal charges from said VCCD regions to an output stage.

Abstract: A CCD shift register which is improved in the transfer efficiency with a minimal decrease in the amount of electric charge that can be handled. The CCD shift register has an array of transfer electrodes, each comprising a pair of storage and transfer gate electrodes, which are formed on a semiconductor substrate through a gate insulator. A semiconductor region under each storage gate electrode is divided into a plurality of subregions by using impurities.

Abstract: A solid imaging device that minimizes the degradation in charge transfer efficiency attributable to narrow channel effect by enlarging the apparent width of the horizontal output gate outlet. Miniaturization of the floating diffusion (FD) region is not hampered despite the apparent widening of the horizontal output gate outlet. The inventive imaging device utilizes a floating diffusion amplifier as the charge detector that detects a charge signal transferred from a horizontal CCD. In this device structure, ions are implanted into the substrate surface side of the region adjacent to the FD region in the horizontal output gate in such a manner that the channel potential of the adjacent region will become appropriately deeper than that of the forward-half region next to the adjacent region.

Abstract: In a charge transfer device having pairs of a first transfer electrode and a second transfer electrode on a semiconductor substrate, the ends of the second transfer electrode overlap the ends of the adjacent first transfer electrodes through an insulating film. A first region implanted with a first conductivity type is formed in the substrate, and a second region implanted with a second and different conductivity type is formed in the first region. The first region is disposed so that its upper stream end is positioned under a substantially medium portion of the first transfer electrode, and that the lower stream end of the first region is positioned under the upper stream end of the first transfer electrode of the succeeding electrode pair.

Abstract: A virtual phase image sensor has majority carriers supplied to a virtual gate 24 by a conductor 32 overlying the image sensor, the virtual gate 24 and the conductor 32 each in contact with a conductive channel stop region 30.

Abstract: A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.

Abstract: The present invention is to provide a CCD delay line in which a deterioration of a charge transfer efficiency can be reduced by maintaining a charge amount treated in a charge transfer section provided at the rear stage of an intermediate output section. According to an aspect of the present invention, in a charge transfer device having charge transfer sections of a plurality of stages consisting of electrode pairs of a transfer gate electrode and a storage gate electrode and at least one intermediate output section provided at the rear stage of a charge transfer section of a predetermined stage from the signal input side, a cross-sectional area of at least one of the transfer gate electrode and the storage gate electrode in the charge transfer section provided at the rear stage of the intermediate output section is selected to be larger than that in the charge transfer section provided at the front stage of the intermediate output section.

Abstract: A charge coupled device (CCD) has a charge storage region and a potential barrier region. The CCD includes a first layer made of a first conductivity type semiconductor, a second layer made of a second conductivity type semiconductor and provided on the first layer, where the first and second conductivity types are mutually opposite types selected from n-type and p-type semiconductors, a third layer made of a first conductivity type semiconductor, impurity diffusion regions provided in at least a surface part of the third layer and having an impurity density higher than that of the third layer, a first gate electrode provided on the third layer between two mutually adjacent impurity diffusion regions, and a second gate electrode provided on each impurity diffusion region of the third layer. The impurity diffusion region forms the charge storage region of the CCD and the third layer between the two mutually adjacent impurity diffusion regions forms the potential barrier region of the CCD.

Abstract: In a charge transfer device, a low impurity density region is provided in its portion forming a floating capacitor. It becomes possible thereby to reduce the capacitance of the floating capacitor and thus to ensure a larger output voltage relative to a signal charge.

Abstract: An air manifold mounted adjacent to a circuit board for directing air jets onto electronic devices mounted on the circuit board. The air manifold has an air inlet and a plurality of outlet nozzles positioned along the channel for directing air onto the electronic devices. A plurality of members are positioned next to the nozzles with the members increasing in length as the distance between the inlet and the outlets increase.