Abstract: A method for forming an integrated circuit structure is provided. The method includes forming a gate dielectric layer over a semiconductor substrate; depositing a first gate electrode layer over the gate dielectric layer; etching the first gate electrode layer to form a gate electrode over the gate dielectric layer; forming a drift region in the semiconductor substrate; depositing a dielectric layer over the gate dielectric layer and the gate electrode, in which the dielectric layer has a first portion alongside a first sidewall of the gate electrode; depositing a second gate electrode layer over the dielectric layer; etching the second gate electrode layer to form a field plate electrode alongside the first portion of the dielectric layer; and forming source/drain features in the semiconductor substrate.

Abstract: An image sensor comprising: a plurality of photoelectric conversion portions that convert light incident on a first surface of a semiconductor substrate into charge; a plurality of circuit portions, controlled from a second surface that is an opposite surface of the first surface of the semiconductor substrate, for transferring the charge converted by the photoelectric conversion portions; and first separation portions that separate the photoelectric conversion portions and the circuit portions for transferring the charge converted by the photoelectric conversion portions. At least part of the first separation portions are formed such that the area of the first surface is larger than the area of the second surface of at least part of the respective photoelectric conversion portions.

Abstract: An active matrix substrate includes a first TFT and a second TFT, in which the first TFT includes a first oxide semiconductor layer and a first gate electrode arranged on a part of the first oxide semiconductor layer with a first gate insulating layer interposed therebetween, the first gate insulating layer has a layered structure including a first insulating film and a second insulating film arranged on the first insulating film, the second TFT includes a second oxide semiconductor layer having a higher mobility than the first oxide semiconductor layer and a second gate electrode arranged on a part of the second oxide semiconductor layer with a second gate insulating layer interposed therebetween, and the second gate insulating layer includes the second insulating film and does not include the first insulating film, and the second TFT further includes a lower insulating layer including the first insulating film arranged between the second oxide semiconductor layer and a substrate.

Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.

Abstract: Disclosed herein is a method, comprising: exposing an image sensor to a scene; measuring, as analog signals, intensities of light from the scene by a plurality of pixels of the image sensor; converting the analog signals to digital signals; and determining a total intensity of light of the scene by calculating a sum of the digital signals.

Abstract: A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.

Abstract: A detector includes a first detection layer (1141) and a second detector layer (1142). The first and second detection layers include a first and second scintillator (204, 7041) (216, 7042), a first and second active photosensing region (210, 7081) (220, 7082), a first portion (206, 7261) of a first substrate (208, 7061), and a second portion (218, 7262) of a second substrate (208, 7062). An imaging system (100) includes a radiation source (110), a radiation sensitive detector array (108) comprising a plurality of multi-layer detectors (112), and a reconstructor (118) configured to reconstruct an output of the detector array and produces an image. The detector array includes a first detection layer and a second detector layer with a first and second scintillator, a first and second active photosensing region, a first portion of a first substrate, and a second portion of a second substrate.

Abstract: The present technology relates to a solid-state image capturing apparatus and an electronic device that can acquire a normal image and a narrow band image at the same time. The solid-state image capturing apparatus includes a plurality of substrates laminated in two or more layers, and two or more substrates of the plurality of substrates have pixels that perform photoelectric conversion. At least one substrate of the substrates having the pixels is a visible light sensor that receives visible light, and at least another substrate of the substrates having the pixels is a narrow band light sensor that includes narrow band filters being optical filters permeating light in a narrow wavelength band, and receives narrow band light in the narrow band.

Abstract: The disclosure discloses a touch display panel and a touch display device. The touch display panel includes a cathode and a number of touch electrodes, wherein an interior of at least one touch electrode is hollowed out to reduce a relative area between the cathode and the touch electrode. The relative area between the touch electrode and the cathode of the touch display panel may be reduced by hollowing out the interior of at least one touch electrode, thereby reducing the inductive capacitance between the touch electrode and the cathode.

Abstract: The present disclosure relates to the use of X-ray detector cassettes that may be abutted or overlapped to form a detector assembly suitable for imaging objects that are too large to image using a single X-ray detector cassette. Such a detector assembly may be customized in terms of the size and/or shape of the field-of-view (FOV). In certain embodiments the radiation-sensitive electronics (e.g., readout electronics) are positioned to the side of the X-ray detecting components (e.g., scintillator, TFT array, and so forth), allowing the cassette to be thin relative to other detector devices and allowing the electronics to remain outside the X-ray beam path.

Abstract: The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity.

Abstract: An imaging element of the present disclosure includes: a photoelectric conversion section 21 provided in a substrate 30; a polarizer 50 formed over the photoelectric conversion section 21, with a single ground insulating layer 31 interposed therebetween; and a light shielding section 41A formed on an upper side of a peripheral region 21? around the photoelectric conversion section 21.

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.

Abstract: An imaging array and a pixel sensor are disclosed. One of the pixel sensors in the imaging array includes a photodiode having a cathode connected to an electron storage node and an anode connected to a hole storage node. An overflow path connects the electron storage node via an overflow gate that allows electrons to leak off of the electron storage node into the overflow path if the electron storage node has a potential less than a leakage potential. A floating diffusion node is connected to the electron storage node by a transfer gate and the overflow path by an overflow path gate. A hole storage node reset gate connects the hole storage node to ground. A hole storage capacitor is connected between the hole storage node and ground, and an overflow path coupling capacitor connects the hole storage node to the overflow path.

Abstract: An electronic device module may include: a board; a ground electrode disposed on a first surface of the board; a sealing portion disposed on the first surface of the board; electronic devices mounted on the first surface of the board such that at least one of the electronic devices is embedded in the sealing portion; a first shielding wall connected to the ground electrode and disposed along a side surface of the sealing portion; and a shielding layer formed of a conductive material and disposed along a surface formed by the sealing portion and the first shielding wall.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a photodetector disposed in a semiconductor substrate. A floating diffusion node is disposed in the semiconductor substrate and is above the photodetector. A transfer gate electrode overlies the photodetector. The transfer gate electrode has a top conductive body overlying a top surface of the semiconductor substrate and a bottom conductive body extending from the top conductive body to below the floating diffusion node. A portion of the top conductive body directly overlies the floating diffusion node. A first sidewall of the top conductive body directly overlies the bottom conductive body.

Abstract: A non-volatile memory structure can include a substrate extending horizontally and a filling insulating pattern extending vertically from the substrate. A plurality of active channel patterns can extend vertically from the substrate in a zig-zag pattern around a perimeter of the filling insulating pattern, where each of the active channel patterns having a respective non-circular shaped horizontal cross-section. A vertical stack of a plurality of gate lines can each extend horizontally around the filling insulating pattern and the plurality of active channel patterns.

Abstract: This disclosure relates to a solid-state imaging element, an electronic device, and a fabrication method that each enable further reduction of the element layout area. A photoelectric conversion element disposed on a first face of a semiconductor substrate is connected to a gate of an amplification transistor and a floating diffusion disposed in a second face of the semiconductor substrate through penetrating electrodes that are each connected to the photoelectric conversion element. In this pixel structure, a dielectric layer is disposed between the penetrating electrodes in the second face, and a shielded electrode is disposed on an inner side of the dielectric layer seen from a side of the second face. The dielectric layer is thicker than a gate insulating film of the transistor on the side of the second face. This disclosure is applicable to a back-side illumination solid-state imaging element, for example.

Abstract: An imaging device according to one aspect of the present disclosure includes: a semiconductor substrate; and pixels. Each of the pixels includes: a photoelectric converter that converts incident light into electric charge; a diffusion region provided in the semiconductor substrate and electrically connected to the photoelectric converter; a first transistor including a gate, and the diffusion region as one of a source and a drain; and a plug that is directly connected to the diffusion region, is electrically connected to the photoelectric converter, and includes a semiconductor. The height of the plug and the height of the gate from the surface of the semiconductor substrate are equal to each other.

Abstract: A solid-state imaging device according to the present disclosure includes: a semiconductor base; a photoelectric conversion element provided in the semiconductor base; a photoelectric conversion film arranged on a light receiving surface side of the semiconductor base; a contact section to which a signal charge generated in the photoelectric conversion film is read, the contact section being provided in the semiconductor base; a first film member covering the photoelectric conversion element; and a second film member provided on the contact section.

Abstract: A non-volatile memory structure can include a substrate extending horizontally and a filling insulating pattern extending vertically from the substrate. A plurality of active channel patterns can extend vertically from the substrate in a zig-zag pattern around a perimeter of the filling insulating pattern, where each of the active channel patterns having a respective non-circular shaped horizontal cross-section. A vertical stack of a plurality of gate lines can each extend horizontally around the filling insulating pattern and the plurality of active channel patterns.

Abstract: An OLED display substrate, a manufacturing method thereof, and a display device are provided. The OLED display substrate includes a reflective cathode layer, an organic light-emitting layer, a transparent anode layer and a high reflection layer sequentially arranged on a substrate, and the high reflection layer has reflectivity greater than a threshold.

Abstract: Disclosed herein is a method, comprising: exposing an image sensor to a scene; measuring, as analog signals, intensities of light from the scene by a plurality of pixels of the image sensor; converting the analog signals to digital signals; and determining a total intensity of light of the scene by calculating a sum of the digital signals.

Abstract: Memory devices, memory cell strings and methods of operating memory devices are shown. Configurations described include directly coupling an elongated body region to a source line. Configurations and methods shown should provide a reliable bias to a body region for memory operations such as erasing.

Abstract: A method of fabricating a semiconductor structure includes forming an alignment mark layer on a substrate; patterning the alignment mark layer for forming at least one alignment mark feature; forming a bottom conductive layer on the patterned alignment mark layer in a substantially conformal manner; forming an insulator layer on the bottom conductive layer; and forming a top conductive layer on the insulator layer.

Abstract: A capacitive sensor includes a base material provided with a pattern of a light-transmissive conductive film. The light-transmissive conductive film contains metal nanowires. The pattern includes a detection pattern of a plurality of detection electrodes arranged with intervals, a plurality of lead-out wirings linearly extending in a first direction from corresponding ones of the detection electrodes, and a resistance-setting section connected to at least any one of the lead-out wirings and including a portion extending in a direction not parallel to the first direction.

Abstract: This technology relates to an imaging apparatus and an electronic device structured to perform pupil correction appropriately. There are provided a photoelectric conversion film configured to absorb light of a predetermined color component to generate signal charges, a first lower electrode configured to be formed under the photoelectric conversion film, a second lower electrode configured to be connected with the first lower electrode, a via configured to connect the first lower electrode with the second lower electrode, and a photodiode configured to be formed under the second lower electrode and to generate signal charges reflecting the amount of incident light. A first distance between the center of the photodiode and the center of the via at the center of the angle of view is different from a second distance therebetween at an edge of the angle of view. The present technology can be applied to imaging apparatuses.

Abstract: An imaging device includes a wiring connected to an output node of an amplification transistor, and the wiring is provided at a position between an output line electrically connected to the output node of the amplification transistor and a gate of the amplification transistor.

Abstract: A method for fabricating an image sensor is provided. In the method, at first, a semiconductor substrate having a top portion and a bottom portion is provided. Then, a light-sensitive element is formed in the bottom portion of the semiconductor substrate. Thereafter, the top portion of the semiconductor substrate is etched to form a post structure on the bottom portion of the semiconductor substrate. Thereafter, a gate dielectric layer and a conductive layer are sequentially formed to cover the bottom portion of the semiconductor substrate and the post structure. Then, the gate dielectric layer and the conductive layer are etched to form a vertical gate structure on the light-sensitive element.

Abstract: A detector array such as for use in a radiation imaging modality is provided. The detector array includes a first pixel (302a) having a first scintillator (402). The first scintillator has a first detection surface (408) and a first light emission surface (412). The first detection surface extends along a first detection surface plane and the first light emission surface extends along a first light emission surface plane. The detector array includes a second pixel (302b) having a second scintillator (420). The second scintillator has a second detection surface (426) and a second light emission surface (430). The second detection surface extends along a second detection surface plane and the second light emission surface extends along a second light emission surface plane. At least one of the first detection surface plane is not coplanar with the second detection surface plane or the first light emission surface plane is not coplanar with the second light emission surface plane.

Abstract: Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.

Abstract: An image sensor includes a plurality of nanoantennas that satisfy sub-wavelength conditions. Each of the nanoantennas includes a diode and a transistor. Each diode is either a PN diode or a PIN diode.

Abstract: An image sensor includes a transfer gate including a gate buried portion extending into a semiconductor substrate from a surface of the semiconductor substrate, a plurality of photoelectric conversion parts that are disposed in the semiconductor substrate on a side of the gate buried portion and vertically overlap each other, and a plurality of floating diffusion parts that are apart from and vertically overlap each other in the semiconductor substrate on other side of the gate buried portion, wherein at least one of the floating diffusion parts is positioned at a height of at least one of corresponding photoelectric conversion parts.

Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.

Abstract: The present invention provides an array substrate and a manufacturing method thereof. The method includes covering a reduction metal layer on an oxide semiconductor layer film and simultaneously forming a source pattern, a drain pattern, a pixel electrode pattern, and an oxide semiconductor layer through patterning the oxide semiconductor layer film and the reduction metal layer with one mask-based operation, followed by reducing the source pattern, the drain pattern, and the pixel electrode pattern to conductors through laser annealing to simultaneously form a source electrode, a drain electrode, and a pixel electrode. The entire manufacturing process needs, at most, only three rounds of mask-based operations so that, compared to the prior art, the number of mask-based operations required can be effectively reduced, the manufacturing operation can be simplified, and the performance of a TFT can be improved and an aperture ratio of the array substrate can be increased.

Abstract: In a first substrate of a liquid crystal device, among wiring lines extending to a non-display area interposed between a display area and an outer edge of a seal material, common potential lines are provided to interpose an interlayer insulating film between pixel electrodes. In contrast, the wiring lines which supply potentials different from common potentials is provided so as to interpose interlayer insulating films between the pixel electrodes. In the common potential lines, second wiring line sections extend so as to surround an entire circumference of the display area in the non-display area.

Abstract: An electric micro-switch has at least one electric contact. The contact has a profiled section. The profiled section has a longitudinal extension, a bent portion formed in the longitudinal extension and having an outer surface that is, at least in section, formed in a rounded manner. A contact region is defined on the outer surface of the bent portion. A method for manufacturing the micro-switch is also disclosed.

Abstract: A detector of ionizing radiation, e.g. x-ray radiation, allowing for the creation of a continuous digital image of a scanned object. The detection surface is formed by a mosaic of detector segments arranged in a matrix and consisted of a sensor layer arranged on a chip reader with the formation of tiers to engage an adjacent detector segment. The sensor layer is active over its entire area, and the matrix is provided with a means for positioning the detector segments to define their mutual lateral clearance less than the size of one pixel. The positioning means preferably comprises a carrier of rows. The resulting detection surface is active over its entire area and allows for the direct creation of continuous digital image without dead zones.

Abstract: A first photoelectric conversion unit is arranged in one end portion of a pixel, and a second photoelectric conversion unit is arranged in the other end portion of the pixel. A third photoelectric conversion unit is arranged in a center portion of the pixel. A length of the third photoelectric conversion unit in a predetermined direction is shorter than a length of the first photoelectric conversion unit and the second photoelectric conversion unit.

Abstract: Some embodiments relate to an integrated circuit (IC) disposed on a silicon substrate, which includes a well region having a first conductivity type. A dielectric layer is arranged over an upper surface of the silicon substrate, and extends over outer edges of the well region and includes an opening that leaves an inner portion of the well region exposed. An epitaxial pillar of SiGe or Ge extends upward from the inner portion of the well region. The epitaxial pillar includes a lower epitaxial region having the first conductivity type and an upper epitaxial region having a second conductivity type, which is opposite the first conductivity type. A dielectric sidewall structure surrounds the epitaxial pillar and has a bottom surface that rests on an upper surface of the dielectric layer.

Abstract: An image device. While holding electric charges generated at a photoelectric conversion portion in a first period, a first charge holding portion holds electric charges generated at the photoelectric conversion portion in a second period which is a period that does not succeed the first period and which is different in length from the first period, and a second charge holding portion holds electric charges generated at the photoelectric conversion portion in a third period which is a period that does not overlap the first period and the second period.

Abstract: The imaging device includes a multiple-property lens that includes a first area having a first property and a second area having a second property different from the first property, an image sensor in which a first light receiving element 25A having a first microlens and a second light receiving element 25B having a second microlens having a different focusing degree from the first microlens are two-dimensionally arranged, and a crosstalk removal processing unit that removes a crosstalk component from each of a first crosstalk image acquired from the first light receiving element 25A of the image sensor and a second crosstalk image acquired from the second light receiving element to generate a first image and a second image respectively having the first property and the second property of the multiple-property lens.

Abstract: According to one embodiment, an optical sensor includes a first substrate, a first insulating film and a light-shielding film. The first substrate has a light detecting region detecting fluorescence generated from a fluorescent material by light with which irradiation is performed from a lateral side. The first insulating film is provided on the first substrate. The light-shielding film is provided, at least, on a side surface of the first substrate to which the light enters, on a side surface of the first insulating film and above a region excluding a region corresponding to the light detecting region of the first insulating film.

Abstract: The imaging device includes a multiple-property lens that includes a first area having a first property and a second area having a second property different from the first property, an image sensor in which a first light receiving element 25A and a second light receiving element 25B having a different opening size of a light receiving section from the first light receiving element 25A are two-dimensionally arranged, and a crosstalk removal processing unit that removes a crosstalk component from each of a first crosstalk image acquired from the first light receiving element 25A of the image sensor and a second crosstalk image acquired from the second light receiving element to generate a first image and a second image respectively having the first property and the second property of the multiple-property lens.

Abstract: A method for manufacturing a flexible organic light emitting display is disclosed. The method is: sequentially forming a first buffer layer, a switch array layer, a display unit layer, and a thin film package layer on a flexible underlay substrate. When the flexible organic light emitting display bends along the flexible underlay substrate, a first bending deformation force is generated. The first buffer layer is used to absorb the first bending deformation force, and the material of the first buffer layer is an organic insulating material.

Abstract: An optical sensor includes a semiconductor substrate having a first conductive type. The optical sensor further includes a photodiode disposed on the semiconductor substrate and a metal layer. The photodiode includes a first semiconductor layer having the first conductive type and a second semiconductor layer, formed on the first semiconductor layer, including a plurality of cathodes having a second conductive type. The first semiconductor layer is configured to collect photocurrent upon reception of incident light. The cathodes are configured to be electrically connected to the first semiconductor layer and the second semiconductor layer is configured to, based on the collected photocurrent, to track the incident light.

Abstract: The present disclosure relates to semiconductor devices with gate-controlled energy filtering. One example embodiment includes a semiconductor device. The semiconductor device includes a first electrode, a second electrode, and a channel therebetween. The semiconductor device also includes a first interference structure located in the channel. Further, the semiconductor device includes a first gate for controlling a voltage over the first interference structure. The first interference structure is formed to induce a local mini-band structure that can be shifted by the voltage controlled by the first gate, such that the first local mini-band structure is: (1) aligned with a band structure in the semiconductor device to turn the semiconductor device on; and (2) misaligned with the band structure in the semiconductor device to turn the semiconductor device off.

Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.

Abstract: An image sensor includes a pixel array including first to fourth pixels having an R, G, and B Bayer pattern. An analog-to-digital converter (ADC) block converts a pixel signal of each of the first to fourth pixels into a digital pixel signal. At least one among the first to fourth pixels includes two photo diodes separated in a first direction, and at least one other of the first to fourth pixels includes two photo diodes separated in a second direction which is different from the first direction.

Abstract: Disclosed is a light emitting device including a substrate, a light emitting structure arranged on the substrate, the light emitting structure including a first semiconductor layer, a second semiconductor layer and an active layer arranged between the first semiconductor layer and the second semiconductor layer, a first electrode electrically connected to the first semiconductor layer, and a second electrode electrically connected to the second semiconductor layer, wherein the light emitting structure has a top surface including a first side and a second side which face each other, and a third side and a fourth side which face each other.