Abstract: A touch panel includes a first electrode plate and a second electrode plate connected to the first electrode plated. The first electrode plate includes a first substrate, and a first conductive layer disposed on the first substrate. The second electrode includes a second substrate, and a second conductive layer disposed on the second substrate. The first or the second conductive layer includes at least one carbon nanotube composite layer.

Abstract: Image sensor arrays may include bulk-charge-modulated-device (BCMD) sensor pixels. The BCMD sensor pixels may be used in back-side-illuminated (BSI) image sensors. A BCMD sensor pixel need not include a dedicated addressing transistor. The BCMD sensor pixel may include a gated drain reset (GDR) structure that is used to perform reset operations. The GDR structure may be shared among multiple pixels, which provides increased charge storage capacity for high resolution image sensors. A negative back body bias may be applied to the BCMD pixel array, allowing the depletion region under each BCMD pixel to extend all the way to the back silicon surface. Extending the depletion region by negatively biasing the back silicon surface may serve to minimize pixel crosstalk.

Abstract: It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect to visible light; a first adhesive layer over the substrate; an insulating film containing nitrogen and silicon over the first adhesive layer; a light-emitting element including a first electrode, a second electrode facing the first electrode, and an EL layer between the first electrode and the second electrode; a second adhesive layer over the second electrode; and a metal substrate over the second adhesive layer, wherein the thickness of the metal substrate is 10 ?m to 200 ?m inclusive. Further, an electronic device using the flexible light-emitting device is provided.

Abstract: An electrical device includes a charge carrier transport layer formed using a ternary semiconducting compound having a stoichiometry of 1:1:1 and an element combination selected from the set of I-II-V, I-III-IV, II-II-IV, and I-I-VI; or having a stoichiometry of 3:1:2 and an element combination selected from the set of I-III-V; or having a stoichiometry of 2:1:1 and an element combination selected from the set of I-II-IV. In some embodiments, the charge carrier transport layer is used as the radiation absorption layer for a photovoltaic cell, or a light emitting layer of a light emitting device. Other devices, such as laser diode, a photodetection device, an optical modulator, a transparent electrode and a window layer, can also be formed using the ternary semiconducting compound as the charge carrier transport.

Abstract: A basic device for an image sensor includes a photodiode consisting of a doped area having a first type of conductivity and formed at the surface of a semiconductor substrate having a second type of conductivity, adapted to be biased at a first reference voltage, wherein the photodiode is combined with a device for the transfer, multiplication and insulation of charges, the photodiode being a fully depleted one and including, at the surface of the doped area having a first type of conductivity, a strongly doped region having the second type of conductivity and adapted to be biased at a second reference voltage.

Abstract: A basic device for an image sensor includes a photogeneration and charge-collecting region formed at the surface of a semiconductor substrate having a first type of conductivity, adapted to be biased at a reference voltage, the photogeneration region being associated with a device for the transfer, multiplication, and insulation of charges. The photogeneration region has an insulated gate mounted thereon, which is adapted to be alternately biased at a first voltage and at a second voltage, the insulated gate being made of a low-absorption material.

Abstract: The invention relates to an operating method for a semiconductor structure (1), particularly for a detecting element, in a semiconductor detector, particularly in a blocked impurity band detector, comprising the following steps: a) generating free signal charge carriers (2) in the semiconductor detector by impinging radiation, b) collecting the radiation-generated signal charge carriers (2) in a storage area (IG) in the semiconductor structure (1), wherein the storage area (IG) forms a potential well in which the signal charge carriers (2) are captured, c) deleting the signal charge carriers (2) collected in the storage area (IG) in IG that the signal charge carriers (2) are removed from the storage area (IG), d) generating an electric tunnel field in the area of the storage area (IG), so that the signal charge carriers (2) present in the storage area (IG) can tunnel out of the potential well of the storage area (IG) using the tunnel effect, into a conduction band in which the signal charge carriers (2) are f

Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.

Abstract: A solid-state imaging device includes: a photoelectric converting section comprising a photo-diode; a charge storage section; a charge transfer section; a first control gate section provided between the photoelectric converting section and the charge storage section to control transfer of a signal charge from the photoelectric converting section to the charge storage section; and a second control gate section provided between the charge storage section and the charge transfer section to control transfer of the signal charge from the charge storage section to the charge transfer section. The charge storage section includes: a first region formed on a side near to the first control gate section; and a second region formed on a side near to the second control gate section and configured to have a channel potential increased more than that of the first region. The second region is configured to hold the signal charge in a pinning condition.

Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.

Abstract: A MOS-type solid-state image pickup device, on a semiconductor substrate, includes a photoelectric conversion unit having a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, and a transfer MOS transistor having a gate electrode disposed on an insulation film and transferring a charge carrier from a fourth semiconductor region. In addition, an amplifying MOS transistor having a gate electrode is connected to the fourth semiconductor region, and a fifth semiconductor region of the second conductivity type is continuously disposed to the second semiconductor region and under the gate electrode, and is disposed apart from the insulation film under the gate electrode of the transfer MOS transistor.

Abstract: A structure which meets a high-quality reading requirement and realizes high-speed color reading when the reading section of a color image forming apparatus adopts a color contact image sensor using CCDs as reading element arrays is disclosed. The image sensor of a color image reading section uses a color contact image sensor in which a plurality of CCDs are aligned as reading element arrays in the main scanning direction. In this case, each CCD has one analog shift register for RGB time-division reading, and three R, G, and B reading apertures arranged parallel to each other at a pitch corresponding to the reading resolution. The pixel pitch in the main scanning direction is constant.

Abstract: A multicolor CMOS pixel sensor formed in a p-type semiconductor region includes a first detector formed from an n-type region of semiconductor material located near the surface of the p-type region. A first pinned p-type region is formed at the surface of the p-type region over the first detector, and has a surface portion extending past an edge of the pinned p-type region. A second detector is formed from an n-type region located in the p-type semiconductor region below the first detector. A second-detector n-type deep contact plug is in contact with the second detector and extends to the surface of the p-type semiconductor region. A second pinned p-type region is formed at the surface of the p-type semiconductor region over the top of the second-detector n-type deep contact plug. A surface portion of the second-detector deep contact plug extends past an edge of the second pinned p-type region.

Abstract: Imaging device comprising at least one photosite comprising a charge storage semiconductor zone, a charge collection semiconductor zone and transfer means designed to permit charge transfer between the charge storage zone and the charge collection zone, characterized in that the charge storage semiconductor zone comprises a lower semiconductor zone and a conduction channel buried beneath the upper surface of the photosite and connecting said lower semiconductor zone to the charge collection zone.

Abstract: A solid state imaging device includes: a semiconductor substrate having photoelectric conversion regions arranged in matrix, charge transfer regions, and element-separating regions; an insulating film on the semiconductor substrate; transfer electrodes provided in one-to-one with the photoelectric conversion regions and disposed on the insulating film at locations corresponding to the charge transfer regions; and wiring portions each connecting transfer electrodes adjacent in a row direction. The charge transfer regions are doped with impurities so that, in any charge transfer region, a potential of each portion corresponding to an upstream edge of a transfer electrode in the charge transfer direction is lower than the potential of the remaining portions. Each wiring portion connects into a respective transfer electrode at a location offset downstream from the upstream edge of the transfer electrode in the charge transfer direction.

Abstract: An image sensor having a plurality of micro-lenses disposed on a semiconductor substrate. A first micro-lens has a different focal length, height, shape, curvature, thickness, etc., than a second micro-lens. The image sensor may be back side illuminated or front side illuminated.

Abstract: An image sensor includes first impurity regions formed in a substrate, second impurity regions formed in the first impurity regions, wherein the second impurity regions has a junction with the first impurity regions, recess patterns formed over the first impurity regions in contact with the second impurity regions, and transfer gates filling the recess patterns.

Abstract: A photo sensing element array substrate is provided. The photo sensing element array substrate includes a flexible substrate and a plurality of photo sensing elements. The photo sensing elements are disposed in array on the flexible substrate. Each of the photo sensing elements includes a photo sensing thin film transistor (TFT), an oxide semiconductor TFT and a capacitor. The photo sensing TFT is disposed on the flexible substrate. The oxide semiconductor TFT is disposed on the flexible substrate. The oxide semiconductor TFT is electrically connected to the photo sensing TFT. The capacitor is disposed on the flexible substrate and electrically connected between the photo sensing TFT and the oxide semiconductor TFT. When the photo sensing element array substrate is bent, it remains unaffected from normal operation.

Abstract: An image pickup apparatus includes light receiving areas arranged two-dimensionally. A vertical scanning circuit comprises unit circuit stages arranged in the vertical direction and a horizontal scanning circuit comprises unit circuit stages arranged in the horizontal direction, for selecting and reading light receiving areas in succession. The vertical and horizontal scanning circuits are arranged in spaces between the light receiving areas. Two or more unit circuit stages of the vertical scanning circuit are provided in a first space between the light receiving areas. Two or more unit circuit stages of the horizontal scanning circuit are provided in a second space between the light receiving areas. Two or more unit circuit stages of a scanning circuit are provided in a third space between the light receiving areas, the third space being provided in a space between the light receiving areas at a crossing area of the vertical and horizontal scanning circuits.

Abstract: An image sensor is provided. The image sensor comprises a semiconductor substrate, a dielectric interlayer, an interconnection, an image sensing unit, a via hole piercing the image sensing unit and the dielectric layer, and a bottom electrode. The semiconductor substrate includes a readout circuit. The dielectric interlayer is disposed on the semiconductor substrate. The interconnection is disposed in the dielectric interlayer and connected electrically to the readout circuit. The image sensing unit is disposed on the dielectric interlayer and includes a stack of a first impurity region and a second impurity region. The via hole pierces the image sensing unit and the dielectric interlayer to expose the interconnection. The bottom electrode is disposed in the via hole to electrically connect the interconnection and the first impurity region of the image sensing unit.

Abstract: The present invention provides a solid state imaging device and a manufacturing method thereof that lowers contact resistance and suppresses dark current, even when wirings and contact plugs are reduced in size. A solid state imaging device 1 includes wirings 24 and a transfer electrode film 102 that are connected to each other by lower contact plugs A in one layer and upper contact plugs B in another layer. A titanium silicide film 105 is formed at a bottom of each lower contact plug A. The upper contact plugs B do not include any titanium silicide, and are connected to the lower contact plugs A via a tungsten film 107 that is an intermediate wiring layer. Neither of the upper and lower contact plugs A and B includes pure titanium. Intralayer lens films 127 above photodiodes 121 in an imaging pixel region are formed after the lower contact plugs A are formed.

Abstract: Disclosed herein is a solid-state image pickup device including, a plurality of light receiving units, a transfer channel, a first transfer electrode, a second transfer electrode, first wiring, and second wiring.

Abstract: Provided are a wafer level chip scale package of an image sensor and a manufacturing method thereof. The wafer level chip scale package includes: a wafer including an image sensor and a pad on the top surface thereof and inclined surfaces on both ends thereof; expansion pads formed on the inclined surfaces of the wafer, including the pad, such that the expansion pads are electrically connected to the pad, a bottom surface of the expansion pads being on a straight line with respect to that of the wafer; a support formed on the expansion pads to support both bottom surfaces of a glass, the support having a height to provide a space where an air cavity is formed; and a glass disposed on the support to provide the air cavity over the wafer.

Abstract: A solid state image pickup device includes: a semiconductor substrate; a well formed in a surface layer of the semiconductor substrate; a light reception region formed in the well and including a plurality of charge accumulation regions formed in a matrix shape and a plurality of vertical CCDs formed along each column of the charge accumulation regions; a horizontal CCD formed in the well and coupled to ends of the vertical CCDs; a peripheral circuit formed in the well in partial regions of the light reception region and the horizontal CCD; a shield layer formed on the semiconductor substrate including a partial area above the peripheral circuit, made of conductive material and surrounding the light reception region, the shield layer being electrically connected to the semiconductor substrate; a support disposed above the shield layer and made of conductive material; and a translucent member placed on the support.

Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.

Abstract: The photonic mixer comprises a couple of an injecting contact region (3,4) for injecting the majority carrier current into the semiconductor substrate (1) and a detector region (7,8) for collecting the photocurrent. The injecting contact region (3,4) is doped with a dopant of the first conductivity type (p+) at a higher dopant concentration than the semiconductor substrate (1). The detector region (7,8) is doped with a dopant of a second conductivity type (n+) opposite the first conductivity type and has a junction (11,12) with the semiconductor substrate (1), a zone of the semiconductor substrate (1) around said junction (11,12) being a depleted substrate zone (101, 102).

Abstract: A photoelectric conversion device comprises a p-type region, an n-type buried layer formed under the p-type region, an element isolation region, and a channel stop region which covers at least a lower portion of the element isolation region, wherein the p-type region and the buried layer form a photodiode, and a diffusion coefficient of a dominant impurity of the channel stop region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.

Abstract: Disclosed herein is a solid-state imaging device including, a first semiconductor region of the first conduction type, a photoelectric conversion part having a second semiconductor region of the second conduction type formed in the region separated by the isolation dielectric region of the first semiconductor region, pixel transistors formed in the first semiconductor region, a floating diffusion region of the second conduction type which is formed in the region separated by the isolation dielectric region of the first semiconductor region, and an electrode formed on the first semiconductor region existing between the floating diffusion region and the isolation dielectric region and is given a prescribed bias voltage.

Abstract: Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications.

Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.

Abstract: An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: A solid-state image capturing device includes a plurality of electrode pads for inputting and outputting a signal or voltage from and to the outside, a plurality of photoelectric conversion elements, a planarization film for planarizing the difference in the level on the surface above the plurality of photoelectric conversion elements, a microlens for focusing incident light on each of the plurality of photoelectric conversion elements, and a protection film provided above the microlens and the planarization film, the planarization film and the protection film above the plurality of electrode pads being removed as an opening, where the protection film has a protection film removing area that at least includes an area removed across all or a corner portion of the opening and the image capturing area.

Abstract: P type semiconductor well regions 8 and 9 for device separation are provided in an upper and lower two layer structure in conformity with the position of a high sensitivity type photodiode PD, and the first P type semiconductor well region 8 at the upper layer is provided in the state of being closer to the pixel side than an end portion of a LOCOS layer 1A, for limiting a dark current generated at the end portion of the LOCOS layer 1A. In addition, the second P type semiconductor well region 9 at the lower layer is formed in a narrow region receding from the photodiode PD, so that the depletion layer of the photodiode PD is prevented from being obstructed, and the depletion is secured in a sufficiently broad region, whereby enhancement of the sensitivity of the photodiode PD can be achieved.

Abstract: An image sensor and a method of operating the image sensor are provided. At least one pixel of the image sensor includes a detection portion including a plurality of doping areas having different pinning voltages, and a demodulation portion to receive an electron from the detection portion, and to demodulate the received electron.

Abstract: An apparatus and method for forming optical black pixels having uniformly low dark current. Optical Black opacity is increased without having to increase Ti/TiN layer thickness. A hybrid approach is utilized combining a Ti/TiN OB layer in conjunction with in-pixel metal stubs that further occlude the focal radius of each pixel's incoming light beam. Additional metal layers can be used to increase the opacity into the infrared region.

Abstract: An image sensor can be formed of a first substrate having a readout circuitry, an interlayer dielectric, and lower lines, and a second substrate having a photodiode. The first substrate comprises a pixel portion and a peripheral portion. The readout circuitry is formed on the pixel portion. The interlayer dielectric is formed on the pixel portion and the peripheral portion. The lower lines pass through the interlayer dielectric to electrically connect with the readout circuitry and the peripheral portion. The photodiode is bonded to the first substrate and etched to correspond to the pixel portion. A transparent electrode is formed on the interlayer dielectric on which the photodiode is formed such that the transparent electrode can be connected with the photodiode and the lower line in the peripheral portion. A first passivation layer can be formed on the transparent electrode. In one embodiment, the first passivation layer includes a trench exposing a portion of the transparent electrode.

Abstract: A solid-state imaging device includes: a photoelectric converting section comprising a photo-diode; a charge storage section; a charge transfer section; a first control gate section provided between the photoelectric converting section and the charge storage section to control transfer of a signal charge from the photoelectric converting section to the charge storage section; and a second control gate section provided between the charge storage section and the charge transfer section to control transfer of the signal charge from the charge storage section to the charge transfer section. The charge storage section includes: a first region formed on a side near to the first control gate section; and a second region formed on a side near to the second control gate section and configured to have a channel potential increased more than that of the first region. The second region is configured to hold the signal charge in a pinning condition.

Abstract: The invention provides a method for forming a sodium ion selective electrode, including: (a) providing a conductive substrate; (b) forming a conductive wire which extends from the conductive substrate for external contact; and (c) forming a sodium ion sensing film on the conductive substrate, wherein the method for forming the conductive substrate includes: providing a substrate; and forming a conductive layer on the substrate.

Abstract: A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of less than about 0.4 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.

Abstract: Disclosed are a pinned photodiode having and electrically controllable pinning layer and an image sensor including the pinned photodiode. A predetermined voltage is applied to the pinning layer for the depletion duration of the photodiode in the image sensor, so that stable surface pinning is acquired and the uniform surface pinning is achieved between pixels.

Abstract: A solid-state imaging device including a semiconductor substrate, a photoelectric conversion portion interposed between a lower electrode and an upper electrode, a contact plug formed so as to connect the lower electrode and the semiconductor substrate in order to read signal charges generated in the photoelectric conversion portion to the semiconductor substrate side, a vertical type transmitting path configured by sequentially laminating a connection portion for electrically connecting the contact plug to the semiconductor substrate, a charge accumulation layer for accumulating the signal charges read to the connection portion, and a potential barrier layer configuring a potential barrier between the connection portion and the charge accumulation layer in a vertical direction of the semiconductor substrate, and a charge reading portion configured to read the signal charges accumulated in the charge accumulation layer to the circuit forming surface side of the semiconductor substrate.

Abstract: A sensor includes a substrate, a floating diffusion node in the substrate, a photodiode in the substrate laterally spaced apart from the floating diffusion region and a transfer transistor coupling the photodiode and the floating diffusion region. The sensor further includes a photodiode control electrode disposed on the photodiode and configured to control a carrier distribution of the photodiode responsive to a control signal applied thereto. The floating diffusion region may have a first conductivity type, the photodiode may include a first semiconductor region of a second conductivity type disposed on a second semiconductor region of the first conductivity type, and the photodiode control electrode may be disposed on the first semiconductor region. The photodiode may be configured to receive incident light from a side of the substrate opposite the photodiode control electrode.

Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).

Abstract: The present invention provides a back illuminated photodetector having a sufficiently small package as well as being capable of suppressing the scattering of to-be-detected light and method for manufacturing the same. A back illuminated photodiode 1 comprises an N-type semiconductor substrate 10, a P+-type impurity semiconductor region 11, a recessed portion 12, and a window plate 13. In the surface layer on the upper surface S1 side of the N-type semiconductor substrate 10 is formed the P+-type impurity semiconductor region 11. In the rear surface S2 of the N-type semiconductor substrate 10 and in an area opposite the P+-type impurity semiconductor region 11 is formed the recessed portion 12 that functions as an incident part for to-be-detected light. Also, the window plate 13 is bonded to the outer edge portion 14 of the recessed portion 12. The window plate 13 covers the recessed portion 12 and seals the rear surface S2 of the N-type semiconductor substrate 10.

Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor region, a first diffusion layer, a second diffusion layer, a third diffusion layer, an insulating film, a potential layer, and a read electrode. The semiconductor region includes first and second surfaces. The first diffusion layer is formed in the first surface. The first diffusion layer's concentration is a maximum value in a position at a first depth. The charge accumulation layer has a second depth. The second diffusion layer contacts the first diffusion layer. The third diffusion layer is formed in a position which faces the second diffusion layer in respect to the first diffusion layer. The insulating film is formed on the first surface. The potential layer is formed on the insulating film and has a predetermined potential. The read electrode is formed on the insulating film.

Abstract: It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased.

Abstract: A CCD-type solid-state imaging device includes: light receiving devices arranged in vertical and horizontal directions; vertical transfer parts arranged along vertical rows of the arranged light receiving devices, reading out charge accumulated in the adjacent light receiving devices, and transferring the read out charge in the vertical direction; a horizontal transfer part supplied with the charge transferred in the vertical transfer parts and transferring the supplied charge in the horizontal direction; an output part outputting the charge transferred in the vertical transfer parts; an input terminal for readout and transfer clocks that command readout of the charge from the light receiving devices and transfer of the read out charge in the vertical transfer parts; a resistor connected between the input terminal and a clock supply part of the vertical transfer parts; and a switch part connected to the resistor in parallel and switching between the charge readout and the charge transfer in the vertical trans

Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: A photoelectric conversion element comprises: a pair of electrodes; and an organic photoelectric conversion layer between the pair of electrodes, wherein one of the electrodes is a first electrode that collects electrons generated in the organic photoelectric conversion layer; the other one of the electrodes is a second electrode that collects holes generated in the organic photoelectric conversion layer; and the photoelectric conversion element further comprises a hole blocking layer that comprises silicon oxide and inhibits injection of holes into the organic photoelectric conversion layer from the first electrode while applying a bias voltage between the electrodes, the hole blocking layer being disposed between the first electrode and the organic photoelectric conversion layer, and an oxygen/silicon composition ratio of the silicon oxide is 0.5 or greater and 1.2 or less.

Abstract: A demodulation pixel improves the charge transport speed and sensitivity by exploiting two effects of charge transport in silicon in order to achieve the before-mentioned optimization. The first one is a transport method based on the CCD gate principle. However, this is not limited to CCD technology, but can be realized also in CMOS technology. The charge transport in a surface or even a buried channel close to the surface is highly efficient in terms of speed, sensitivity and low trapping noise. In addition, by activating a majority carrier current flowing through the substrate, another drift field is generated below the depleted CCD channel. This drift field is located deeply in the substrate, acting as an efficient separator for deeply photo-generated electron-hole pairs. Thus, another large amount of minority carriers is transported to the diffusion nodes at high speed and detected.