Sensors Not Overlaid By Electrode (e.g., Photodiodes) Patents (Class 257/233)
  • Patent number: 8809921
    Abstract: A solid-state imaging apparatus includes a plurality of pixels each including a photoelectric conversion unit and pixel transistors, which are formed on a semiconductor substrate; a floating diffusion unit in the pixel; a first-conductivity-type ion implantation area for surface pinning, which is formed over the surface on the side of the photoelectric conversion unit and the surface of the semiconductor substrate; and a second-conductivity-type ion implantation area for forming an overflow path serving as an overflow path for the floating diffusion unit, the second-conductivity-type ion implantation area being formed below the entire area of the first-conductivity-type ion implantation area. An overflow barrier is formed using the second-conductivity-type ion implantation area. A charge storage area is formed using an area in which the second-conductivity-type semiconductor area and the second-conductivity-type ion implantation area superpose each other.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Akihiro Yamada, Atsuhiko Yamamoto, Hideo Kido
  • Patent number: 8809913
    Abstract: In accordance with an embodiment, a gating device is connected to a pixel core. The gating device may include a control structure and one or more terminals, wherein the one or more terminals are commonly connected to each other and connected to the pixel core. Alternatively, the terminals may be connected to corresponding photodiodes.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: August 19, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Yannick De Wit
  • Patent number: 8796743
    Abstract: In order to detect light with in particular a high blue component, the inversion zone and the space charge zone of a CMOS-like structure are used. In conjunction with an at least partly transparent gate electrode, in particular a transparent conductive oxide or a patterned gate electrode, it becomes possible to absorb the short-wave component of incident light within the inversion zone and to reliably conduct away the generated charge carrier pairs to first and second contacts. During operation, a control voltage is applied to the gate electrode with a magnitude that generates a continuous inversion zone below the optionally patterned gate electrode.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: August 5, 2014
    Assignee: AMS AG
    Inventors: Hubert Enichlmair, Jochen Kraft, Georg Röhrer
  • Patent number: 8785983
    Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventors: Takayuki Ezaki, Teruo Hirayama
  • Patent number: 8772844
    Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: July 8, 2014
    Assignee: Wi Lan, Inc.
    Inventors: Motonari Katsuno, Ryouhei Miyagawa, Masayuki Matsunaga
  • Patent number: 8766391
    Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: July 1, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventor: Hidetoshi Nozaki
  • Patent number: 8748945
    Abstract: Image sensors are provided. The image sensors may include first and second stacked impurity regions having different conductivity types. The image sensors may also include a floating diffusion region in the first impurity region. The image sensors may further include a transfer gate electrode surrounding the floating diffusion region in the first impurity region. Also, the transfer gate electrode and the floating diffusion region may overlap the second impurity region.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: June 10, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-Cheol Shin
  • Patent number: 8736008
    Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface and a plurality of conductive vias through the silicon wafer. The photodiode array further includes a patterned doped epitaxial layer on the first surface, wherein the patterned doped epitaxial layer and the substrate form a plurality of diode junctions. A patterned etching defines an array of the diode junctions.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: May 27, 2014
    Assignee: General Electric Company
    Inventors: Abdelaziz Ikhlef, Wen Li
  • Patent number: 8716722
    Abstract: A photosensor chip package structure comprises a substrate, a light-emitting chip and a photosensor chip including an ambient light sensing unit and a proximity sensing unit. The substrate has a first basin, a second basin and a light-guiding channel. The openings of the first and second basins respectively face different directions. One opening of the light-guiding channel and the opening of the first basin face the same direction. The other opening of the light-guiding channel interconnects with the second basin. The light-emitting chip is arranged in the first basin. The photosensor chip is arranged in the second basin. The light-guiding channel conducts the light generated by the light-emitting chip and the ambient light to the photosensor chip. The photosensor chip operates as soon as it receives the light generated by the light-emitting chip and/or the ambient light.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: May 6, 2014
    Assignee: TXC Corporation
    Inventor: Yin-Ming Peng
  • Patent number: 8716822
    Abstract: A solid-state imaging device according to an embodiment includes: a plurality of pixels arranged on a first face of a first semiconductor layer, each of the pixels including a photoelectric conversion element converting light entering through a second face of the first semiconductor layer on the opposite side from the first face into a signal charge, the photoelectric conversion element having a pn junction formed with a first semiconductor region formed on the first face and a second semiconductor region formed on a surface of the first semiconductor region; pixel separating regions separating the pixels from one another and formed between the pixels, each of the pixel separating regions including a second semiconductor layer covering faces in contact with the photoelectric conversion elements, and an insulating film with a lower refractive index than a refractive index of the second semiconductor layer to cover the second semiconductor layer.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: May 6, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Risako Ueno, Kazuhiro Suzuki, Hideyuki Funaki, Yoshinori Iida
  • Patent number: 8710563
    Abstract: The present invention discloses an image sensor including photodiodes formed in a semiconductor substrate, a color filter array formed over the photodiodes, and microlenses formed on the color filter array. A first microlens, which may be any one of two adjacent microlenses, includes an upper portion and a lower portion. The lower portion of the first microlens is formed of a material different than a material of the upper portion of the first microlens.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: April 29, 2014
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: Young Je Yun, Min Sung Kim
  • Patent number: 8698208
    Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
  • Patent number: 8698217
    Abstract: A device includes a semiconductor substrate having a front side and a backside. An active image sensor pixel array is disposed on the front side of the semiconductor substrate. A metal shield is disposed on the backside of, and overlying, the semiconductor substrate. The metal shield has an edge facing the active image sensor pixel array. The metal shield has a middle width, and a top width greater than the middle width.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: April 15, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yuan Hsu, Kun-Ei Chen, Huai-Tei Yang, Chien-Chung Chen
  • Patent number: 8686480
    Abstract: Disclosed is a method for manufacturing a semiconductor device that can improve the performance of a photodiode that is formed on a same substrate as a thin film transistor without greatly deteriorating the productivity of the semiconductor device. On a glass substrate 30, a base layer 31 having a recess 33b on the surface is formed, and on the base layer 31, an amorphous silicon thin film 42 is formed. The amorphous silicon thin film 42 is melted to form a crystalline silicon thin film 43, while moving the molten silicon into the recess 33b. Of the silicon thin film 43, a silicon film 11 that constitutes a portion of a thin film transistor 10 is formed of the silicon thin film 43 in a part other than the recess 33b, while a silicon film 21 that constitutes a portion of a photodiode 20 is formed of the silicon thin film 43 in the recess 33b.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: April 1, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tsuyoshi Itoh, Hiroshi Nakatsuji, Masahiro Fujiwara
  • Patent number: 8686479
    Abstract: Provided is a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. In an image sensor including an array of pixels, each pixel includes: a standard photo-sensing and charge storage region formed in a first region under a surface portion of a substrate and collecting photo-generated carriers; a second charge storage region formed adjacent to the surface portion of the substrate and separated from the standard photo-sensing and charge storage region; and a potential barrier formed between the first region and a second region underneath the first region and diverting the photo-generated carriers from the second region to the second charge storage region.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: April 1, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8680585
    Abstract: There is provided a light emitting diode package and a method of manufacturing the same. A light emitting diode package according to an aspect of the invention may include: an LED chip; a body part having the LED chip mounted thereon; a pair of reflective parts extending from the body part to face each other while interposing the LED chip therebetween, and reflecting light emitted from the LED chip; and a molding part provided between the pair of reflective parts to encapsulate the LED chip and having a top surface whose central region is curved inwards.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: March 25, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Sam Park, Hun Joo Hahm
  • Patent number: 8653566
    Abstract: The present invention provides a solid-state imaging device in which high S/N is achieved. A solid-state imaging device includes a photodiode, a transfer transistor, a floating diffusion, a floating diffusion wiring, an amplifying transistor, a power line, and first output signal lines, in which the first output signal lines are formed one on each side of the floating diffusion wiring in a layer having the floating diffusion wiring formed on a semiconductor substrate, and the power line is formed above the floating diffusion wiring.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 18, 2014
    Assignee: Panasonic Corporation
    Inventor: Hirohisa Ohtsuki
  • Patent number: 8643186
    Abstract: An apparatus involves a semiconductor wafer that has been back-end processed, the semiconductor wafer including a substrate, electronic devices and multiple metalization layers, a via extending from an outer surface of the substrate through the substrate to a metalization layer from among the multiple metalization layers, and an electrically conductive material within the via, the electrically conductive material forming an electrically conductive path from the metalization layer to the outer surface. A method of processing a semiconductor wafer that has been front-end and back-end processed involves forming a via in the semiconductor wafer extending from a surface of the wafer, into and through semiconductor material, to a metalization layer formed during the back-end processing by etching the semiconductor wafer; and making the via electrically conductive so as to form an electrical path within the via extending from the surface of the wafer to the metalization layer.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: February 4, 2014
    Assignee: Cufer Asset Ltd. L.L.C.
    Inventor: John Trezza
  • Patent number: 8637907
    Abstract: A system according to an embodiment of the present invention includes one or more first optical sensors and one or more second optical sensors. The first optical sensor(s) each include a photodetector region and a plurality of first slats over the photodetector region. The second optical sensor(s) each include a photodetector region and a plurality of second slats over the photodetector region, wherein the second slats have a different configuration than the first slats. For example, the second slats can be orthogonal relative to the first slats. For another example, the first slats can slant in a first direction, and the second slats can slant in a second direction generally opposite the first direction. Currents produced by the first optical sensor(s) and the second optical sensor(s), which are indicative of light incident on the optical sensors, are useful for distinguishing between movement in at least two different directions.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: January 28, 2014
    Assignee: Intersil Americas LLC
    Inventor: Francois Hebert
  • Patent number: 8629482
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: January 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoyasu Kudo, Kenichi Yoshino, Masaki Kamimura
  • Patent number: 8598640
    Abstract: A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: December 3, 2013
    Assignee: Sony Corporation
    Inventors: Yoshiaki Kitano, Hideshi Abe, Jun Kuroiwa, Kiyoshi Hirata, Hiroaki Ohki, Nobuhiro Karasawa, Ritsuo Takizawa, Mitsuru Yamashita, Mitsuru Sato, Katsunori Kokubun
  • Patent number: 8558234
    Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: October 15, 2013
    Assignee: California Institute of Technology
    Inventors: Shouleh Nikzad, Chris Martin, Michael E. Hoenk
  • Patent number: 8536625
    Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated-charge-extinguishment layer, at the first substrate surface, extends across the pixel array.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: September 17, 2013
    Assignee: Massachusetts Institute of Technology
    Inventor: Barry E. Burke
  • Patent number: 8530264
    Abstract: Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: September 10, 2013
    Assignee: IMEC
    Inventors: Koen De Munck, Kiki Minoglou, Joeri De Vos
  • Patent number: 8513044
    Abstract: So as to improve efficiency of a thin-film photovoltaic converter device, during manufacturing of which an intermediate product module is manufactured, which comprises deposition of at least one positively doped, at least one intrinsic and at least one negatively doped silicon-based layer, the addressed intermediate product module is subjected to an annealing step during which the module is subjected to a temperature of between 100° C. to 200° C. during a time span of half an hour to four hours.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: August 20, 2013
    Assignee: Tel Solar AG
    Inventor: Markus Kupich
  • Patent number: 8513721
    Abstract: A complementary metal oxide semiconductor (CMOS) image sensor device includes a capacitive coupled photodiode that is formed within a region of a semiconductor substrate. The photodiode receives an incident light and generates a corresponding electric charge. The CMOS image sensor device includes a reset transistor coupled to the photodiode for reverse biasing the photodiode with a predetermined voltage. The CMOS image sensor device further includes a buffer circuit and a capacitor, which is interposed between the photodiode and the buffer circuit. The capacitor is configured to transfer the electric charge to the buffer circuit. The buffer circuit may include an emitter follower or a source follower transistor.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: August 20, 2013
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Bejing) Corporation
    Inventors: Hong Zhu, Liwei Wu, Jessy Xu, Samuel Leng, Celia Xin, Jim Yang
  • Patent number: 8492806
    Abstract: A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5×1019/cm3, the work function ?ms of a source electrode in contact with the oxide semiconductor, the work function ?md of a drain electrode in contact with the oxide semiconductor, and electron affinity ? of the oxide semiconductor satisfy ?ms??<?md. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kawae
  • Patent number: 8476682
    Abstract: An example embodiment of the image sensor includes a light-sensing device including a first electrode, a second electrode disposed opposite to the first electrode, and a photoelectric conversion layer positioned between the first electrode and the second electrode. The photoelectric conversion layer includes a block copolymer including electron donating blocks and electron accepting blocks. The electron donating blocks are deposited together and connected to the first electrode and the second electrode. The electron accepting blocks are deposited together and connected to the first electrode and the second electrode. A color filter may be positioned on the second electrode of the light-sensing device.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: July 2, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do Hwan Kim, Woong Choi, Kyung Bae Park, Kyu Sik Kim, Yong Wan Jin, Kwang Hee Lee
  • Patent number: 8471315
    Abstract: The invention describes a solid-state CMOS image sensor array and in particular describes in detail image sensor array pixels having global and rolling shutter capabilities that are using a dual channel transfer-storage gate for charge transfer from a PD to a TX gate well and from the TX gate well onto a FD. The dual channels are stacked above each other where a shallow charge channel is used to drain surface generated dark current away from the pixel structure, while a buried bulk channel provides for standard charge transfer and storage functions. This feature thus improves the sensor noise performance and prevents signal contamination and various shading effects caused by the dark current buildup during a prolonged charge storage sequence in pixels of image sensor arrays using the global shutter mode of operation. Several embodiment of this concept are described including pixels which utilize shared circuitry, a complete PD reset capability, and an efficient anti-blooming control.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: June 25, 2013
    Assignee: Aptina Imaging Corporation
    Inventors: Jaroslav Hynecek, Hirofumi Komori
  • Publication number: 20130140610
    Abstract: A solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
    Type: Application
    Filed: December 20, 2012
    Publication date: June 6, 2013
    Applicant: SONY CORPORATION
    Inventor: SONY CORPORATION
  • Patent number: 8445944
    Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: May 21, 2013
    Assignee: Sony Corporation
    Inventors: Takayuki Ezaki, Teruo Hirayama
  • Patent number: 8436406
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: May 7, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 8426238
    Abstract: A method for manufacturing a solid-state image pickup device is provided. A first pixel isolation member is formed in a semiconductor substrate including pixels by implanting impurity ions in a first region of the substrate to separate pixels in the first region from each other when viewed from a surface of the substrate. A second pixel isolation member is also formed in the substrate by forming a trench in a second region of the substrate different from the first region to separate pixels in the second region from each other, and filling the trench with an electroconductive material harder to polish by CMP than the substrate. The thickness of the substrate is reduced by CMP on a rear surface of the substrate using the second pixel isolation member as a stopper.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventors: Kenichi Nishizawa, Hiroshi Takahashi
  • Patent number: 8395193
    Abstract: A MOS-type solid-state image pickup device is provided on a semiconductor substrate and includes a photoelectric conversion unit having a first semiconductor region, a second semiconductor region, and a third semiconductor region. A transfer gate electrode is disposed on an insulation film and transfers a carrier from the second semiconductor region to a fourth semiconductor region, and an amplifying MOS transistor has a gate electrode connected to the fourth semiconductor region. In addition, a fifth semiconductor region is continuously disposed to the second semiconductor region, under the gate electrode. An entire surface of the third semiconductor region is covered with the insulation film, and a side portion of the third semiconductor region that is laterally opposite to the transfer gate is in contact with the first semiconductor region.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: March 12, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Shigetoshi Sugawa, Isamu Ueno, Tetsunobu Kochi, Katsuhito Sakurai, Hiroki Hiyama
  • Patent number: 8389322
    Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Patent number: 8383448
    Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Patent number: 8383443
    Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 8384133
    Abstract: In a solid state imaging device, and a method of manufacture thereof, the efficiency of the transfer of available photons to the photo-receiving elements is increased beyond that which is currently available. Enhanced anti-reflection layer configurations, and methods of manufacture thereof, are provided that allow for such increased efficiency. They are applicable to contemporary imaging devices, such as charge-coupled devices (CCDs) and CMOS image sensors (CISs). In one embodiment, a photosensitive device is formed in a semiconductor substrate. The photosensitive device includes a photosensitive region. An anti-reflection layer comprising silicon oxynitride is formed on the photosensitive region. The silicon oxynitride layer is heat treated to increase a refractive index of the silicon oxynitride layer, and to thereby decrease reflectivity of incident light at the junction of the photosensitive region.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chang Rok Moon
  • Patent number: 8378426
    Abstract: A SRAM includes a first CMOS inverter of first and second MOS transistors connected in series, a second CMOS inverter of third and fourth MOS transistors connected in series and forming a flip-flop circuit together with the first CMOS inverter, and a polysilicon resistance element formed on a device isolation region, each of the first and third MOS transistors is formed in a device region of a first conductivity type and includes a second conductivity type drain region at an outer side of a sidewall insulation film of the gate electrode with a larger depth than a drain extension region thereof, wherein a source region is formed deeper than a drain extension region, the polysilicon gate electrode has a film thickness identical to a film thickness of the polysilicon resistance element, the source region and the polysilicon resistance element are doped with the same dopant element.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: February 19, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Makoto Yasuda
  • Patent number: 8368122
    Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 5, 2013
    Assignee: Universite de Neuchatel
    Inventors: Didier Domine, Peter Cuony, Julien Bailat
  • Patent number: 8357960
    Abstract: This invention relates to photodetector and its array in the form of a image sensor having multispectral detection capability covering the wavelengths from ultra-violet (UV) or near UV to shortwave infrared (over 1700 nm), ultra-violet (UV) or near UV to mid infrared (3500 nm), or ultra-violet (UV) or near UV to 5500 nm. More particularly, this invention is related to the multicolor detector, which can detect the light wavelengths ranges from as low as UV to the wavelengths over 1700 nm covering the most of the communication wavelength, and also from UV to as high as 5500 nm using of the single monolithic detector fabricated on the single wafer. This invention is also related to the multispectral photodetector arrays for multicolor imaging, sensing, and advanced communication.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: January 22, 2013
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8357556
    Abstract: A method and apparatus are provided for protecting a semiconductor device from damage. The method may include the steps of providing an active semiconductor device on a surface of a semiconductor substrate where the active device is surrounded by an inactive semiconductor area, and providing a soft metallic guard element in the inactive semiconductor area around at least a portion of the periphery of the active device wherein the metallic guard element is connected to ground potential and not to the active device.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: January 22, 2013
    Assignee: Emcore Corporation
    Inventors: Richard Carson, Elaine Taylor, Douglas Collins
  • Patent number: 8350301
    Abstract: A semiconductor photodiode includes a semiconductor substrate; a first conduction type first semiconductor layer formed above the semiconductor substrate; a high resistance second semiconductor layer formed above the first semiconductor layer; a first conduction type third semiconductor layer formed above the second semiconductor layer; and a second conduction type fourth semiconductor layer buried in the second semiconductor layer, in which the fourth semiconductor layer is separated at a predetermined distance in a direction horizontal to the surface of the semiconductor substrate.
    Type: Grant
    Filed: July 17, 2010
    Date of Patent: January 8, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Miura, Shinichi Saito, Youngkun Lee, Katsuya Oda
  • Patent number: 8339492
    Abstract: An image sensor and a method for manufacturing the same are provided. An image sensor comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, and a contact. The readout circuitry is formed at a first substrate. The interlayer dielectric is formed on the first substrate. The interconnection is formed in the interlayer dielectric. The interconnection is electrically connected to the readout circuitry. The image sensing device is formed on the interconnection. The image sensing device comprises a first conductive type layer and a second conductive type layer. The contact connects the first conductive type layer of the image sensing device and the interconnection electrically. The contact is isolated from the second conductive type layer by a trench formed in the second conductive layer around the contact.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: December 25, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8338868
    Abstract: An image sensor with a shared photodiode is provided. The image sensor includes at least two unit pixels, each of which includes a photodiode, a diffusion region which gathers electrons from the photodiode, a transfer transistor which connects the photodiode with the diffusion region, and a readout circuit which reads out a signal from the diffusion region. Photodiodes of neighboring unit pixels are disposed symmetrically to be adjacent to one another to form a shared photodiode. The image sensor does not have a STI region which causes a dark current restricting its performance and does not require a basic minimum design factor (a distance or an area) related to a STI region. A region corresponding to a STI region may be used as a region of a photodiode or for additional pixel scaling. Therefore, a limitation in scaling of a photodiode is overcome, and pixel performance is improved in spite of pixel scaling.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: December 25, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bong Ki Mheen, Albert J. P. Theuwissen, Jae Sik Sim, Mi Ran Park, Yong Hwan Kwon, Eun Soo Nam
  • Patent number: 8309383
    Abstract: A camera with a solid-state imaging device which includes a plurality of pixels in an arrangement, each of the pixels including a photoelectric conversion element, pixel transistors including a transfer transistor, and a floating diffusion region, in which the channel width of transfer gate of the transfer transistor is formed to be larger on a side of the floating diffusion region than on a side of the photoelectric conversion element.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: November 13, 2012
    Assignee: Sony Corporation
    Inventor: Yoshiharu Kudoh
  • Patent number: 8304816
    Abstract: An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer formed inside the substrate, a photodiode formed in the amorphous silicon layer, and a transfer gate formed over the substrate adjacent to the photodiode and transferring photoelectrons received from the photodiode.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: November 6, 2012
    Assignee: Intellectual Ventures II LLC
    Inventors: Myoung-Shik Kim, Hyung-Jun Kim
  • Patent number: 8304815
    Abstract: Disclosed is a solid-state image pickup apparatus including a semiconductor substrate, a photoelectric converter, a transfer gate, an insulating layer, a first silicon layer, and a pixel transistor portion. The photoelectric converter converts light energy of incident light into electrical energy and obtains a signal charge. The photoelectric converter is formed on a surface side in the semiconductor substrate. The transfer gate reads the signal charge from the photoelectric converter, and the transfer gate is formed on the semiconductor substrate adjacent to the photoelectric converter. The insulating layer is formed on the photoelectric converter in the semiconductor substrate. The first silicon layer is formed on the insulating layer. The pixel transistor portion amplifies and outputs the signal charge read by the transfer gate. The pixel transistor portion is formed on the insulating layer with the first silicon layer being an active region.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: November 6, 2012
    Assignee: Sony Corporation
    Inventor: Shinpei Yamaguchi
  • Patent number: 8294232
    Abstract: An optical detector includes a detector surface operable to receive light, a depleted field region coupled to the underside of the detector surface, a charge collection node underlying the depleted field region, an active pixel area that includes the portion of the depleted field region above the charge collection node and below the detector surface, and two or more guard regions coupled to the underside of the detector surface and outside of the active pixel area. The depleted field region includes an intrinsic or a near-intrinsic material. The charge collection node has a first width, and the guard regions are separated by a second width that is greater than the first width of the charge collection node. The guard regions are operable to prevent crosstalk to an adjacent optical detector.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: October 23, 2012
    Assignee: Raytheon Company
    Inventors: John L. Vampola, Sean P. Kilcoyne, Robert E. Mills, Kenton T. Veeder
  • Patent number: RE44482
    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: September 10, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum