Abstract: A photodiode that exhibits a photo-induced negative differential resistance region upon biasing and illumination is described. The photodiode includes an N+ silicon substrate, a silicon nitride layer formed on the N+ silicon substrate, a reoxidized nitride layer formed on the silicon nitride layer and a N+ polysilicon layer formed on at least a portion of the reoxidized nitride layer.

Abstract: A semiconductor device comprising bolometers arranged in two-dimensional form corresponding to pixels for converting incoming infrared rays into electrical signals includes vertical switches, a vertical shift register, horizontal switches, and a horizontal shift register as means for selecting an arbitrary pixel. The semiconductor device is configured to allow an overcurrent to be supplied to a bolometer in a pixel selected by those means.

Abstract: A semiconductor device includes a photodetector having a junction at which a first conductive type first semiconductor portion and a second conductive type second semiconductor portion are joined to each other. In this photodetector, division regions are formed in part of the first semiconductor portion in such a manner as to cross the first semiconductor portion and partially enter the second semiconductor portion, so that the junction is divided into a plurality of parts by the division regions, to form a plurality of photodetector regions having the divided junction parts.

Abstract: An image sensor having a plurality of pixels arranged in a series of row and columns comprising: a semiconductor substrate having a plurality of pixels formed in rows and columns with at least two row adjacent pixels and at least two column adjacent pixels formed within the substrate; and at least one electrical function integrated within the adjacent pixels that is shared between the adjacent pixels. The electrical function can be either a contact region or an electrical circuit used in implementing either a photogate, a transfer gate, a reset gate, a row select gate, an amplifier drain, an output node, a floating diffusion contact, a reset drain, a lateral overflow gate, an overflow drain or an amplifier.

Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.

Abstract: A trench photosensor for use in a CMOS imager having an improved charge capacity. The trench photosensor may be either a photogate or photodiode structure. The trench shape of the photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the trench photosensor.

Abstract: A process for producing a semiconductor device comprises a step of polishing of a region of an electroconductive material serving as an electrode or a wiring line in an insulating layer formed on a semiconductor region, the region of the electroconductive material being electrically connected to the semiconductor region, wherein a region of another material is formed within the region of the electroconductive material to be polished. Also a semiconductor device having the region is provided. A process for producing an active matrix substrate comprises a step of polishing of picture element electrodes made of a metal provided on crossing portions of plural signal lines and plural scanning lines and a means for applying voltage to the picture elements, wherein a region of another material is formed within the region of the picture element electrode to be polished. An active matrix substrate has such picture element electrodes as mentioned above.

Abstract: Methods of forming field effect transistors and resultant field effect transistor circuitry are described. In one embodiment, a semiconductive substrate includes a field effect transistor having a body. A first resistive element is received by the substrate and connected between the transistor's gate and the body. A second resistive element is received by the substrate and connected between the body and a reference voltage node. The first and second resistive elements form a voltage divider which is configured to selectively change threshold voltages of the field effect transistor with state changes in the gate voltage. In a preferred embodiment, first and second diode assemblies are positioned over the substrate and connected between the gate and body, and the body and a reference voltage node to provide the voltage divider.

Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.

Abstract: A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.

Abstract: A gate oxide film formed on the surface of a silicon substrate is partly reduced in thickness or “thinned” at its specified part overlying a source region. In a gate region, a multilayer structure is formed which includes a first polycrystalline silicon or “polysilicon” film of a p-type conductivity, a tunnel oxide film, and a second p-type polysilicon film in this order of lamination. The source region and the first polysilicon film make up a high-concentration impurity-doped pn junction with a thin silicon oxide film laid therebetween, providing a tunnel diode also known as Esaki diode. The diode is used for a negative differential resistance. Further, a portion between the first and second polysilicon films is a non-linear tunnel resistor, which serves as a load.

Abstract: A linear image sensor IC comprising a plurality of switching circuits each connected to a plurality of light receiving elements in series; scanning circuits for sequentially switching said switching circuits; and driving circuits for operating said scanning circuits, wherein a LOCOS isolation layer is formed between an edge in the main scanning direction of the linear image sensor IC which is closest to an array of the light receiving elements and a light receiving portion of the light receiving element. The inventive image sensor IC is mounted by devising so that the circuit can be put into a thin and long pattern in the scanning direction, so that the chip having a width thinner than a thickness thereof which had been beyond expectation by the prior art can be realized. The use of this very thin IC allows a compact IC assembling substrate having less fluctuation among ICs to be manufactured at low cost.

Abstract: A method of manufacturing a PIN (positive-intrinsic-negative) diode structure includes depositing an insulation or dielectric layer over the bottom PIN diode electrodes, prior to depositing the PIN semiconductor layers. The insulation layer results in a PIN diode structure with reduced leakage current, reduced RIE (reactive ion etching) chamber contamination, the reduction or elimination of post RIE processing, improved yields, and/or expands the potential materials that may be used for the bottom electrode. A corresponding PIN diode structure is also disclosed. The resulting PIN diode structures may be used in, for example, LCD (liquid crystal display) and solid state imager applications.

Abstract: This invention provides a semiconductor device including a silicon layer, an insulating layer formed on the silicon layer, a first semiconductor device formed on the insulating film to convert light into an electric signal, and a second semiconductor device formed on the insulating film, wherein a silicon region is formed in the silicon layer to shield the second semiconductor device from light, and a through hole extending through the silicon layer except for the silicon region to input light to the first semiconductor device is formed in that portion of the silicon layer corresponding to the lower portions of the first and second semiconductor devices.

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of a MOS transistor (32).

Abstract: An amplifying solid-state image sensor includes a semiconductor substrate, and a plurality of unit pixels arranged on the semiconductor substrate in a two-dimensional manner, in which each of the plurality of unit pixels includes a photodiode for performing the photoelectric conversion, a storage diode for storing electric signal charge obtained by the photodiode, an amplifying transistor for amplifying the electric signal charge stored in the storage diode, and a signal reading section for reading a signal voltage from the amplifying transistor, and in which each of the plurality of unit pixels has a first active region and a second active region in which the second active region has the same conductivity type as that of the semiconductor substrate and an impurity concentration higher than that of the semiconductor substrate, the photodiode in each of the unit pixels is formed in the first active region, and the amplifying transistor is formed in the second region.

Abstract: The present invention is directed to method for manufacturing a liquid crystal display apparatus in which a thin film transistor formed by successively depositing on a glass substrate a gate electrode, a gate insulating film, an active layer made of amorphous silicon, a source electrode and a drain electrode is used for driving liquid crystal. The method includes steps of: forming the gate electrode by patterning a gate metal layer coating the glass substrate by a wet etching process using an etchant containing cerium ammonium nitrate; removing an etching reaction product adhering on the substrate by washing it with a hydrofluoric acid solution; and forming the gate insulating film.

Abstract: Methods of forming field effect transistors and resultant field effect transistor circuitry are described. In one embodiment, a semiconductive substrate includes a field effect transistor having a body. A first resistive element is received by the substrate and connected between the transistor's gate and the body. A second resistive element is received by the substrate and connected between the body and a reference voltage node. The first and second resistive elements form a voltage divider which is configured to selectively change threshold voltages of the field effect transistor with state changes in the gate voltage. In a preferred embodiment, first and second diode assemblies are positioned over the substrate and connected between the gate and body, and the body and a reference voltage node to provide the voltage divider.

Abstract: A method for designing an integrated circuit having optical inputs and outputs includes the step of selecting an integrated circuit design which includes at least one circuit cell design for processing electric signals. The circuit cell design has a predetermined number of electric inputs and electric outputs. The integrated circuit design also includes a plurality of layers of metalization for providing electric coupling. After the electronic integrated circuit design is selected, a predetermined number of optical input devices are located on the circuit cell design in a first prearranged orientation. The predetermined number of optical input devices is no greater than the predetermined number of electric inputs to the circuit cell. Also after the electronic circuit design is selected, a predetermined number of optical output devices are located on the circuit cell design in a second prearranged orientation.

Abstract: An image sensor (10) has an image sensing element that includes an N-type conducting region (26) and a P-type pinned layer (37). The two regions form two P-N junctions at different depths that increase the efficiency of charge carrier collection at different frequencies of light. The conducting region (26) is formed by an angle implant that ensures that a portion of the conducting region (26) can function as a source of an MOS transistor (32).

Abstract: A semiconductor structure having a temperature sensor placed in close proximity to gate and source and/or drain electrodes. The sensor is compatible with conventional semiconductor processing and is typically made from doped polysilicon having a large temperature coefficient of resistivity. At least one sensor may be placed under, but insulated from, source or drain electrodes to protect against high electric fields. The sensor is also compatible with bipolar semiconductor structures.

Abstract: A semiconductor imaging system preferably having an active pixel sensor array compatible with a CMOS fabrication process. Color-filtering elements such as polymer filters and wavelength-converting phosphors can be integrated with the image sensor.

Abstract: An image sensor. The image sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. A plurality of image sensors are formed adjacent to the interconnect structure. Each image sensor includes a pixel electrode, and a separate I-layer section formed adjacent to the pixel electrode. The image sensor array further includes an insulating material between each image sensor. A transparent electrode is formed over the image sensors. An inner surface of the transparent electrode is electrically connected to an outer surface of the image sensors and the interconnect.

Abstract: An active matrix OED array includes an array area defined on a semiconductor substrate defining rows and columns of pixels and driver areas spaced from the array area with driver circuits including row drivers coupled to row buses and column drivers coupled to column buses formed in the driver areas. An active control circuit and an OED are formed in each pixel of the array area and coupled to a row and a column bus adjacent each pixel. A second substrate is formed of light transmissive material and includes externally accessible electrical connectors coupled to the driver circuits. The semiconductor substrate includes a first bump pad encircling the array area and the second substrate includes a mating second bump pad with the first and second bump pads engaged to seal the array area.

Abstract: A method of forming a contact for a photosensitive element of a photosensitive imager including a common electrode separated from a bottom contact by intervening layers of an SiOx transistor passivation layer over the bottom contact and an SiNx diode passivation layer over the transistor passivation layer. Controlled etching through the passivation layers exposes but does not damage the thin film transistor passivation layer extending in regions beyond the common electrode, and also improves adherence of a protective gasket in such regions. The contact pad formed in this process has a layer of diode passivation material and a layer of transistor passivation material disposed between the upper common electrode material layer and the underlying source and drain electrode material layer, with a via provided having smooth and sloped sidewalls over which the common electrode material extends to provide electrical contact between the common electrode material layer and the source and drain electrode material layer.

Abstract: An active pixel image sensor includes an array of pixels arranged in a first group and a second group. The first group may constitute a row and the second group may constitute a column, for example. A first common conductor is coupled to the pixels in the first group for conducting control signals. A second common conductor is coupled to the pixels in the second group for selectively transmitting signals to processing electronics. Each of the pixels includes a plurality of sensing elements that are each configured for capturing a portion of energy from an object to be imaged. At least one of the sensing elements is of a type distinct from another of the sensing elements. For example, one of the sensing elements may be a photogate and another may be a photodiode. An amplifying arrangement is provided for receiving signals from selected ones of the plurality of sensing elements and for selectively providing output signals to the second common conductor.

Abstract: In a semiconductor device comprising a semiconductor chip on which semiconductor elements are formed, the semiconductor device further comprises a thermal resistance detector for detecting an increase of thermal resistance of a heat radiating path which is provided to radiate the heat generated in the semiconductor device during operation, and a thermal resistance detection result output circuit for outputting a result of a detection by the thermal resistance detector to an output of the semiconductor device. The semiconductor device can detect at the early stage the increase of the thermal resistance of the heat radiating path, and the deterioration of the semiconductor device due to the crack in the solder layer bonding the chip mounting insulation substrate and heat sink during the operation of the device.

Abstract: A photodetector arrangement capable of detecting high-power-light flux and including a set of elementary photodetectors each one of which is individually tested to determine that it has no defects. Each of the photodetectors which is found to be free of objectionable defects is connected in parallel to a common conducting line to thus produce a combined output when radiation impinges on the detector surface. The connection can be hard wired or provided through a set of transistors acting as connection control intermediaries between the good photodetectors and the common conducting line. The active areas of only good photodetectors are thus combined to form a large photodetector area of any desired shape or size without the usual reliability problems. The selective control of the transistors can further be provided by auxiliary control photodetectors to additionally automatically control the size of the active area in response to the area of light being detected or a control light beam.

Abstract: A light-emitting element 22 and a light-receiving element 26 are attached to a circuit board so as to oppose each other across the circuit board 2. As a result, light from the light-emitting element 22 arrives at the light-receiving element 26 via the substrate 2. Since the distance between the light-emitting element 22 and the light-receiving element 23 thus becomes very short, the light conversion efficiency is improved by a wide margin. Further, since the substrate 2 is interposed between the light-emitting element 22 and the light-receiving element 26, the elements are completely isolated within the insulation breakdown voltage of the material constituting the substrate.

Abstract: This invention concerns a novel structure to create a low capacitance floating diffusion without changing or adding steps to the image sensor fabrication process. It consists of incorporation of a novel structure at the contact area between the floating diffusion and the gate electrode that reduces the junction capacitance of the floating diffusion and improves the sensitivity of the device (the structure features overlapping contact, gate, metalization and n-type regions which provide the electrical contact between the floating diffusion and the gate). Additionally, the structure has a low resistance diffusion region that is self aligned with a gate electrode.

Abstract: A position-sensitive semiconductor detector is provided having a completely depleted primary area of a first conductivity and insulation layers on the two main surfaces as well as conductive electrodes on the insulation layers (MIS structure).

Abstract: Disclosed is a layer-built solid state image sensing device comprising: a first semiconductor layer of a first conductivity type; a plurality of optoelectro transducing storage elements having a first optoelectro transduction layer of a second conductivity type opposite to the first conductivity type selectively formed within regions isolated pixel column by pixel column by a first isolating layer of the first conductivity type on the first semiconductor layer surface of the first conductivity type; charge transfer elements having a first impurity layer of the second conductivity type formed in columns a regular distance away from optoelectro transducing storage element columns within the isolating areas on the first semiconductor layer surface, and a transfer conductive electrode layer buried within an insulating film selectively formed on the surface other than the first optoelectro transducing layer and a light shielding electrode provided to enclose the transfer electrode also buried within the insulating