Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: A titanium layer and a titanium nitride layer are successively laminated on a substrate and a group III nitride compound semiconductor layer is further formed thereon. When the titanium layer is removed in the condition that a sufficient film thickness is given to the titanium nitride layer, a device having the titanium nitride layer as a substrate is obtained.

Abstract: An array of photodetectors intended to be hybridized on a readout circuit and fabricated from a wafer in semiconductor material. The wafer is divided into pixels, the pixels being separated from one another by walls formed crosswise over the entire thickness of the wafer, the hybridization surface having connection pads enabling hybridization of the photodetector array to the readout circuit.

Abstract: A magnetic memory fabricated on a semiconductor substrate is disclosed. The method and system include a plurality of magnetic tunneling junctions and a plurality of shields for magnetically shielding the plurality of magnetic tunneling junctions. Each of the plurality of magnetic tunneling junctions includes a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. At least a portion of the plurality of shields have a high moment and a high permeability and are conductive. The plurality of shields are electrically isolated from the plurality of magnetic tunneling junctions. The plurality of magnetic tunneling junctions are between the plurality of shields.

Abstract: A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.

Abstract: There is a demand of a solid-state imaging device capable of being driven at a high speed and in which the shading of sensitivity and illuminance defect can be prevented from being caused. A solid-state imaging device (20) comprises a light-receiving sensor section disposed on the surface layer portion of a substrate (21) for performing a photoelectric conversion, a charge transfer section for transferring a signal charge read out from the light-receiving sensor section, a transfer electrode (27) (28) made of polysilicon formed on a substrate (21) at a position approximately above the charge transfer section through an insulating film (26), and an interconnection made of polysilicon and interconnected to the transfer electrode (27) (28). At least one of the polysilicon transfer electrode (27)(28) and the interconnection is formed on a polysilicon layer (27a) (28a) by selectively depositing a high-melting point metal having a resistance value lower than that of polysilicon.

Abstract: The optoelectronic device includes a photo diode and an amplifier, which amplifies output of the photo diode. The amplifier includes an input stage and an output stage. In one embodiment, the input stage has a series connection to a resistor, which is connected to a ground. The output stage has a connection to ground that does not overlap the series connection. In another embodiment, the input stage has a first connection to a bypass capacitor, which is connected to a power source. The output stage has a separate, second connection to the capacitor, which prevents high frequencies from flowing between the input stage and said output stage via a connection to the power source.

Abstract: An exemplary CMOS image sensor comprises a plurality of pixels arranged in an array. The plurality of pixels includes a first pixel proximate an optical center of the array, and a second pixel proximate a peripheral edge of the array. The CMOS image sensor further comprises a first metal interconnect segment associated with the first pixel situated in a first metal layer, and a second metal interconnect segment associated with the second pixel situated in the first metal layer. The second metal interconnect segment is shifted closer to the optical center of the array than the first metal interconnect segment so that the second metal interconnect segment approximately aligns with a principle ray angle incident the second pixel, thereby reducing pixel light shadowing.

Abstract: A monolthically integrated VCSEL and photodetector, and a method of manufacturing same, are disclosed for applications where the VCSEL and photodetector require separate operation such as duplex serial data communications applications. A first embodiment integrates a VCSEL with an MSM photodetector on a semi-insulating substrate. A second embodiment builds the layers of a p-i-n photodiode on top of layers forming a VCSEL using a standard VCSEL process. The p-i-n layers are etched away in areas where VCSELs are to be formed and left where the photodetectors are to be formed. The VCSELs underlying the photodetectors are inoperable, and serve to recirculate photons back into the photodetector not initially absorbed. The transmit and receive pairs are packaged in a single package for interface to multifiber ferrules. The distance between the devices is precisely defined photolithographically, thereby making alignment easier.

Abstract: A magnetic tunnel junction is fabricated by forming pinned and sense layers; and re-setting a magnetization vector of at least one of the layers.

Abstract: An active pixel array has the signal output of each pixel connected to a first column conductor, and a reset switch connected to a second column conductor. The first and second column conductors are connected to a read-reset amplifier. The read-reset amplifier operates in a first mode in which a reset voltage is applied to the second column line, and in a second mode in which pixel output signals are buffered from the first column line. The read-reset amplifier can also operate as a comparator forming part of an ADC circuit.

Abstract: A light emitting diode (LED) bulb includes a heat sink, a circuit layer having two opposite sides, multiple LEDs mounted on one side and an electrical insulating layer connected between the opposite side and the heat sink. Heat generated by the LEDs is conducted to the heat sink through the circuit layer and the electrical insulting layer and is dissipated quickly. Further, a fan can be mounted on the fins to dissipate heat from the heat sink more quickly. Therefore, the LED bulb has good heat dissipating efficiency.

Abstract: In a solid-state image-sensing device, an electric signal output from a photoelectric conversion circuit 100 is accumulated in a capacitor C1, and then a MOS transistor T5 is turned on so that the voltage integrated by the capacitor C1 is sampled in a MOS transistor T10. Thereafter, the electric charge obtained through amplification performed by the MOS transistor T10 flows into a capacitor C2, which performs integration so that a voltage commensurate with the integral of the amount of incident light appears at the capacitor C2.

Abstract: A TFT array structure formed on a glass substrate employs an aluminum alloy for the wiring patterns of signal lines and scanning lines. Besides, on the glass substrate, a terminal structure is formed near the terminating end of each of the wiring patterns. The terminal structure includes a terminal pattern which is formed of the same MoW layer as that of capacitor lines of the TFT array structure. Thus, the TFT array structure holds a repair facility equal to that of the prior art while realizing the enhancement of an operating speed and the reduction of image noise owing to the lowered resistances of the scanning lines and signal lines.

Abstract: A MOS or CMOS based photoconductor on active pixel image sensor. Thin layers of semi-conductor material, doped to PIN or NIP photoconducting layers, located above MOS and/or CMOS pixel circuits produce an array of layered photodiodes. Positive and negative charges produced in the layered photodiodes are collected and stored as electrical charges in the MOS and/or CMOS pixel circuits. The present invention also provides additional MOS or CMOS circuits for reading out the charges and for converting the charges into images. With the layered photodiode of each pixel fabricated as continuous layers of charge generating material on top of the MOS and/or CMOS pixel circuits, extremely small pixels are possible with almost 100 percent packing factors. MOS and CMOS fabrication techniques permit sensor fabrication at very low costs. In preferred embodiments all of the sensor circuits are incorporated on or in a single crystalline substrate along with the sensor pixel circuits.

Abstract: A semiconductor device having a photo diode which has substantially the same sensitivity to a plurality of light having different wavelengths, includes a first and a second conductivity type semiconductor layer formed at a surface layer portion of the first conductivity type semiconductor layer, wherein the sensitivity to light of a first wavelength and a second wavelength which is different from the first wavelength, are made substantially the same by designing a region in which a depletion layer spreads from a junction of the first and second conductivity type semiconductor layers and when an inverse bias is applied to the first and second conductivity type semiconductor layers, for example, by designing it to spread in a region of 3 to 6 &mgr;m or a region of 2 to 7 &mgr;m from the surface of the second conductivity type semiconductor layer in the depth direction.

Abstract: A Group III nitride compound semiconductor light-emitting element (flip chip type light-emitting element) provided with a p-side electrode and an n-side electrode formed on one surface side, wherein the p-side electrode includes: a first metal layer containing Ag and formed on a p-type semiconductor layer; a protective film with which the first metal layer except a part region is covered; and a second metal layer not containing Ag and formed on the protective film.

Abstract: An infrared photodetector structure with voltage-tunable and -switchable photoresponses constructed of superlattices and blocking barriers. The photoresponses of the double-superlattice structure are also insensitive to the operating temperature changes. By using GaAs/AlxGa1-xAs system, the feasibility of this idea is verified. In the embodiment, the photoresponses can be switched between 6˜8.5 and 7.5˜12 m by the bias polarity and are also tunable by the bias magnitude in each detection wavelength range. In addition, the photoresponses are insensitive to operating temperatures ranging from 20 to 80 K. For the SLIP with few periods, the responsivity may be higher than the one with many periods and the operational temperature is higher. These results show the invention can be useful in the design of multicolor imaging systems.

Abstract: A method for fabricating an electronic device includes the steps of: preparing a cavity defining sacrificial layer, at least the upper surface of which is covered with an etch stop layer; forming at least one first opening in the etch stop layer, thereby partially exposing the surface of the cavity defining sacrificial layer; etching the cavity defining sacrificial layer through the first opening, thereby defining a provisional cavity under the etch stop layer and a supporting portion that supports the etch stop layer thereon; and etching away a portion of the etch stop layer, thereby defining at least one second opening that reaches the provisional cavity through the etch stop layer and expanding the provisional cavity into a final cavity.

Abstract: A liquid crystal display panel of the invention is such that, in a pixel region defined by a region of the array substrate surrounded by a pair of image signal lines and a pair of scanning signal lines, of a line-shaped pixel electrode and a common electrode, the electrode that is disposed adjacent to and parallel to a signal line is made of an opaque conductor and at least one of the other electrodes is made of a transparent conductor. Adverse effects of the electric field formed between a signal line and an adjacent electrode thereto are suppressed and a sufficient aperture ratio is ensured by using a transparent conductor for the electrode contributing good display.

Abstract: A monolithic photodetector including a photodiode, a precharge MOS transistor, a control MOS transistor, and a read MOS transistor, the photodiode and the precharge transistor being formed in a same substrate of a first conductivity type, the photodiode including a first region of the second conductivity type formed under a second region of the first conductivity type more heavily doped than the substrate, and under a third region of the second conductivity type, more heavily doped than the first region, the second and third regions being separate, the first region forming the source region of the second conductivity type of the precharge MOS transistor, the second and third regions being connected, respectively, to a fixed voltage and to the gate of the control transistor.

Abstract: An image sensor with improved productivity and sensitivity is provided. The image sensor includes a plurality of unit pixels, each unit pixel including an oxide film formed upon a semiconductor substrate; a gate electrode formed on the oxide film; a photodiode N-type region formed within the semiconductor substrate and interfacing with the oxide film, which is space apart from the gate electrode by a predetermined distance and disposed on one side of the gate electrode; and a floating diffusion region formed within the semiconductor substrate and interfacing with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and is disposed on the other side of the gate electrode.

Abstract: A method and system for providing a magnetic memory is disclosed. The magnetic memory includes a magnetic element. The magnetic element is written using a first write line and a second write line and resides at an intersection between the first and second write lines. The second write line is oriented at an angle to the first write line. The second write line has a top and at least one side. At least a portion of the second write line is covered by an insulating layer. A magnetic layer covers a portion of the insulating layer. The portion of the insulating layer resides between the magnetic layer and the second write line. The magnetic layer includes a soft magnetic material.

Abstract: A sensor may be formed with a transistor comprising a gate that has both n-type and p-type regions to increase the gate work function. In combination with moving the p-type well such that the p-type well only partially dopes the channel of the transistor, the increased gate work function further increases the reset voltage level required to create the reset channel without having to use high doping levels in the critical regions of the sensor structure including the photo-detector and the reset transistor. The source of the reset transistor is partially beneath the n-type region of gate, while the transistor's drain is partially beneath the p-type region of the gate. The channel has a p-type well portion and a substrate portion. This construction of the sensor may eliminate the reset noise associated with the uncertainty of whether the charge left in the transistor's channel will flow back towards the photo-detector after the transistor has been turned off.

Abstract: Improved pixel circuits are disclosed for high fill-factor large area imager systems using continuous (e.g., amorphous silicon) sensor layers. A first approach prevents crosstalk by ensuring that each pixel is not able to go into saturation. A second approach employs a cascode transistor to maintain the bias of the sensor contact at a constant potential regardless of illumination condition. These two approaches may be combined. A resistive film connecting the pixel contacts may be used in conjunction with the second approach to prevent aliasing of signal and noise.

Abstract: A semiconductor device includes the following: a semiconductor substrate of a first conduction type; an intrinsic semiconductor layer of the first conduction type formed on the semiconductor substrate; a first semiconductor layer of a second conduction type formed on the intrinsic semiconductor layer; a first impurity layer of the first conduction type formed in the first semiconductor layer of the second conduction type; and a bipolar transistor and a MIS transistor formed in the first semiconductor layer of the second conduction type. The laminated structure of the semiconductor substrate, the intrinsic semiconductor layer, and the first semiconductor layer provides a diode for photoelectric conversion. A first insulator layer and a second insulator layer are formed respectively in at least a portion below the bipolar transistor and the MIS transistor.

Abstract: An electrical-supply-free MOS integrated circuit is described. The circuit comprises: a first semiconductor device having a first current terminal, a first input voltage terminal, and a first common terminal, said semiconductor device having a voltage between said first input voltage terminal and said first common terminal that controls a current flow leaving said first current terminal; and a first opto-electronic device having a first anode connected to said first current terminal and a first cathode connected to a ground to convert an input of incident light into an electrical signal, said first opto-electronic device having photodiode and photovoltaic cell capabilities; wherein a voltage is set between a node of said first current terminal and said first common terminal. The principle of the circuit operation can be used for developing optically controlled electrical-supply-free very large scale integrated circuits (VLSI) at low-cost.

Abstract: A CMOS image sensor for improving a characteristic of transmittance therein is provided by forming a convex-shaped color filter pattern that acts as a micro-lens. The CMOS image sensor includes a semiconductor structure having a photodiode and a peripheral circuit, an insulating layer that is formed on the semiconductor structure and that has a trench, and a convex-shaped color filter pattern formed on the insulating layer and covering the trench.

Abstract: A first buried layer of one conductivity and a first well region of opposite conductivity are formed in a semiconductor layer using a first mask. A second mask is used to form a second buried layer and a second well region of the opposite conductivity and to introduce impurity of the one conductivity type into a surface of the second well to form a channel doped layer of the one conductivity. A high concentration buried layer of the opposite conductivity is formed by introducing opposite conductivity impurity into the second well region using a third mask. A gate insulating film is formed on the semiconductor layer by thermal oxidation. A source region and a drain region of the one conductivity type are formed on the surface of the second well region, on both sides of a gate electrode.

Abstract: An evanescently coupled photodiode of the invention has a semiconductor substrate 1, a guide layer 3 being greater in refractive index than the semiconductor substrate, and an absorption layer 4 on a partial area of said guide layer formed in it. The mesa width of a PD region in which the absorption layer and the guide layer are formed is made wider at a part where the density of a photoelectric current is higher when the photodiode operates and more narrow at a part where the density of a photoelectric current is lower.

Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.

Abstract: The present invention discloses a light-emitting diode with enhanced brightness and a method for fabricating the same. The light-emitting diode comprises: an epitaxial LED structure having at least one lighting-emitting active layer with a plurality of spacers inside the lighting-emitting active layer; at least one conductive contact, formed on the bottom surface where no spacer is formed inside the lighting-emitting active layer; a transparent material layer formed in the spacers; an adhesion layer formed between the transparent material layer and a permanent substrate; a bottom electrode formed on the bottom surface of the permanent substrate; and an opposed electrode formed on the top surface of the epitaxial LED structure.

Abstract: There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

Abstract: A non-gated diode structure of a silicon-on-insulator, having a silicon-on-insulator substrate, a pair of isolating structures, a first type doped region and a second type doped region. The silicon-on-insulation substrate has a stack of a substrate, an insulation layer and a silicon layer. The isolating structures are located in the silicon layer to define a well region. The first and second type doped regions are located in the well and are adjacent to the isolating structures. Such a non-gated diode structure can be applied to an electrostatic discharge protection circuit to increase the electrostatic discharge protection voltage or current. In addition, a fabrication method of the non-gated diode is also introduced. This non-gated diode can be also fabricated in the general bulk CMOS process, and used in the on-chip ESD protection circuits.

Abstract: A new method is provided for the creation of Input/Output connection points to a semiconductor device package. An extension is applied to the conventional I/O connect points of a semiconductor device, allowing the original I/O point location to be relocated to a new point of I/O interconnect that may be in the vicinity of the original point of I/O interconnect but can also be located at a distance from this original point of I/O interconnect. Layers of passivation and polyimide are provided for proper creation and protection of the extended and relocated I/O pads. Wire bonding is used to further interconnect the relocated I/O pads.

Abstract: The present invention includes a semiconductor epitaxial structure optimized for photoconductive free space terahertz generation and detection; and amplifier circuits for photoconductively sampled terahertz detection which may employ the optimized epitaxial structures.

Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.

Abstract: A method for characterizing the quality of the interface between a silicon and a gate insulator in a MOS device includes the steps of: applying at least one current to the MOS device through the gate; detecting at least one electroluminescent signal corresponding to the silicon bandgap energy after the current flows through the MOS device; and outputting the electroluminescent waveform in the time domain. The quality of the interface between a silicon and a gate insulator in the MOS device is determined by analyzing the minority carrier lifetime in silicon. The invention also discloses a characterization system for implementing the method.

Abstract: A reset device detects a rise of a supply voltage to start outputting a reset signal. The reset device includes a voltage detection circuit for detecting the supply voltage. The voltage detection circuit includes a ferroelectric capacitance element for detecting the supply voltage.

Abstract: A digital color image sensor is disclosed having an elevated two-color photo-detector in combination with a single-color photo-detector. At least part of the circuitry associated with the two-color photo-detector may be integrated under the single-color photo-detector, which results in a smaller and less expensive photo-detector for a color image sensor. In addition, the two-color photo-detector photo-detectors are electrically isolated from each other, thereby improving the dynamic range of each photo-detector. The isolation is achieved by implementing one of the photo-detectors of the two-color photo-detector within the bulk silicon and elevating the other photo-detector of the two-color photo-detector above the bulk silicon.

Abstract: The present invention is a solid state detector that has internal gain and incorporates a special readout technique to determine the input position at which a detected signal originated without introducing any dead space to the active area of the device. In a preferred embodiment of the invention, the detector is a silicon avalanche photodiode that provides a two dimensional position sensitive readout for each event that is detected.

Abstract: A novel photodetector CMOS-compatible photodetector is disclosed in which photo-generation of carriers (electrons) is carried out in the metal of the electrodes, rather than as electron-hole pairs in the semiconductor on which the metal electrodes are deposited. The novel photo detector comprises a silicon or other semiconductor substrate material characterized by an electron energy bandgap, and a pair of metal electrodes disposed upon a surface of the silicon to define therebetween a border area of the surface. One of the two electrodes being exposed to the incident radiation and covering an area of said surface which is larger than the aforesaid border area, the aforesaid metal of the electrodes being characterized by a Fermi level which is within said electron energy bandgap.

Abstract: A MOS type image sensor has an image area that consists of a matrix of pixels and a peripheral circuitry area that drives the image area.

Abstract: A display device using a novel semiconductor device, which includes a pixel matrix, an image sensor, and a peripheral circuit for driving those, that is, which has both a camera function and a display function, and is made intelligent, is provided and a method of manufacturing the same is also provided. One pixel includes a semiconductor device for display and a semiconductor for light reception, that is, one pixel includes semiconductor devices (insulated gate-type field effect semiconductor device) for controlling both display and light reception, so that the display device having a picture reading function is made miniaturized and compact.

Abstract: A method is provided to produce thin film transistors (TFTs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize the amorphous silicon to form a film with a preferred crystal orientation. A gate is formed overlying the polycrystalline film. The polycrystalline film is doped to produce source and drain regions.

Abstract: A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

Abstract: A monolithic photodetector including a photodiode, a precharge MOS transistor, a control MOS transistor, and a read MOS transistor, the photodiode and the precharge transistor being formed in a same substrate of a first conductivity type, the photodiode including a first region of the second conductivity type formed under a second region of the first conductivity type more heavily doped than the substrate, and under a third region of the second conductivity type, more heavily doped than the first region, the second and third regions being separate, the first region forming the source region of the second conductivity type of the precharge MOS transistor, the second and third regions being connected, respectively, to a fixed voltage and to the gate of the control transistor.

Abstract: A semiconductor device comprising bolometers arranged in two-dimensional form corresponding to pixels for converting incoming infrared rays into electrical signals includes vertical switches, a vertical shift register, horizontal switches, and a horizontal shift register as means for selecting an arbitrary pixel. The semiconductor device is configured to allow an overcurrent to be supplied to a bolometer in a pixel selected by those means.

Abstract: An active photodiode CMOS image sensor comprising a light-sensitive photodiode region, a transistor and a cover layer. The light-sensitive region is formed in a substrate body and the transistor is formed above the substrate body. The source region of the transistor is connected to the light-sensitive region. The cover layer is formed above the light-sensitive photodiode region using a method similar to method used to form the gate dielectric layer.