Particular Barrier Material Patents (Class 257/35)
  • Patent number: 5424281
    Abstract: An oxide-superconducting device comprises first and second electrodes of oxide-superconductor which are connected through a tunnel barrier layer. The oxide-superconductor is formed on a substrate having a recess, and it includes grain boundaries along the recess. The tunnel barrier layer is formed along the grain boundaries, and it is made of any material of an element F, Cl, Br, I, C, O, S, P or N, a mixture consisting of such elements, and a compound containing such an element, the material being introduced into the grain boundaries and/or lattice interstices near the grain boundaries.
    Type: Grant
    Filed: January 26, 1993
    Date of Patent: June 13, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Tarutani, Ushio Kawabe
  • Patent number: 5422497
    Abstract: A superconducting device includes a first thin film of oxide superconductor material formed on a substrate, a second thin film of insulator material stacked on the first thin film of oxide superconductor material, and a third thin film of oxide superconductor material formed on the second thin film of insulator material. The second thin film of insulator material is formed of an amorphous oxide including the same constituent elements as those of the oxide superconductor material of the first thin film. The second thin film of insulator material is formed by heat-treating the first thin film of oxide superconductor material in a gaseous atmosphere bringing a surface of the oxide superconductor material into an amorphous condition, after the first thin film of oxide superconductor material has been formed on the substrate.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: June 6, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Mitsuchika Saitoh, Sou Tanaka, Michitomo Iiyama
  • Patent number: 5416072
    Abstract: A superconducting device has a superconducting channel formed of an oxide superconductor on the principal surface of a substrate. A source electrode and a drain electrode likewise formed of oxide superconductor, are electrically connected by the channel to provide for superconducting current flow. A superconducting gate electrode is isolated by a side insulating region which completely covers each of opposite side surfaces of the gate electrode. The relative thicknesses of both the source and drain electrodes are much greater than that of the channel thickness. The superconducting channel and the gate insulator are both formed by one oxide thin film, and in a preferred embodiment, the gate electrode likewise is provided by the same film which forms the gate insulator and channel.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: May 16, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Takao Nakamura, Michitomo Iiyama
  • Patent number: 5413982
    Abstract: A superconducting device comprising a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, an extremely thin superconducting channel formed of a c-axis oriented oxide superconductor thin film on the non-superconducting oxide layer, a superconducting source region and a superconducting drain region formed of an a-axis oriented oxide superconductor thin film at the both sides of the superconducting channel separated from each other, which are electrically connected each other by the superconducting channel, so that superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region, and a gate electrode of a material which includes silicon through a gate insulator on the superconducting channel for controlling the superconducting current flowing through the superconducting channel, in which the gate electrode is embedded between the supercondu
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: May 9, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, So Tanaka, Michitomo Iiyama
  • Patent number: 5401530
    Abstract: A process for producing a Josephson device is disclosed, wherein a Josephson junction is formed over a recess step by oblique deposition and a protective layer of conducting material or semiconducting material is formed on the Josephson junction. The actual thickness of the Josephson junction is controlled to be smaller due to the proximity effect.
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: March 28, 1995
    Assignee: Osaka Gas Company, Ltd.
    Inventors: Itsuro Tamura, Satoshi Fujita, Masao Wada
  • Patent number: 5399546
    Abstract: A superconducting device comprises a substrate, a non-superconducting layer formed in a principal surface of said substrate, an extremely thin superconducting channel formed of an oxide superconductor thin film on the non-superconducting layer. A superconducting source region and a superconducting drain region of a relatively thick thickness are formed of the oxide superconductor at the both sides of the superconducting channel separated from each other but electrically connected through the superconducting channel, so that a superconducting current can flow through the superconducting channel between the superconducting source region and the superconducting drain region.
    Type: Grant
    Filed: November 30, 1992
    Date of Patent: March 21, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takao Nakamura, Michitomo Iiyama
  • Patent number: 5367178
    Abstract: A microbridge superconductor device includes a substrate, made of a material such as LaAlO.sub.3, having a lower planar substrate surface, an inclined surface having an overall upward inclination of from about 20 to about 80 degrees from the plane of the lower planar substrate surface, and an upper planar substrate surface parallel to the lower planar substrate surface and separated from the lower planar substrate surface by the inclined surface. A layer of a c-axis oriented superconductor material, made of a material such as YBa.sub.2 Cu.sub.3 O.sub.7-x, is epitaxially deposited on the lower planar substrate surface, and has an exposed a-axis edge adjacent the intersection of the lower planar substrate surface with the inclined surface. The a-axis exposed edge is beveled away from the intersection. A layer of a c-axis oriented superconductor material is epitaxially deposited on the upper planar substrate surface, and has an exposed a-axis edge adjacent the inclined surface.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: November 22, 1994
    Assignee: Biomagnetic Technologies, Inc.
    Inventors: Mark S. DiIorio, Shozo Yoshizumi, Kai-Yueh Yang
  • Patent number: 5366953
    Abstract: A novel method of producing weak-link grain boundary Josephson junctions in high temperature superconducting thin films is disclosed. These junctions are reliably and reproducibly formed on uniform planar substrates (10) by the action of a seed layer (40) placed intermediate the substrate (10) and the superconductor film (20). The superconductor film (22) grown atop the seed (42) is misoriented from the rest of the film (24) by an angle between 5.degree. and 90.degree.. The grain boundary (30) so formed acts as a high quality weak-link junction for superconductor devices. The performance of these junctions can be improved by the addition of buffer layers (50, 60) between the substrate (10) and the superconductor film (20).
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: November 22, 1994
    Assignee: Conductus, Inc.
    Inventors: Kookrin Char, Stephen M. Garrison, Nathan Newman, Gregory G. Zaharchuk
  • Patent number: 5362709
    Abstract: A superconducting tunnel junction is disclosed herein. The superconducting tunnel junction is characterized in that a pair of oxide superconducting layers thereof and a tunnel barrier layer located between the oxide superconducting layers have the same or almost the same crystal structure and the same or almost the same lattice constant in a direction of a, b, or c axis. The layers have good crystallization.
    Type: Grant
    Filed: October 22, 1991
    Date of Patent: November 8, 1994
    Assignee: Semiconductor Energy Laboratory, Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 5358925
    Abstract: An HTSC material epitaxially deposited on a YSZ buffer layer on a surface of a monocrystalline silicon substrate has a zero resistance transition temperature of at least 85.degree. K., a transition width (10-90%) of no more than 1.0.degree. K., a resistivity at 300.degree. K. of no more than 300 micro-ohms-centimeter and a resistivity ratio (at 300.degree. K./100.degree. K.) of 3.0.+-. 0.2. The surface of the silicon substrate is cleaned using a spin-etch process to produce an atomically clean surface terminated with an atomic layer of an element such as hydrogen with does not react with silicon. The substrate can be moved to a deposition chamber without contamination. The hydrogen is evaporated in the chamber, and then YSZ is epitaxially deposited preferably by laser ablation. Thereafter, the HTSC material, such as YBCO, is epitaxially deposited preferably by laser ablation. The structure is then cooled in an atmosphere of oxygen.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: October 25, 1994
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventors: George A. Neville Connell, David B. Fenner, James B. Boyce, David K. Fork
  • Patent number: 5326988
    Abstract: A superconducting device including first and second trenches formed on a principal surface of a semiconductor substrate, separated from each other, and first and second superconductor electrodes filled in the first and second trenches and planarized to have a surface coplanar with the principal surface of the semiconductor substrate. The first and second superconductor electrodes form a separation zone which is defined by opposing sides of the first and second superconductor electrodes. An insulating layer is formed to cover a portion of the first superconductor electrode, the separation zone and a portion of the second superconductor electrode, and a gate electrode is formed on the insulating layer so as to be positioned above at least the separation zone.
    Type: Grant
    Filed: December 29, 1992
    Date of Patent: July 5, 1994
    Assignee: NEC Corporation
    Inventor: Ichiro Ishida
  • Patent number: 5324714
    Abstract: A method, and the resulting structure, of growing a superconducting perovskite thin film of, for example, YBa.sub.2 Cu.sub.3 O.sub.7-x. A buffer layer of, for example, the perovskite PrBa.sub.2 Cu.sub.3 O.sub.7-y, is grown on a crystalline (001) substrate under conditions which favor growth of a,b-axis oriented material. Then the YBa.sub.2 Cu.sub.3 O.sub.7-x layer is deposited on the buffer layer under changed growth conditions that favor growth of c-axis oriented material on the substrate, for example, the substrate temperature is raised by 110.degree. C. However, the buffer layer acts as a template that forces the growth of a,b-axis YBa.sub.2 Cu.sub.3 O.sub.7-x, which nonetheless shows a superconducting transition temperature near that of c-axis oriented films.
    Type: Grant
    Filed: May 19, 1993
    Date of Patent: June 28, 1994
    Assignee: Bell Communications Research, Inc.
    Inventors: Arun Inam, Ramamoorthy Ramesh, Charles T. Rogers, Jr.
  • Patent number: 5321276
    Abstract: A superconducting tunnel junction radiation sensing device includes first and second superconductor electrodes and a tunnel barrier layer interposed therebetween. The tunnel barrier layer is made up of a thin-wall portion and a thick-wall portion each formed of a semiconductor or an insulator, and each having opposite surfaces respectively contacting the first and second superconductor electrodes, and each extending adjacent each other in a same horizontal plane between the first and second electrodes. The thick-wall portion has a vertical thickness which is at least twice that of the thin-wall portion. Furthermore, the thickness of the thin-wall portion is such that a tunnel effect is enabled therethrough form the first electrode to the second electrode, and the thickness of the thick-wall portion is such that a tunnel effect is substantially prohibited therethrough from the first electrode to the second electrode.
    Type: Grant
    Filed: October 1, 1991
    Date of Patent: June 14, 1994
    Assignee: Nippon Steel Corporation
    Inventors: Masahiko Kurakado, Atsuki Matsumura, Takeshi Kaminaga, Tooru Takahashi
  • Patent number: 5313074
    Abstract: In a Josephson device which can be employed as a sensor including superconductor for measuring an extremely weak magnetic field, a Josephson junction consisting of superconducting material is formed, and a covering layer consisting of ordinary conducting metal or semiconductor is formed on the Josephson junction. This enables the Josephson junction to be isolated from the oxidized atmosphere. Further, the covering layer is not to present any deterioration such as cracks even upon being subjected to a thermal hysteresis from very low temperature to ordinary temperature.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: May 17, 1994
    Assignee: Osaka Gas Company Limited
    Inventors: Itsuro Tamura, Satoshi Fujita, Masao Wada
  • Patent number: 5310706
    Abstract: A method for manufacturing a high Tc superconducting circuit elements is disclosed, which comprises the steps of preparing a single crystal conductive substrate of Sr.sub.2 RuO.sub.4 by a floating zone melting process; epitaxially growing on the (001)-surface of the Sr.sub.2 RuO.sub.4 substrate a high Tc copper oxide-based superconducting film with a thickness of 1 to 1000 nm; depositing metal pads onto said superconducting film to form electrical contacts; and applying a metal pad to the surface of the substrate to form an electrical contact.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: May 10, 1994
    Assignee: International Business Machines Corporation
    Inventors: Frank Litchenberg, Jochen Mannhart, Darrell Schlom
  • Patent number: 5306705
    Abstract: A non-linear superconducting junction device comprising a layer of high transient temperature superconducting material which is superconducting at an operating temperature, a layer of metal in contact with the layer of high temperature superconducting material and which remains non-superconducting at the operating temperature, and a metal material which is superconducting at the operating temperature and which forms distributed Sharvin point contacts with the metal layer.
    Type: Grant
    Filed: May 6, 1993
    Date of Patent: April 26, 1994
    Assignee: Board of Trustees of the Leland Stanford Junior University
    Inventors: Matthew J. Holcomb, William A. Little
  • Patent number: 5304538
    Abstract: Epitaxial heterojunctions formed between high temperature superconductors and metallic or semiconducting oxide barrier layers are provided. Metallic perovskites such as LaTiO.sub.3, CaVO.sub.3, and SrVO.sub.3 are grown on electron-type high temperature superconductors such as Nd.sub.1.85 Ce.sub.0.15 CuO.sub.4-x. Alternatively, transition metal bronzes of the form A.sub.x MO.sub.3 are epitaxially grown on electron-type high temperature superconductors. Also, semiconducting oxides of perovskite-related crystal structures such as WO.sub.3 are grown on either hole-type or electron-type high temperature superconductors.
    Type: Grant
    Filed: March 11, 1992
    Date of Patent: April 19, 1994
    Assignee: The United States of America as repeated by the Administrator of the National Aeronautics and Space Administration
    Inventors: Richard P. Vasquez, Brian D. Hunt, Marc C. Foote
  • Patent number: 5304539
    Abstract: A beam (e.g. a focused laser beam) is utilized to irradiate the entire lateral width of a limited-extent portion of an elongated superconducting thin-film lead. The irradiated portion is converted to be non-superconducting and photoconductive. The converted portion constitutes a photodetector integrated with associated superconducting leads.
    Type: Grant
    Filed: May 12, 1992
    Date of Patent: April 19, 1994
    Assignee: Bell Communications Research, Inc.
    Inventors: Silas J. Allen, Robert R. Krchnavek
  • Patent number: 5298767
    Abstract: A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.
    Type: Grant
    Filed: October 6, 1992
    Date of Patent: March 29, 1994
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Joseph S. Shor, Anthony D. Kurtz
  • Patent number: 5291274
    Abstract: An electron device comprises a first dielectric layer (103) having a first thickness determined to allow the tunneling of carriers therethrough and a first dielectric constant, a second dielectric layer (104) provided in contact with the first dielectric layer, the second dielectric layer having a second thickness substantially larger than the first thickness and a second dielectric constant that is substantially larger than the first dielectric constant, a first electrode (101) provided on the first dielectric layer for injecting the carriers, and a second electrode (108) provided in contact with the second dielectric layer for controlling a flow of the carriers through the second dielectric layer in response to a control voltage supplied thereto.
    Type: Grant
    Filed: November 20, 1991
    Date of Patent: March 1, 1994
    Assignee: Fujitsu Limited
    Inventor: Hirotaka Tamura
  • Patent number: 5291035
    Abstract: A microelectronic component comprising a crossover is provided comprising a substrate, a first high T.sub.c superconductor thin film, a second insulating thin film comprising SrTiO.sub.3 ; and a third high T.sub.c superconducting film which has strips which crossover one or more areas of the first superconductor film. An in situ method for depositing all three films on a substrate is provided which does not require annealing steps and which can be opened to the atmosphere between depositions.
    Type: Grant
    Filed: March 10, 1993
    Date of Patent: March 1, 1994
    Assignee: The Regents of the University of California
    Inventors: Frederick C. Wellstood, John J. Kingston, John Clarke
  • Patent number: 5272357
    Abstract: A semiconductor device comprises;a collector region of first conductivity type;a base region of second conductivity type;an emitter region of the first conductivity type; a thin film provided on the emitter region and capable of flowing therein a tunnel current; anda polycrystalline layer laminated on the thin film. An energy .DELTA..phi..sub.B of potential barrier formed at a grain boundary is not less than a heat energy kT at a temperature therein.
    Type: Grant
    Filed: October 23, 1991
    Date of Patent: December 21, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masakazu Morishita
  • Patent number: 5266558
    Abstract: These superconducting circuit elements, namely SNS heterostructures, such as, e.g. Josephson junctions and field-effect transistors, have a sandwich structure consisting of at least one layer of high-T.sub.c superconductor material arranged adjacent to a metallic substrate, possibly with an insulating layer in between, the substrate, the superconductor and--if present--the insulator all consisting of materials having at least approximately matching molecular structures and lattice constants. Electrical contacts, such as source, drain and gate electrodes are attached to the superconductor layer and to the substrate, respectively. The electrically conductive substrate consists of a metallic oxide such as strontium ruthenate Sr.sub.2 RuO.sub.4, whereas the superconductor layer is of the copper oxide type and may be YBa.sub.2 Cu.sub.3 O.sub.7-.delta., for example. The insulator layer (10) may consist of SrTiO.sub.3.
    Type: Grant
    Filed: February 27, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Frank Lichtenberg, Jochen Mannhart, Darrell Schlom
  • Patent number: 5256636
    Abstract: A microelectronic component comprising a crossover is provided comprising a substrate, a first high T.sub.c superconductor thin film, a second insulating thin film comprising SrTiO.sub.3 ; and a third high T.sub.c superconducting film which has strips which crossover one or more areas of the first superconductor film. An insitu method for depositing all three films on a substrate is provided which does not require annealing steps. The photolithographic process is used to separately pattern the high T.sub.c superconductor thin films.
    Type: Grant
    Filed: September 21, 1990
    Date of Patent: October 26, 1993
    Assignee: The Regents of the University of Calif.
    Inventors: Frederick C. Wellstood, John J. Kingston, John Clarke
  • Patent number: 5256897
    Abstract: An oxide superconducting device has a junction structure composed of at least one oxide superconductor and at least one insulator in which carriers have been generated. As the insulator in which carriers have been generated, there can be used, for example, SrTiO.sub.3 doped with Nb. With such a device, rectifying characteristics can be attained in the junction.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: October 26, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Haruhiro Hasegawa, Toshiyuki Aida, Toshikazu Nishino, Mutsuko Hatano, Hideaki Nakane, Tokuumi Fukazawa
  • Patent number: 5250817
    Type: Grant
    Filed: August 12, 1992
    Date of Patent: October 5, 1993
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: Richard L. Fink
  • Patent number: 5247189
    Abstract: A tunnel junction type superconducting device includes a pair of superconductor electrodes formed of compound oxide superconductor material, and a metal layer of a high electric conductivity formed between the pair of superconductor electrodes so as to maintain the pair of superconductor electrodes separate from each other. The pair of superconductor electrodes is separated from each other by a distance within a range of 3 nm to 70 nm by action of the metal layer.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: September 21, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Saburo Tanaka, Hideo Itozaki, Shuji Yazu
  • Patent number: 5244870
    Abstract: The disclosed superconductive optoelectronic device stems from the inventor's important discovery of a phenomenon that the basic substance Cu.sub.2 O reveals photoconductivity below several temperatures T.sub.ps in steps thereof, T.sub.ps being comparable with a series of the critical temperatures of superconductivity T.sub.sc of relevant Cu-based superconductors, and such photoconductivity of the basic substance is in a conjugate relationship with the superconductivity of the above Cu-based superconductors. The device of the invention has a gate region made of the above basic substance Cu.sub.2 O and a source region and a drain region made of the above Cu-based superconductors, the source and drain regions connected to each other, so that electric current therebetween at a temperature below the step temperature T.sub.ps of the basic substance is switched and/or controlled by the incident light intensity illuminated to the gate region.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: September 14, 1993
    Assignee: The University of Tokyo
    Inventor: Taizo Masumi
  • Patent number: 5241191
    Abstract: A cubic perovskite crystal structure is disclosed satisfying the unit cell formula:R.sub.0.33+z A.sub.0.67 C.sub.1-y O.sub.3-xwhereR, A and C represent rare earth, alkaline earth and copper atoms, respectively, capable of forming a superconductive R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure;x is 0.67 to 1.0;y is up to 0.2; andz is up to 0.1.The crystal structure can be used to form superconductive superlattices and weak links for Josephson junction devices. The crystal structure can be produced by laser ablation deposition at a temperature below that required for the formation of a superconductive R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure. The crystal structure can be used as a substrate for the subsequent deposition of an R.sub.1 A.sub.2 C.sub.3 orthorhombic perovskite crystal structure.
    Type: Grant
    Filed: December 31, 1991
    Date of Patent: August 31, 1993
    Assignee: Eastman Kodak Company
    Inventors: John A. Agostinelli, Samuel Chen
  • Patent number: 5240906
    Abstract: An inverted MISFET structure with a high transition temperature superconducting channel comprises a gate substrate, an interfacial layer with one or more elements of the VIII or IB subgroup of the periodic table of elements, an insulating layer and a high transition temperature superconducting channel. An electric field, generated by a voltage applied to its gate alters the conductivity of the channel.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: August 31, 1993
    Assignee: International Business Machines Corporation
    Inventors: Johannes G. Bednorz, Jochen D. Mannhart, Carl A. Mueller, Darrell Schlom
  • Patent number: 5232905
    Abstract: A superconducting device has a structure of superconductor - normal-conductor (semiconductor) - superconductor. The superconductors constituting the superconducting device are made of a super-conducting oxide material of K.sub.2 NiF.sub.4 type crystalline structure or perovskite type crystalline structure which contains at least one element selected from the group consisting of Ba, Sr, Ca, Mg and Ra; at least one element selected from the group consisting of La, Y, Ce, Sc, Sm, Eu, Er, Gd, Ho, Yb, Nd, Pr, Lu and Tb; Cu; and O.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: August 3, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshikazu Nishino, Haruhiro Hasegawa, Ushio Kawabe
  • Patent number: 5198413
    Abstract: An oxide-superconducting device comprises first and second electrodes of oxide-superconductor which are connected through a tunnel barrier layer. The oxide-superconductor is formed on a substrate having a recess, and it includes grain boundaries along the recess. The tunnel barrier layer is formed along the grain boundaries, and it is made of any material of an element F, Cl, Br, I, C, O, S, P or N, a mixture consisting of such elements, and a compound containing such an element, the material being introduced into the grain boundaries and/or lattice interstices near the grain boundaries.
    Type: Grant
    Filed: November 13, 1991
    Date of Patent: March 30, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinobu Tarutani, Ushio Kawabe
  • Patent number: 5179070
    Abstract: A semiconductor substrate such as silicon single crystal having a thin film of a superconducting material composed of a compound oxide whose critical temperature is higher than 30 K such as Ln.sub.1 Ba.sub.2 Cu.sub.3 O.sub.7-.delta. (Ln is Y or lanthanide), characterized in that a buffer layer composed of ZrO.sub.2, MgO containing or not containing metal element such as Ag is interposed between the semiconductor substrate and the superconducting thin film.
    Type: Grant
    Filed: July 2, 1991
    Date of Patent: January 12, 1993
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keizo Harada, Hideo Itozaki, Naoji Fujimori, Shuji Yazu, Tetsuji Jodai
  • Patent number: 5179426
    Abstract: A transistor structure which utilizes the Josephson effect and/or tunneling effect. The Josephson transistors of the invention are composed of superconductive films and tunneling films and work at a high speed with a low energy consumption. They are suitable for the construction of integrated circuits, especially digital circuits.
    Type: Grant
    Filed: August 1, 1988
    Date of Patent: January 12, 1993
    Assignee: Seiko Epson Corporation
    Inventor: Seiichi Iwamatsu