With Optical Shield Or Mask Means Patents (Class 257/435)
  • Patent number: 11973093
    Abstract: A single photon avalanche (SPAD) device configured to detect visible to infrared light includes a substrate and a trench coupled to the substrate. The trench has a lattice mismatch with the substrate and has a height equal to or greater than its width. The device further includes a substantially defect-free semiconductor region that includes photosensitive material. The semiconductor region includes a well coupled to the trench and doped a first type. The well is configured to detect a photon and generate a current. The semiconductor region also includes a region formed in the well and doped a second type opposite to the first type. The well is configured to cause an avalanche multiplication of the current. The trench and the well form a first electrode and the region forms a second electrode.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 30, 2024
    Assignee: SEMIKING LLC
    Inventors: Clifford Alan King, Anders Ingvar Aberg
  • Patent number: 11843019
    Abstract: A pixel includes a semiconductor substrate, a low-? dielectric, and a photodiode region in the semiconductor substrate. The semiconductor substrate has a substrate top surface that forms a trench. The trench extends into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The low-? dielectric is in the trench between the trench depth and a low-? depth with respect to the planar region. The low-? depth is less than the trench depth. The photodiode region is in the semiconductor substrate and includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench. The top photodiode section begins at a photodiode depth, with respect to the planar region, that is less than the low-? depth, and extends toward and adjoining the bottom photodiode section.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: December 12, 2023
    Assignee: Omni Vision Technologies, Inc.
    Inventors: Hui Zang, Cunyu Yang, Gang Chen
  • Patent number: 11839117
    Abstract: An organic light emitting diode display includes a substrate, a plurality of pixels disposed on the substrate, a plurality of transmissive windows spaced apart from the pixels, and a light blocking member disposed between one of the pixels and one of the transmissive windows. The pixels display an image, and light is transmitted through the transmissive windows. Each pixel includes a transistor including a plurality of electrode members disposed in different layers on the substrate. The light blocking member includes a plurality of light blocking sub-members respectively disposed in the same layers as the plurality of electrode members.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: December 5, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kohei Ebisuno, Yong Ho Yang, Jun Hee Lee, Nak Cho Choi
  • Patent number: 11830900
    Abstract: Provided is a back illuminated photoelectric conversion device including a semiconductor substrate that has a first area that is not light-shielded by a light shielding layer, a second area that is light-shielded by the light shielding layer and in which a second pixel is arranged, and a third area that is arranged between the first area and the second area in a plan view. An attenuating member that attenuates a guided light entering the first area and propagating to the second area with the semiconductor substrate as a waveguide is arranged in the third area.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: November 28, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yasuhiro Nagatomo
  • Patent number: 11810941
    Abstract: A three-dimensional (3D) image sensor includes a first substrate having an upper pixel. The upper pixel includes a photoelectric element and first and second photogates connected to the photoelectric element. A second substrate includes a lower pixel, which corresponds to the upper pixel, that is spaced apart from the first substrate in a vertical direction. The lower pixel includes a first transfer transistor that transmits a first signal provided by the first photogate. A first source follower generates a first output signal in accordance with the first signal. A second transfer transistor transmits a second signal provided by the second photogate. A second source follower generates a second output signal in accordance with the second signal. First and second bonding conductors are disposed between the first and second substrates and electrically connect the upper and lower pixels.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: November 7, 2023
    Inventors: Min-Sun Keel, Doo Won Kwon, Hyun Surk Ryu, Young Chan Kim, Young Gu Jin
  • Patent number: 11791353
    Abstract: A solid state imaging device that includes a phase difference detection pixel which is a pixel for phase difference detection; a first imaging pixel which is a pixel for imaging and is adjacent to the phase difference detection pixel; and a second imaging pixel which is a pixel for imaging other than the first imaging pixel. An area of a color filter of the first imaging pixel is smaller than an area of a color filter of the second imaging pixel.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: October 17, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Hiroshi Tayanaka, Yuuji Inoue, Masashi Nakata
  • Patent number: 11735619
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yun-Wei Cheng
  • Patent number: 11737341
    Abstract: According to one embodiment, a detection device comprises a base, a sensor layer, a collimator, a plurality of lenses, and a spacer. The sensor layer is placed on the base and includes a plurality of sensors which output detection signals corresponding to incident light. The collimator layer is placed on the sensor layer and includes a collimator having a plurality of openings which overlap the sensors, respectively. The plurality of lenses are placed on the collimator layer and overlap the openings, respectively. The spacer protrudes more than the lenses in a stacking direction of the base, the sensor layer and the collimator layer.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: August 22, 2023
    Assignee: Japan Display Inc.
    Inventors: Tomoyuki Ito, Jin Hirosawa
  • Patent number: 11705473
    Abstract: An imaging device includes a photodetector and an optical filter disposed on a light-receiving surface of the photodetector. The optical filter may include a diffraction grating, a core layer, and a reflector disposed on first and second opposing sides of the core layer. In some cases, the optical filter (e.g., a GMR filter) uses interference of electromagnetic waves on an incidence plane of light or a plane parallel to the incidence plane. The reflector may reflect electromagnetic waves between adjacent optical filters. The present technology can be applied to, for example, an image sensor provided with a GMR filter, such as a back-side-illuminated or front-side-illuminated CMOS image sensor.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: July 18, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Sozo Yokogawa, Hirotaka Murakami, Mikinori Ito
  • Patent number: 11706510
    Abstract: A camera module includes a lens; an image sensor disposed on a substrate and converting an optical signal refracted by the lens into an electrical signal, an adhesive member disposed between the substrate and the image sensor to fix the image sensor to the substrate, and a support member disposed between the substrate and the image sensor configured to maintain a constant distance between the lens and the image sensor even at a time of shrinkage-deformation of the adhesive member.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: July 18, 2023
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Won Seo Gu, Soo Gil Sin, Sang Jin Kim
  • Patent number: 11694647
    Abstract: According to one embodiment, a display device includes a first substrate, a second substrate including a common electrode, and a display function layer which is partly switched between a transparent state and a scattering state. The first substrate includes a first scanning line, a first signal line, an insulating layer, a first switching element, and a first pixel electrode. The first signal line includes a first coupling portion and a first line portion. The first scanning line intersects the first coupling portion and is provided in a same layer as the first line portion. The insulating layer is interposed between the first coupling portion and the first scanning line.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: July 4, 2023
    Assignee: Japan Display Inc.
    Inventor: Hirotaka Hayashi
  • Patent number: 11676987
    Abstract: The present invention provides a semiconductor structure for forming a CMOS image sensor. The semiconductor structure includes at least a photodiode formed in the substrate for collecting photoelectrons, and the photodiode has a pinning layer, a first doped region and a second doped region in order from top to bottom in a height direction of the substrate. The semiconductor structure further includes a third doped region located in the substrate corresponding to a laterally extending region of the second doped region. The first doped region has an ion doping concentration greater than the ion doping concentration of the second doped region, the ion doping concentration of the second doped region is greater than the ion doping concentration of the third doped region, and the third doped region is in contact with the second doped region after diffusion. The present invention also provides a method of manufacturing the above-described semiconductor structure.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: June 13, 2023
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Zhen Gu, Zhi Tian, Qiwei Wang, Haoyu Chen
  • Patent number: 11652183
    Abstract: An infrared photodetector includes: a p-type and highly-doped silicon substrate; a metal structure disposed on the silicon substrate; a first electric contact to the silicon substrate; and a second electric contact to the metal structure.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: May 16, 2023
    Assignee: William Marsh Rice University
    Inventors: Bob Yi Zheng, Hangqi Zhao, Benjamin Cerjan, Mehbuba Tanzid, Peter J. Nordlander, Nancy J. Halas
  • Patent number: 11605664
    Abstract: An image sensor device is disclosed, which blocks noise of a pad area. The image sensor device includes a substrate, a pad, and an impurity area. The substrate includes a first surface and a second surface, and includes first conductive impurities. The pad is disposed at the first surface of the substrate. The impurity area is formed in the substrate to overlap with the pad in a first direction, the impurity area being includes second conductive impurities different from the first conductive impurities.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 14, 2023
    Assignee: SK hynix Inc.
    Inventor: Sung Ryong Lee
  • Patent number: 11605742
    Abstract: A dark reference device comprises: a photodiode comprising an optical active area; a light shield configured to prevent light from entering said optical active area, wherein said light shield comprises first and second overlapping metal covers, and wherein each of said metal covers comprises a plurality of openings overlapping said optical active area.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: March 14, 2023
    Assignee: X-FAB Global Services GmbH
    Inventors: Daniel Gäbler, Pablo Siles
  • Patent number: 11527564
    Abstract: A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: December 13, 2022
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
  • Patent number: 11527560
    Abstract: An imaging device includes: a semiconductor substrate; a first photoelectric converter which is disposed in the semiconductor substrate; a second photoelectric converter different from the first photoelectric converter, which is disposed in the semiconductor substrate; a wiring layer disposed on or above the semiconductor substrate; and a capacitor which is disposed in the wiring layer and surrounds the first photoelectric converter in plan view. The capacitor includes a first electrode, a second electrode, and a dielectric layer disposed between the first electrode and the second electrode. The first electrode is connected to one of the first photoelectric converter and the second photoelectric converter.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: December 13, 2022
    Assignee: PANASONIC INTELECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuuko Tomekawa, Takahiro Koyanagi, Hiroyuki Amikawa, Yasuyuki Endoh
  • Patent number: 11502123
    Abstract: A method includes forming a dielectric layer over a first surface of a semiconductor layer, the dielectric layer including a metallization layer. The method includes forming an opening to expose a portion of the dielectric layer. The method includes forming a buffer oxide layer lining the opening. The method includes forming, according to a patternable layer, a recess in the buffer oxide layer partially extending from a second surface of the buffer oxide layer. The method includes removing the patternable layer. The method includes extending the recess through the buffer oxide layer and a portion of the dielectric layer to expose a portion of the metallization layer. The method includes filling the recess with a conductive material to form a pad structure configured to provide electrical connection to the metallization layer.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Keng-Ying Liao, Huai-Jen Tung, Chih Wei Sung, Po-zen Chen, Yu-Chien Ku, Yu-Chu Lin, Chi-Chung Jen, Yen-Jou Wu, Tsun-kai Tsao, Yung-Lung Yang
  • Patent number: 11488996
    Abstract: An image sensor includes a semiconductor layer, a plurality of light sensing regions, a first pixel isolation layer, a light shielding layer, and a wiring layer. The semiconductor layer has a first surface and a second surface opposite to the first surface. The plurality of light sensing regions is formed in the semiconductor layer. The first pixel isolation layer is disposed between adjacent light sensing regions from among the plurality of light sensing regions. The first pixel isolation layer is buried in an isolation trench formed between the first surface and the second surface. The light shielding layer is formed on the second surface of the semiconductor layer and on some of the adjacent light sensing regions. The wiring layer is formed on the first surface of the semiconductor layer.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: November 1, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun-Ki Lee, Hye-Jung Kim, Hong-Ki Kim, Kyung-Duck Lee
  • Patent number: 11482553
    Abstract: A photo-detecting apparatus is provided. The photo-detecting apparatus includes at least one pixel, and each pixel includes N subpixels, wherein each of the subpixels comprises a detection region, two first conductive contacts, wherein the detection region is between the two first conductive contacts, wherein N is a positive integer and is ?2.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: October 25, 2022
    Assignee: Artilux, Inc.
    Inventors: Szu-Lin Cheng, Chien-Yu Chen, Shu-Lu Chen, Yun-Chung Na, Ming-Jay Yang, Han-Din Liu, Che-Fu Liang
  • Patent number: 11456337
    Abstract: An imaging device includes at least one unit pixel cell including a photoelectric converter and a voltage application circuit. The photoelectric converter includes a first electrode, a light-transmitting second electrode, a first photoelectric conversion layer containing a first material and a second photoelectric conversion layer containing a second material. The impedance of the first photoelectric conversion layer is larger than the impedance of the second photoelectric conversion layer. The voltage application circuit applies a first voltage or a second voltage having a larger absolute value than the first voltage selectively between the first electrode and the second electrode.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: September 27, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Manabu Nakata, Masumi Izuchi, Shinichi Machida, Yasunori Inoue
  • Patent number: 11456250
    Abstract: A semiconductor device according to the present embodiment comprises a first metallic line. The first metallic line is provided above a substrate and extends in a first direction with a first width. At least one second metallic line is connected to the first metallic line and extends in a second direction from the first metallic line with a second width that is smaller than the first width. A dummy metallic line is arranged adjacently to the at least one second metallic line, connected to the first metallic line, and extends in the second direction from the first metallic line. The dummy metallic line is not electrically connected to lines other than the first metallic line.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: September 27, 2022
    Assignee: Kioxia Corporation
    Inventors: Takao Sueyama, Yosuke Komori
  • Patent number: 11411034
    Abstract: A solid-state imaging device according to the present disclosure includes a photoelectric conversion film that is provided outside a semiconductor substrate on a pixel-by-pixel basis, performs photoelectric conversion on light having a predetermined wavelength range, and transmits light having wavelength ranges other than the predetermined wavelength range, and a photoelectric conversion region that is provided inside the semiconductor substrate on a pixel-by-pixel basis and performs photoelectric conversion on the light having the wavelength ranges, the light having the wavelength ranges having passed through the photoelectric conversion film. The photoelectric conversion film includes a film having an avalanche function.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: August 9, 2022
    Assignee: SONY CORPORATION
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Otake
  • Patent number: 11381806
    Abstract: There is provided a detection device using a SPAD array including a sensor array, multiple counters, a processor and a frame buffer. The sensor array includes a plurality of SPADs respectively generates an avalanche current while receiving a photon. Each counter counts a number of triggering times of the avalanche current of a corresponding SPAD within an exposure interval. The frame buffer is pre-stored with a plurality of gain calibration values corresponding to every SPAD of the sensor array. The processor accesses the gain calibration values to accordingly calibrate a counting image frame outputted by the sensor array to output a calibrated image frame.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: July 5, 2022
    Assignee: PIXART IMAGING INC.
    Inventor: Tso-Sheng Tsai
  • Patent number: 11374138
    Abstract: There is provided imaging devices and methods of forming the same, including a stacked structure body including a first electrode, a light-receiving layer formed on the first electrode, and a second electrode formed on the light-receiving layer, where the second electrode comprises an amorphous oxide comprising at least one of zinc and tungsten, and where the second electrode is transparent and electrically conductive and has absorption characteristics of 20% or more at a wavelength of 300 nm.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: June 28, 2022
    Assignee: SONY CORPORATION
    Inventor: Toshiki Moriwaki
  • Patent number: 11336851
    Abstract: An image sensing device is disclosed. The image sensing device includes a semiconductor substrate and a lens layer. The semiconductor substrate includes a first surface and a second surface opposite to the first surface, and includes a photoelectric conversion element that generates photocharges in response to light incident to the photoelectric conversion element via the first surface. The lens layer is disposed over the semiconductor substrate to direct light through the first surface of the semiconductor substrate into the substrate lens which further directs the incident light into the photoelectric conversion element. The semiconductor substrate is structured to include a substrate lens formed by etching the first surface to a predetermined depth and located between the first surface and the photoelectric conversion element to direct incident light via the first surface to the photoelectric conversion element.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: May 17, 2022
    Assignee: SKhynix Inc.
    Inventor: Kyung Su Byun
  • Patent number: 11335712
    Abstract: An array substrate is provided. The array substrate includes a base substrate; a first bonding pad layer including a plurality of first bonding pads on a first side of the base substrate; a second bonding pad layer including a plurality of second bonding pads on a second side of the base substrate, wherein the second side is opposite to the first side; and a plurality of signal lines on a side of the second bonding pad layer away from the base substrate. A respective one of the plurality of second bonding pads extends through the base substrate to electrically connect to a respective one of the plurality of first bonding pads. The respective one of the plurality of first bonding pads includes a protruding portion protruding away from the first side of the base substrate along a direction from the second side to the first side.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: May 17, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhiwei Liang, Muxin Di, Ke Wang, Yingwei Liu, Xiaoyan Zhu, Zhanfeng Cao, Guangcai Yuan
  • Patent number: 11304598
    Abstract: An image capturing module is used in an endoscope. The image capturing module comprises an image capturing portion having opposed surfaces defined by respective photodetection and reverse surfaces. The reverse surface includes external electrodes disposed thereon. A layered optical portion having a front surface to which light is applied and a rear surface that is opposite of the front surface. The layered optical portion having a plurality of optical members layered together. A layered device having a first principal surface with joint electrodes disposed thereon. A second principal surface opposes the first principal surface. The first principal surface is bonded to the reverse surface. The joint electrodes are joined to the external electrodes. The layered device includes a plurality of semiconductor devices layered together in which the first principal surface is larger in area than the photodetection surface and smaller in area than the rear surface.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 19, 2022
    Assignee: OLYMPUS CORPORATION
    Inventor: Noriyuki Fujimori
  • Patent number: 11296135
    Abstract: Provided are a filter capable of detecting light with less noise, an optical sensor, a solid-state imaging element, and an image display device. This filter is provided with a plurality of different pixels that are two-dimensionally arranged, and at least one of the plurality of pixels is a pixel 11 of a near-infrared cut filter that shields at least a part of light having a wavelength in the near-infrared region and transmits light having a wavelength in the visible region.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: April 5, 2022
    Assignee: FUJIFILM Corporation
    Inventors: Kazutaka Takahashi, Kazuya Oota
  • Patent number: 11251212
    Abstract: A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: February 15, 2022
    Assignee: SONY CORPORATION
    Inventors: Susumu Hiyama, Kazufumi Watanabe
  • Patent number: 11164977
    Abstract: A semiconductor device with reduced parasitic capacitance is provided. A stack is formed on an insulating layer, the stack comprising a first oxide insulating layer, an oxide semiconductor layer over the first oxide insulating layer, and a second oxide insulating layer on the oxide semiconductor layer, a gate electrode layer and a gate insulating layer are formed on the second oxide insulating layer; a first low-resistance region is formed by adding a first ion to the second oxide semiconductor layer using the gate electrode layer as a mask; a sidewall insulating layer is formed on an outer side of the gate electrode layer; a second conductive layer is formed over the gate electrode layer, the sidewall insulating layer, and the second insulating layer; and an alloyed region in the second oxide semiconductor layer is formed by performing heat treatment.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: November 2, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11127627
    Abstract: A method for forming an interconnection structure for a semiconductor device is provided.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: September 21, 2021
    Assignee: IMEC VZW
    Inventors: Frederic Lazzarino, Guillaume Bouche, Juergen Boemmels
  • Patent number: 11126039
    Abstract: An electro-optical device includes a substrate that is light-transmissive, a pixel electrode that is light-transmissive, a switching element electrically coupled to the pixel electrode, and a light-shielding layer in contact with the substrate and overlapping, in a plan view from a thickness direction of the substrate, with the switching element, wherein the light-shielding layer includes a first portion and a second portion, the second portion having a thickness thicker than a thickness of the first portion. In addition, the substrate is preferably provided with a recessed portion in which the light-shielding layer is disposed, the recessed portion opening to the switching element side.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: September 21, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Satoshi Ito
  • Patent number: 11025844
    Abstract: A method of driving an image sensor includes integrating an overflowed charge from a photodiode in the floating diffusion area and a dynamic range capacitor. The dynamic range capacitor is formed between the floating diffusion area and a power supply voltage. The method further includes sampling a first voltage formed in the floating diffusion area by the integrated overflowed charge, resetting the photodiode, the floating diffusion area, and the dynamic range capacitor, sampling a reset level of the reset floating diffusion area, transferring a charge accumulated in the photodiode to the floating diffusion area, and sampling a second voltage formed in the floating diffusion area.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: June 1, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minwoong Seo, Seungsik Kim, Jungchak Ahn, Jaekyu Lee, Dongmo Im, Dongseok Cho
  • Patent number: 10991748
    Abstract: A three-dimensional (3D) image sensor includes a first substrate having an upper pixel. The upper pixel includes a photoelectric element and first and second photogates connected to the photoelectric element. A second substrate includes a lower pixel, which corresponds to the upper pixel, that is spaced apart from the first substrate in a vertical direction. The lower pixel includes a first transfer transistor that transmits a first signal provided by the first photogate. A first source follower generates a first output signal in accordance with the first signal. A second transfer transistor transmits a second signal provided by the second photogate. A second source follower generates a second output signal in accordance with the second signal. First and second bonding conductors are disposed between the first and second substrates and electrically connect the upper and lower pixels.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: April 27, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Sun Keel, Doo Won Kwon, Hyun Surk Ryu, Young Chan Kim, Young Gu Jin
  • Patent number: 10991830
    Abstract: A semiconductor device with reduced parasitic capacitance is provided. A stack is formed on an insulating layer, the stack comprising a first oxide insulating layer, an oxide semiconductor layer over the first oxide insulating layer, and a second oxide insulating layer on the oxide semiconductor layer, a gate electrode layer and a gate insulating layer are formed on the second oxide insulating layer; a first low-resistance region is formed by adding a first ion to the second oxide semiconductor layer using the gate electrode layer as a mask; a sidewall insulating layer is formed on an outer side of the gate electrode layer; a second conductive layer is formed over the gate electrode layer, the sidewall insulating layer, and the second insulating layer; and an alloyed region in the second oxide semiconductor layer is formed by performing heat treatment.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: April 27, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 10964740
    Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a photoelectric conversion layer in the semiconductor substrate, transistors on the first surface of the semiconductor substrate, a first interlayer insulation layer on the transistors, a first lower pad electrode and a second lower pad electrode spaced apart from the first lower pad electrode on the first interlayer insulation layer, a mold insulation layer on the first and second lower pad electrodes, first and second lower electrodes in the mold insulation layer, a dielectric layer on the first and second lower electrodes, an upper electrode on the dielectric layer, and an upper pad electrode connected to the upper electrode and including a different conductive material from the first and second lower pad electrodes. The first lower electrodes are on the first lower pad electrode, and the second lower electrodes are on the second lower pad electrode.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: March 30, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinyong Choi, Haemin Lim, Joosung Moon, Ingyu Baek, Seunghan Yoo, Minjung Chung
  • Patent number: 10937819
    Abstract: An image sensor including a substrate, a light sensing device, a storage node, a buried gate structure, and a first light shielding layer is provided. The light sensing device is disposed in the substrate. The storage node is disposed in the substrate. The storage node and the light sensing device are separated from each other. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. The first light shielding layer is disposed on the buried gate and is located above the storage node. The first light shielding layer is electrically connected to the buried gate.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 2, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
  • Patent number: 10930688
    Abstract: A display substrate, a display device, and a display control method of a display device. The display substrate includes a black matrix region. At least one photosensitive circuit is in the black matrix region at a light exit side of the display substrate.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: February 23, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lulu Chu, Han Jiang, Donghan Yu, Wen Li
  • Patent number: 10840280
    Abstract: An imaging device includes: a semiconductor substrate; a first photoelectric converter which is disposed in the semiconductor substrate; a second photoelectric converter different from the first photoelectric converter, which is disposed in the semiconductor substrate; a wiring layer disposed on or above the semiconductor substrate; and a capacitor which is disposed in the wiring layer and surrounds the first photoelectric converter in plan view. The capacitor includes a first electrode, a second electrode, and a dielectric layer disposed between the first electrode and the second electrode. The first electrode is connected to one of the first photoelectric converter and the second photoelectric converter.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: November 17, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuuko Tomekawa, Takahiro Koyanagi, Hiroyuki Amikawa, Yasuyuki Endoh
  • Patent number: 10811451
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: October 20, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 10804304
    Abstract: Image sensors are provided. An image sensor includes a semiconductor substrate including a pixel region and an optical black region. The image sensor includes a plurality of photoelectric conversion regions in the pixel region. The image sensor includes a wiring structure on a first surface of the semiconductor substrate. The image sensor includes a light shielding layer on a second surface of the semiconductor substrate in the optical black region. Moreover, the image sensor includes a light shielding wall structure that is in the semiconductor substrate between the pixel region and the optical black region and that is connected to the light shielding layer.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 13, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-pil Noh, Chang-keun Lee, Je-won Yu, Kang-sun Lee
  • Patent number: 10771664
    Abstract: The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic apparatus capable of improving sensitivity while suppressing degradation of color mixture. The solid-state imaging device includes an anti-reflection portion having a moth-eye structure provided on a boundary surface on a light-receiving surface side of a photoelectric conversion region of each pixel arranged two-dimensionally, and an inter-pixel light-blocking portion provided below the boundary surface of the anti-reflection portion to block incident light. In addition, the photoelectric conversion region is a semiconductor region, and the inter-pixel light-blocking portion has a trench structure obtained by digging the semiconductor region in a depth direction at a pixel boundary. The techniques according to the present disclosure can be applied to, for example, a solid-state imaging device of a rear surface irradiation type.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: September 8, 2020
    Assignee: Sony Corporation
    Inventors: Yoshiaki Masuda, Yuki Miyanami, Hideshi Abe, Tomoyuki Hirano, Masanari Yamaguchi, Yoshiki Ebiko, Kazufumi Watanabe, Tomoharu Ogita
  • Patent number: 10757352
    Abstract: According to one embodiment, a solid-state imaging device includes a substrate, a light receiving pixel, a first interconnection layer, a light shielding layer, and a first metal film. The substrate includes a sensor region and a circuit region. The light receiving pixel is provided on a surface of the sensor region of the substrate. The first interconnection layer is provided in the sensor region. The light shielding layer is provided in the sensor region and has a larger width than the first interconnection. The first metal film is provided on at least one of an upper surface or a lower surface of the light shielding layer. The first metal film partially covers at least one of the upper surface or the lower surface.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 25, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Yohei Ito, Yasushi Itabashi
  • Patent number: 10652488
    Abstract: An optical-detection element includes a p-type supporting-layer, an n-type buried charge-generation region to implement a photodiode with the supporting-layer, a p-type shield region buried in the buried charge-generation region, a gate insulating-film contacted with the shield region, a transparent electrode on the gate insulating-film, a p-type well region buried in the supporting-layer, and an n+-type charge-readout region buried in the supporting-layer at an edge of the well region toward the buried charge-generation region.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: May 12, 2020
    Assignees: BROOKMAN TECHNOLOGY, INC., IKEGAMI TSUSHINKI CO., LTD., JAPAN ATOMIC ENERGY AGENCY
    Inventors: Takashi Watanabe, Osamu Ozawa, Kunihiko Tsuchiya, Tomoaki Takeuchi
  • Patent number: 10630196
    Abstract: According to one embodiment, an apparatus for converting the electrical power of an electromagnetic wave into a DC electrical voltage signal is disclosed, the apparatus comprising a signal input region for receiving the electromagnetic wave, a signal output region for providing the DC electrical voltage signal, and a first conversion device, and the first conversion device comprising at least a first field-effect transistor element and a second field-effect transistor element, which is electrically coupled to the signal output region, the second field-effect transistor element being configured for series coupling to the first field-effect transistor element. According to this embodiment, the apparatus furthermore comprises at least one first capacitive element, which is electrically coupled to the signal input region, the first conversion device being configured in order to avoid at least one harmonic of the electromagnetic wave.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: April 21, 2020
    Assignee: Infineon Technologies AG
    Inventors: Viktor Gerber, Werner Simbuerger, Valentyn Solomko
  • Patent number: 10541262
    Abstract: A package for an image sensing chip is provided, which includes: an image sensing chip comprising a first surface and a second surface opposite to each other, where the first surface is provided with an image sensing region and a contact pad; a through hole extending from the second surface to the contact pad; an electrical connection layer provided along an inner wall of the through hole and extending onto the second surface; a solder mask filling the through hole and covering the electrical connection layer, wherein an opening is formed in the solder mask, and the electrical connection layer is exposed at a bottom of the opening; a guide contact pad covering an inner wall and the bottom of the opening and extending onto the solder mask; and a solder bump located on the guide contact pad.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: January 21, 2020
    Assignee: China Wafer Level CSP Co., Ltd.
    Inventors: Zhiqi Wang, Zhuowei Wang, Guoliang Xie
  • Patent number: 10537295
    Abstract: A radiation imaging apparatus is provided. The apparatus comprises pixels arranged in an image sensing region, a first and a second detecting elements configured to obtain radiation irradiation information, a first signal line to which a signal from the first detecting element is to be output and a second signal line to which a signal from the second detecting element is to be output, and a signal processing circuit configured to process the signals output from the first and the second detecting elements. The first the second signal lines are arranged in the image sensing region or arranged adjacent to the image sensing region, the first detecting element has a larger region to detect radiation than the second detecting element. The signal processing circuit generates the radiation irradiation information based on the signals from the first and the second signal lines.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: January 21, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Minoru Watanabe, Keigo Yokoyama, Masato Ofuji, Jun Kawanabe, Kentaro Fujiyoshi, Hiroshi Wayama, Kazuya Furumoto
  • Patent number: 10522582
    Abstract: The present technology relates to an imaging apparatus and a manufacturing method which enables sensitivity of an imaging apparatus using infrared rays to be improved.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: December 31, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shunsuke Maruyama, Takeshi Yanagita
  • Patent number: 10497739
    Abstract: An image capture device includes pixels and a signal line that is arranged across two or more of the pixels. Each pixel includes: a semiconductor substrate, a photoelectric converter including a first electrode, a second electrode, and a photoelectric conversion layer; a first transistor including first and second impurity regions in the substrate; a wiring layer between the substrate and the second electrode; and a capacitor arranged between the wiring layer and the substrate in a normal direction of the substrate and including a third electrode, a fourth electrode between the third electrode and the substrate, and a dielectric layer. The first impurity region is electrically connected to the second electrode, the fourth electrode is electrically connected to one of the first and second impurity regions, and at least either the third or fourth electrodes covers the first impurity region when viewed along the normal direction.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: December 3, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masayuki Takase, Yuuko Tomekawa, Yoshihiro Sato