Light Patents (Class 257/431)
  • Patent number: 11973161
    Abstract: A photo sensor circuit includes: a photo transistor; a first switching transistor; a second switching transistor; and a capacitance element. The photo transistor includes: a gate connected to a first wiring; a source connected to a second wiring; and a drain. The first switching transistor includes: a gate connected to a third wiring; a source connected to a fourth wiring; and a drain connected to the drain of the photo transistor. The capacitance element includes: a first terminal connected to the drain of the photo transistor; and a second terminal connected to the source of the first switching transistor. The second switching transistor includes: a gate connected to a gate line; a source connected to a signal line; and a drain connected to the first terminal of the capacitance element. The photo transistor, first switching transistor, and second transistor each include an oxide semiconductor layer as a channel layer.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: April 30, 2024
    Assignee: JAPAN DISPLAY INC.
    Inventors: Masashi Tsubuku, Takanori Tsunashima, Marina Mochizuki
  • Patent number: 11955561
    Abstract: A disclosed transistor structure includes a gate electrode, an active layer, a source electrode, a drain electrode, an insulating layer separating the gate electrode from the active layer, and a carrier modification device that reduces short channel effects by reducing carrier concentration variations in the active layer. The carrier modification device may include a capping layer in contact with the active layer that acts to increase a carrier concentration in the active layer. Alternatively, the carrier modification device may include a first injection layer in contact with the source electrode and the active layer separating the source electrode from the active layer, and a second injection layer in contact with the drain electrode and the active layer separating the drain electrode from the active layer. The first and second injection layers may act to reduce a carrier concentration within the active layer near the source electrode and the drain electrode.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wu-Wei Tsai, Hai-Ching Chen
  • Patent number: 11942405
    Abstract: A semiconductor package assembly includes a semiconductor package that includes a semiconductor chip bonded to a substrate. The assembly also includes a plurality of passive devices mounted on a bottom surface of the substrate opposite the semiconductor chip, the plurality of passive devices including a plurality of operable passive devices and a plurality of standoff passive devices, wherein a height of each of the plurality of standoff passive devices is greater than a height of any of the plurality of operable passive devices. The assembly also includes a plurality of solder structures attached to the bottom surface of the substrate. When mounted on a circuit board, the standoff passive devices prevent solder bridging.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: March 26, 2024
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Jianguo Li, Roden Topacio
  • Patent number: 11916161
    Abstract: A semiconductor light-receiving element, includes: a semiconductor substrate; a high-concentration layer of a first conductivity type formed on the semiconductor substrate; a low-concentration layer of the first conductivity type formed on the high-concentration layer of the first conductivity type and in contact with the high-concentration layer of the first conductivity type; a low-concentration layer of a second conductivity type configured to form a PN junction interface together with the low-concentration layer of the first conductivity type; and a high-concentration layer of the second conductivity type formed on the low-concentration layer of the second conductivity type and in contact with the low-concentration layer of the second conductivity type. The low-concentration layers have a carrier concentration of less than 1×1016/cm3. The high-concentration layers have a carrier concentration of 1×1017/cm3 or more.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: February 27, 2024
    Assignee: Lumentum Japan, Inc.
    Inventors: Takashi Toyonaka, Hiroshi Hamada, Shigehisa Tanaka
  • Patent number: 11908884
    Abstract: An inductive device includes an insulating layer, a lower magnetic layer, and an upper magnetic layer that are formed such that the insulating layer does not separate the lower magnetic layer and the upper magnetic layer at the outer edges or wings of the inductive device. The lower magnetic layer and the upper magnetic layer form a continuous magnetic layer around the insulating layer and the conductors of the inductive device. Magnetic leakage paths are provided by forming openings through the upper magnetic layer. The openings may be formed through the upper magnetic layer by semiconductor processes that have relatively higher precision and accuracy compared to semiconductor processes for forming the insulating layer such as spin coating. This reduces magnetic leakage path variation within the inductive device and from inductive device to inductive device.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chou, Yang-Che Chen, Chen-Hua Lin, Victor Chiang Liang, Huang-Wen Tseng, Chwen-Ming Liu
  • Patent number: 11908832
    Abstract: The invention relates to a process for collectively bending microelectronic components comprising transferring microelectronic components (10) to and bending them on curved surfaces (21) of a shaping carrier (20), an adhesive layer (6) ensuring adhesion of the microelectronic components (10), and comprising producing conductive vias (22) that extend through the shaping carrier (20) and the adhesive lower layer (6), from the lower face (20i) of the shaping carrier (20), in order to emerge onto the lower conductive pads (12) of the microelectronic components (10).
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 20, 2024
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Alexis Rochas, David Henry, Stéphane Caplet
  • Patent number: 11894232
    Abstract: Methods for adjusting a work function of a structure in a substrate leverage near surface doping. In some embodiments, a method for adjusting a work function of a structure in a substrate may include coating surfaces of the structure to form a doping layer in a non-solid phase that contains dopants on the surfaces of the structure and performing a dopant diffusion process using an oxidation process to drive the dopants through the surfaces the structure to embed the dopants in the structure to adjust the work function of the structure near the surfaces to form an abrupt junction profile and form an oxidation layer on the surfaces of the structure. The coating of the surfaces of the structure may be performed using a gas-phase or liquid-phase process.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: February 6, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Taichou Papo Chen
  • Patent number: 11881497
    Abstract: An image sensor, which stores electric charge overflowing from a photoelectric conversion layer, includes: (1) a substrate including a first surface and a second surface, which is opposite to the first surface and upon which light is incident, (2) a photoelectric conversion layer in the substrate, (3) an isolation film disposed on the substrate, along the photoelectric conversion layer, (4) a storage conductive pattern disposed in the isolation film, (5) a transfer gate disposed on a first surface of the substrate, (6) a first impurity-injected area disposed between the photoelectric conversion layer and the isolation film, and (7) a second impurity-injected area disposed on the first surface of the substrate and connected to the transfer gate. The first and second impurity-injected areas are electrically connected.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: January 23, 2024
    Inventors: Young Gu Jin, Young Chan Kim
  • Patent number: 11864877
    Abstract: The invention relates to a photoplethysmography (PPG) sensing device comprising—a pulsed light source, —at least one pixel to create photo-generated electrons, synchronized with said pulsed light source. It is mainly characterized in that each pixel comprises: —a pinned photodiode (PPD) having two electronic connection nodes, —a sense node (SN), to convert the photo-generated electrons into a voltage, and—a Transfer Gate (TGtransfer) transistor, having its source electronically connected to one electronic connection node of said pinned photodiode (PPD), and being configured to act as a transfer gate (TG) between said pinned photodiode (PPD) and said sense node (SN), allowing the photo-generated electrons to sink when the light is pulsed-off, the photo-generated electrons integration when the light is pulsed-on and the transfer of at least part of the integrated photo-generated electrons to said sense node for a read-out.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: January 9, 2024
    Assignee: ECOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE (EPFL)
    Inventors: Assim Boukhayma, Antonino Caizzone, Christian Enz
  • Patent number: 11869910
    Abstract: The present disclosure provides a light sensing element including a unit. The unit includes a plurality of photodiodes, a color filter disposed above the photodiodes, and a light host embedded in the color filter. The light host is a hollow structure disposed above the photodiodes. The color filter includes a first portion surrounding the light host, a second portion surrounded by the light host, and a third portion covering and physically contacting the first portion, the light host, and the second portion.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 9, 2024
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Ching-Hua Li, Zong-Ru Tu, Po-Hsiang Wang, Han-Lin Wu
  • Patent number: 11871569
    Abstract: A nonvolatile memory device according to an embodiment includes a substrate, a channel structure extending in a direction perpendicular to the substrate; a charge storage structure disposed to be in contact with the channel structure; and a cell electrode structure disposed to be in contact with the charge storage structure in a lateral direction, wherein the channel structure comprises a hole conduction layer and an electron conduction layer.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: January 9, 2024
    Assignee: SK hynix Inc.
    Inventors: Hyangkeun Yoo, Ju Ry Song, Se Ho Lee, Jae Gil Lee
  • Patent number: 11852756
    Abstract: A flexible digital radiographic detector assembly includes a flexible sleeve enclosing a photosensor array supported by a flexible substrate. Integrated circuit readout electronics are coupled to the photosensor array and to a circuit board having conductive contacts. The contacts engage a hand carried read out electronics box to initiate a read out of image data captured in the photosensor array and to display the image data on a screen in the read out electronics box.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: December 26, 2023
    Assignee: Carestream Health, Inc.
    Inventors: Todd D. Bogumil, Ravi K. Mruthyunjaya
  • Patent number: 11839101
    Abstract: A display substrate includes a display region and hollowed-out grooves provided at a periphery of the display region. The display substrate includes a first organic base layer, a light-emitting unit provided on the base structure layer and located at the display region; the first organic base layer is provided with a groove structure located between the hollowed-out grooves and the display region. The display substrate further includes a first inorganic package layer for covering the light-emitting unit and the groove structure.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: December 5, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Chengyuan Luo
  • Patent number: 11815716
    Abstract: An arrayed waveguide grating device includes an input coupler configured to receive a light signal and split the light signal into a plurality of output light signals. The device also includes a plurality of waveguides optically connected to the input coupler, each waveguide having a plurality of waveguide portions having respective sensitivities to variance in one or more parameters associated with operating of the optical arrayed grating device. Lengths of the respective portions are determined such that each waveguide applies a respective phase shift to the output light signal that propagates through the waveguide and the plurality of waveguides have at least substantially same change in phase shift with respective changes in the one or more parameters associated with operation of the device. An output coupler is optically connected to the plurality of waveguides to map respective light signals output from the plurality of waveguides to respective focal positions.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: November 14, 2023
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventor: Sean P. Anderson
  • Patent number: 11818482
    Abstract: An image sensor and a camera are provided. The image sensor includes: a demodulation clock generation circuit configured to generate first to fourth demodulation clock signals respectively having first to fourth phases; a demodulation phase selection circuit configured to generate first to fourth pre-demodulation signals based on the first to fourth demodulation clock signals and a random number that changes for each of a plurality of packets; a delay circuit configured to generate a first delay signals, second delay signals, third delay signals and fourth delay signals by delaying the first to fourth pre-demodulation signals by a plurality of delay phases; and a phase mixer configured to generate first to fourth demodulation signals of which phases are changed based on an address that changes for each of the plurality of packets. The first to fourth phases have a phase difference of 90° from each other.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: November 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Daeyun Kim, Myoungoh Ki, Seungchul Shin
  • Patent number: 11810988
    Abstract: The present disclosure provides an integrated infrared circular polarization detector with a high extinction ratio and a design method thereof. The detector structurally includes a metal reflective layer, a bottom electrode layer, a quantum well layer, a top electrode layer, and a two-dimensional chiral metamaterial layer. Under circularly polarized light with the selected handedness, surface plasmon polariton waves are generated at the interface between the two-dimensional chiral metamaterial layer and the semiconductor, and has a main electric field component aligned with the absorption direction of the quantum wells, thereby enhancing the absorption of the quantum wells. Under circularly polarized light with the opposite handedness, since most of the optical power is reflected, surface plasmon polariton waves cannot be effectively excited, and the absorption of the quantum wells is extremely low, thus realizing the capability of infrared circular polarization detection with a high extinction ratio.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: November 7, 2023
    Assignee: Shanghai Institute of Technical Physics, Chinese Academy of Sciences
    Inventors: Jing Zhou, Zeshi Chu, Xu Dai, Yu Yu, Mengke Lan, Shangkun Guo, Jie Deng, Xiaoshuang Chen, Qingyuan Cai, Fangzhe Li, Zhaoyu Ji
  • Patent number: 11810809
    Abstract: A method for transferring micro light emitting diodes (micro-LEDs) includes forming a plurality of micro light emitting diode (micro-LED) chips having an epitaxial stacked layer and an electrode on a base; attaching the electrodes of the micro-LED chips to a temporary substrate and removing the base from the micro-LED chips; forming a light shielding layer on the temporary substrate; forming a light-transmissible packaging layer to cover the light shielding layer and the micro-LED chips; removing the temporary substrate to form a light emitting assembly; dividing the light emitting assembly to separate a plurality of pixels constituted by the micro-LEDs; and transferring the pixels to a permanent substrate.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: November 7, 2023
    Assignee: MACROBLOCK, INC.
    Inventors: Shih-Sian Liang, Wei-Ming Tseng
  • Patent number: 11762159
    Abstract: Embodiments described herein include an apparatus comprising a semiconductor-based photodiode disposed on a semiconductor layer, and an optical waveguide spaced apart from the semiconductor layer and evanescently coupled with a depletion region of the photodiode. The photodiode may be arranged as a vertical photodiode or a lateral photodiode.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash B. Gothoskar, Vipulkumar K. Patel, Soha Namnabat, Ravi S. Tummidi
  • Patent number: 11757060
    Abstract: Short-wave infrared (SWIR) focal plane arrays (FPAs) comprising a Si layer through which light detectable by the FPA reaches photodiodes of the FPA, at least one germanium (Ge) layer including a plurality of distinct photosensitive areas including at least one photosensitive area in each of a plurality of photosensitive photosites, each of the distinct photosensitive areas comprising a plurality of proximate steep structures of Ge having height of at least 0.5 ?m and a height-to-width ratio of at least 2, and methods for forming same.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: September 12, 2023
    Assignee: TriEye Ltd.
    Inventor: Uriel Levy
  • Patent number: 11749760
    Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Han Lin, Chao-Ching Chang, Yi-Ming Lin, Yen-Ting Chou, Yen-Chang Chen, Sheng-Chan Li, Cheng-Hsien Chou
  • Patent number: 11728364
    Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Cheng Yuan Wang
  • Patent number: 11688640
    Abstract: Systems and methods for manufacturing flexible electronics are described herein. Methods in accordance with embodiments of the present technology can include disposing electrical features, such as thin film circuits, on a first side of a glass substrate, applying a first protective material over the electronic features, and exposing a second side of the glass substrate to a chemical etching tank to thin the glass substrate to a predetermined thickness. The thinning process can remove cracks and other defects from the second side of the glass substrate and enhance the flexibility of the electronic assembly. A second protective material can be disposed on the second side of the thinned glass substrate to maintain the enhanced backside surface of the glass substrate. In some embodiments, the method also includes singulating the plurality of electronic features into individual electronic components by submerging the electronic assembly into a chemical etching tank.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: June 27, 2023
    Assignee: NEXT Biometrics Group ASA
    Inventors: Tian Xiao, King Hong Kwan, Sheng-Hsiang Hung, Mark W. Naumann
  • Patent number: 11677036
    Abstract: A meta optical device configured to sense incident light includes a plurality of nanorods each having a shape dimension less than a wavelength of the incident light. Each nanorod includes a first conductivity type semiconductor layer, an intrinsic semiconductor layer, and a second conductivity type semiconductor layer. The meta optical device may separate and sense wavelengths of the incident light.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: June 13, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeongyub Lee, Woong Ko, Changseung Lee, Hongkyu Park, Chanwook Baik, Hongseok Lee, Wonjae Joo
  • Patent number: 11676976
    Abstract: A PIN photodetector includes an n-type semiconductor layer, an n-type semiconductor cap layer, a first plurality of p-type regions located within the n-type semiconductor cap layer and separated from one another by a distance d1, and an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer including the first plurality of p-type regions. The plurality of p-type regions are electrically connected to one another to provide an electrical response to light incident to the PIN photodetector.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: June 13, 2023
    Assignee: Attollo Engineering, LLC
    Inventors: Jonathan Geske, Andrew Hood, Michael MacDougal
  • Patent number: 11670659
    Abstract: An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 6, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taiichiro Watanabe, Fumihiko Koga, Kyosuke Ito, Hideaki Togashi, Yusaku Sugimori
  • Patent number: 11658274
    Abstract: A component is disclosed. In an embodiment the component includes a light-emitting element and a structured layer having an optical functionality, wherein the structured layer is arranged on the light-emitting element.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 23, 2023
    Assignee: TDK ELECTRONICS AG
    Inventors: Thomas Feichtinger, Stefan Sax
  • Patent number: 11653508
    Abstract: A polymer solar cell includes a photoactive layer, a cathode electrode, and an anode electrode. The photoactive layer includes a polymer layer and a carbon nanotube layer. The polymer layer includes a first polymer surface and a second polymer surface opposite to the first polymer surface. A portion of the carbon nanotube layer is embedded in the polymer layer, and another portion of the carbon nanotube layer is exposed from the polymer layer. The cathode electrode is located a surface of the carbon nanotube layer away from the polymer layer. The anode electrode is located on the first polymer surface and spaced apart from the carbon nanotube layer. The entire second polymer surface is exposed.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: May 16, 2023
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wen Ning, Peng Liu, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 11639332
    Abstract: Provided herein are azo prodrugs of small-molecule isoindoline-1,3-diones and isoindoles anti-inflammatory inhibitors according to formula IA, in particular PDE4 inhibitors, which prodrugs can be administered orally to a subject in need thereof, whereby the prodrugs are cleaved in the colon and the PDE4 inhibitor released.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: May 2, 2023
    Assignees: AMGEN (EUROPE) GMBH
    Inventor: William R. Baker
  • Patent number: 11605752
    Abstract: Photodetectors using photonic crystals (PhCs) in polysilicon film that include an in-plane resonant defect. A biatomic photodetector includes an optical defect mode that is confined from all directions in the plane of the PhC by the photonic bandgap structure. The coupling of the resonance (or defect) mode to out-of-plane radiation can be adjusted by the design of the defect. Further, a “guided-mode resonance” (GMR) photodetector provides in-plane resonance through a second-order grating effect in the PhC. Absorption of an illumination field can be enhanced through this resonance.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 14, 2023
    Assignee: Massachusetts Institute of Technology
    Inventors: Amir H. Atabaki, Rajeev J. Ram, Ebrahim Dakhil Al Johani
  • Patent number: 11605657
    Abstract: An image sensor may include a pixel array including a plurality of pixel blocks structured to convert light into electrical signals. Each of the plurality of pixel blocks may include a first light receiving circuit including a plurality of unit pixels which share a first floating diffusion; a second light receiving circuit arranged adjacent to the first light receiving circuit in a second direction, and including a plurality of unit pixels which share a second floating diffusion; a first driving circuit and a second driving circuit positioned between the first light receiving circuit and the second light receiving circuit, and aligned in a first direction crossing the second direction; and an intercoupling circuit configured to electrically couple the first floating diffusion, the second floating diffusion, the first driving circuit and the second driving circuit.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 14, 2023
    Assignee: SK hynix Inc.
    Inventor: Pyong-Su Kwag
  • Patent number: 11581449
    Abstract: The present disclosure relates to a photodiode comprising a first part made of silicon and a second part made of doped germanium lying on and in contact with the first part, the first part comprising a stack of a first area and of a second area forming a p-n junction and the doping level of the germanium increasing as the distance from the p-n junction increases.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: February 14, 2023
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Younes Benhammou, Dominique Golanski, Denis Rideau
  • Patent number: 11581473
    Abstract: A superconducting junction comprises: a first layer and a second layer of superconducting material; a tunneling layer of insulating material disposed between the first layer and the second layer of the superconducting material; and a layer of thermally conducting, non-superconducting material disposed between the first layer and the second layer of the superconducting material, the non-superconducting layer being in contact with either the first layer or the second layer of superconducting material.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: February 14, 2023
    Assignee: TEKNOLOGIAN TUTKIMUSKESKUS VTT OY
    Inventor: Mikko Kiviranta
  • Patent number: 11572621
    Abstract: Disclosed herein is system and method for protective diamond coatings. The method may include the steps of cleaning and seeding a substrate, depositing a crystalline diamond layer on the substrate, etching the substrate; and attaching the substrate to protected matter. The crystalline diamond layer may reflect at least 28 percent of electromagnetic energy in a beam having a bandwidth of 800 nanometer to 1 micrometer.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: February 7, 2023
    Assignee: AKHAN SEMICONDUCTOR, INC.
    Inventors: Adam Khan, Robert Polak, Kiran Kumar Kovi
  • Patent number: 11575060
    Abstract: A light-receiving element, comprising a plurality of photodiodes formed by stacking in this sequence, a lower reflection mirror, a resonator including a photoelectric conversion layer, and an upper reflection mirror on a semiconductor substrate, wherein the plurality of photodiodes share the semiconductor substrate and the lower reflection mirror, the plurality of photodiodes includes a first photodiode having a resonance wavelength ?1 and a second photodiode having a resonance wavelength ?2 that is larger than the resonance wavelength ?1, and a reflectance of the lower reflection mirror has a first peak corresponding to the resonance wavelength ?1 and a second peak corresponding to the resonance wavelength ?2.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 7, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takeshi Uchida, Takako Suga
  • Patent number: 11532651
    Abstract: The present disclosure relates to an image pickup device and an electronic apparatus that enable warping of a substrate to be suppressed. A first structural body including a pixel array unit is layered with second structural body including an input/output circuit unit and outputting a pixel signal output from the pixel to the outside of the device, and a signal processing circuit; and a signal output external terminal and a signal input external terminal are arranged below the pixel array unit, the signal output external terminal being connected to the outside via a first through-via penetrating through a semiconductor substrate in the second structural body, the signal input external terminal being connected to the outside via a second through-via connected to an input circuit unit and penetrating through the semiconductor substrate.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: December 20, 2022
    Assignee: SONY GROUP CORPORATION
    Inventors: Hiroaki Ishiwata, Harumi Tanaka, Atsuhiro Ando
  • Patent number: 11515355
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LIMITED
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Patent number: 11508856
    Abstract: A semiconductor device includes a photosensitive element, an insulating region, and a quench element. The photosensitive element includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type on the first semiconductor region, a third semiconductor region of a second conductivity type on the second semiconductor region, and a fourth semiconductor region of the second conductivity type around the second and third semiconductor regions. An impurity concentration of the first conductivity type in the second semiconductor region is higher than that in the first semiconductor region. An impurity concentration of the second conductivity type in the fourth semiconductor region is lower than that of the third semiconductor region. The insulating region is around the first and fourth semiconductor regions. The quench element is electrically connected to the third semiconductor region.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: November 22, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Koichi Kokubun, Mitsuhiro Sengoku
  • Patent number: 11395408
    Abstract: Wafer level passive array packages and modules are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circuit board.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 19, 2022
    Assignee: Apple Inc.
    Inventors: Scott D. Morrison, Karthik Shanmugam, Raymundo M. Camenforte, Rakshit Agrawal, Flynn P. Carson, Kiranjit Dhaliwal
  • Patent number: 11374049
    Abstract: A semiconductor device including a first semiconductor section including a first wiring layer at one side thereof, the first semiconductor section further including a photodiode, a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together, a third semiconductor section including a third wiring layer at one side thereof, the second and the third semiconductor sections being secured together such the first semiconductor section, second semiconductor section, and the third semiconductor section are stacked together, and a first conductive material electrically connecting at least two of (i) the first wiring layer, (ii) the second wiring layer, and (iii) the third wiring layer such that the electrically connected wiring layers are in electrical communication.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: June 28, 2022
    Assignee: SONY CORPORATION
    Inventors: Taku Umebayashi, Keiji Tatani, Hajime Inoue, Ryuichi Kanamura
  • Patent number: 11335727
    Abstract: The image sensing device includes a pixel array including a plurality of unit pixels is arranged in rows and columns. Each of the plurality of unit pixels includes a photoelectric conversion element to generate charge carriers by converting light incident upon the photoelectric conversion element, a plurality of floating diffusion regions spaced apart from the photoelectric conversion element to hold the charge carriers, a plurality of circulation gates located at sides of the photoelectric conversion element in each of a first direction and a second direction perpendicular to the first direction, configured to create an electric field in different regions of the photoelectric conversion element based on circulation control signals, and configured to induce movement of the charge carriers, and a plurality of transfer gates located between the circulation gates, and configured to transfer the charge carriers generated by the photoelectric conversion element to a corresponding floating diffusion region.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: May 17, 2022
    Assignee: SK HYNIX INC.
    Inventors: Hyung June Yoon, Jae Hyung Jang, Hoon Moo Choi
  • Patent number: 11330068
    Abstract: Methods and systems for recording user operations on a cloud management platform are provided. According to one aspect, a method comprises recording one or more user operations on a cloud management platform, the one or more user operations being associated performing a task; storing data associated with the one or more user operations in a database; and executing the data associated with the one or more user operations, allowing replay of the one or more user operations on the cloud management platform to repeat the task. The one or more user operations on the computing platform correspond to one or more application programming interface (API) operations and executing the one or more user operations on the cloud management platform, causing the computing device to call the one or more API operations to complete the task on the cloud management platform.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: May 10, 2022
    Assignee: Alibaba Group Holding Limited
    Inventor: Junyin Wu
  • Patent number: 11309342
    Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor including a dummy vertical transistor structure underlying a photodetector. The pixel sensor includes a substrate having a front-side surface opposite a back-side surface. The photodetector is disposed within the substrate. A deep trench isolation (DTI) structure extends from the back-side surface of the substrate to a first point below the back-side surface. The DTI structure wraps around an outer perimeter of the photodetector. The dummy vertical transistor structure is laterally spaced between inner sidewalls of the DTI structure. The dummy vertical transistor structure includes a dummy vertical gate electrode having a dummy conductive body and a dummy embedded conductive structure. The dummy embedded conductive structure extends from the front-side surface of the substrate to a second point vertically above the first point and the dummy conductive body extends along the front-side surface of the substrate.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: April 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsun-Kai Tsao, Jiech-Fun Lu, Shih-Pei Chou
  • Patent number: 11309443
    Abstract: A photosensitive module is provided. The photosensitive module includes a base, an integrated package substrate, and a photosensitive element. The integrated package substrate is connected to the base. The integrated package substrate has a plurality of first electronic components, and the first electronic components are housed inside the integrated package substrate without being exposed to external environment. The photosensitive element is connected to the integrated package substrate, and the photosensitive element is configured to receive a light beam traveling along an optical axis.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: April 19, 2022
    Assignee: TDK Taiwan Corp.
    Inventors: Chen-Er Hsu, Sin-Jhong Song, Chi-Fu Wu, Hao-Yu Wu, Tsutomu Fukai, Ming-Hung Wu
  • Patent number: 11302853
    Abstract: A semiconductor device package provided in an embodiment comprises: first and second frames spaced apart from each other; a body disposed between the first and second frames; and a semiconductor device disposed on the first and the second frame and comprising a semiconductor layer and a first and a second electrode on the semiconductor layer, wherein the first and the second frame comprise a first metal layer having a plurality of pores, and the first metal layer of the first and the second frame may comprise coupling portions in regions where the first metal layer overlaps the first and the second electrode, respectively.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: April 12, 2022
    Assignee: SUZHOU LEKIN SEMICONDUCTOR CO., LTD.
    Inventors: Ki Seok Kim, Hee Jeong Park, June O Song, Chang Man Lim
  • Patent number: 11281028
    Abstract: Disclosed herein are systems and architecture for thermal waveguide-based phase shifters which improve thermal efficiency by having multi-pass waveguides arranged under the heating element in a serpentine fashion, with the waveguides having mismatched propagation constants. The combination allows for an increase in phase shift without increasing the length or the power consumption of the resistive heating element by increasing the total length of waveguide being heated by a singular heating element.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: March 22, 2022
    Assignee: VOYANT PHOTONICS, INC.
    Inventors: Christopher T. Phare, Steven A. Miller, Viraj Shah
  • Patent number: 11237327
    Abstract: Disclosed are a method and structure providing a silicon-on-insulator substrate on which photonic devices are formed and in which a core material of a waveguide is optically decoupled from a support substrate by a shallow trench isolation region.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: February 1, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Roy E. Meade
  • Patent number: 11233092
    Abstract: A solid-state imaging apparatus includes a pixel array part in which a plurality of pixels are two-dimensionally arranged, in which each pixel has a first photoelectric conversion region formed above a semiconductor layer, a second photoelectric conversion region formed in the semiconductor layer, a first filter configured to transmit a light in a predetermined wavelength region corresponding to a color component, and a second filter having different transmission characteristics from the first filter, one photoelectric conversion region out of the first photoelectric conversion region and the second photoelectric conversion region photoelectrically converts a light in a visible light region, the other photoelectric conversion region photoelectrically converts a light in an infrared region, the first filter is formed above the first photoelectric conversion region, and the second filter has transmission characteristics of making wavelengths of lights in an infrared region absorbed in the other photoelectric co
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: January 25, 2022
    Assignee: SONY CORPORATION
    Inventors: Tetsuji Yamaguchi, Atsushi Toda, Itaru Oshiyama
  • Patent number: 11211300
    Abstract: To more securely hold reliability of an electronic component. There is provided an electronic component including a base material having a main face, at least one wiring formed on the main face of the base material, at least one pad provided at each end of the at least one wiring on the main face of the base material, a resist part formed to cover the at least one wiring on the main face of the base material, and a chip flip-chip mounted on the main face of the base material and connected to the base material via a bump bonded to the at least one pad, in which the resist part has a pad opening configured to expose the at least one pad bonded with the bump, and a circulation groove formed to be connected to the pad opening at one end as a connection end to the pad opening.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: December 28, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Ryo Itotani, Yuta Momiuchi, Hirokazu Nakayama, Tooru Kai, Miyoshi Togawa
  • Patent number: 11196947
    Abstract: A matrix-array optical sensor including individual detection cells each including at least one photodiode operating in photovoltaic mode, a first amplifier stage connected directly or indirectly to the photodiode and a capacitance connected directly or indirectly to the output of the first amplifier stage and the voltage of which varies with the illuminance on the photodiode, the sensor being arranged to a ensure a one-way flow of current to or from said capacitance in order to bring the latter to a voltage corresponding to an extremum of the illuminance during an operating cycle of the photodiode.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: December 7, 2021
    Assignee: New Imaging Technologies
    Inventor: Yang Ni
  • Patent number: 11189605
    Abstract: A transparent display comprises a display substrate having a display area and a bezel area adjacent to each of at least one corresponding side of the display area. The display substrate is at least partially transparent. Light-controlling elements are disposed in, on, or over the display substrate in the display area. Display wires are disposed in, on, or over the display substrate in the display area. The display wires are electrically connected to the light-controlling elements. Bezel wires are disposed in, on, or over the display substrate in the bezel area, the bezel wires electrically connected to respective ones of the display wires. A bezel transparency in the bezel area is greater than or equal to a display transparency in the display area.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: November 30, 2021
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Andrew Bower, Matthew Meitl, Brook Raymond, Erich Radauscher