With Backside Illumination (e.g., With A Thinned Central Area Or Non-absorbing Substrate) Patents (Class 257/460)
  • Patent number: 7288825
    Abstract: A photodetector is formed from a body of semiconductor material substantially surrounded by dielectric surfaces. A passivation process is applied to at least one surface to reduce the rate of carrier generation and recombination on that surface. Photocurrent is read out from at least one electrical contact, which is formed on a doped region whose surface lies entirely on a passivated surface. Unwanted leakage current from un-passivated surfaces is reduced through one of the following methods. (a) The un-passivated surface is separated from the photo-collecting contact by at least two junctions (b) The un-passivated surface is doped to a very high level, at least equal to the conduction band or valence band density of states of the semiconductor (c) An accumulation or inversion layer is formed on the un-passivated surface by the application of an electric field. Electrical contacts are made to all doped regions, and bias is applied so that a reverse bias is maintained across all junctions.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: October 30, 2007
    Assignee: Noble Peak Vision Corp.
    Inventors: Conor S. Rafferty, Clifford A. King
  • Patent number: 7271468
    Abstract: A charge coupled device for detecting electromagnetic and particle radiation is described. The device includes a high-resistivity semiconductor substrate, buried channel regions, gate electrode circuitry, and amplifier circuitry. For good spatial resolution and high performance, especially when operated at high voltages with full or nearly full depletion of the substrate, the device can also include a guard ring positioned near channel regions, a biased channel stop, and a biased polysilicon electrode over the channel stop.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: September 18, 2007
    Assignee: The Regents of the University of California
    Inventor: Stephen Edward Holland
  • Patent number: 7262498
    Abstract: An assembly includes a substrate, a device coupled to the substrate; a ring formed on the substrate; and one or more bonding pads formed on the substrate, wherein the ring and bonding pads are formed of a same material.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: August 28, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David M. Craig, Chien-Hua Chen, Charles C. Haluzak, Ronnie J. Yenchik
  • Patent number: 7235852
    Abstract: A variable optical attenuator. A PIN structure is integrated with an optical detector such as a PIN diode or an APD diode. When the PIN structure is forward biased, the light signal is not affected and is detected by the optical detector. When the PIN structure is reverse biased, the light signal is attenuated and the dynamic range of the optical detector can be increased.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: June 26, 2007
    Assignee: Finisar Corporation
    Inventors: Steve Wang, Xuejun Lu, Frank Levinson
  • Patent number: 7161222
    Abstract: An SOI layer is formed on a substrate of a semiconductor device, and one or more elements are formed on the SOI layer. One or more grooves are formed in a substrate of the semiconductor device by removing part of the substrate. The groove is formed directly below an element for which dielectric loss caused by the substrate is assumed. Because silicon crystal constituting a dielectric is only present thinly at the groove or is completely absent therefrom, the dielectric loss of the element located above this groove is then very small. If this element is a constituent element of a high frequency circuit, the high frequency circuit thus displays high responsiveness and stability with respect to high frequency signal processing.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: January 9, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Motoki Kobayashi, Fumio Ichikawa
  • Patent number: 7157742
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: January 2, 2007
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Patent number: 7154156
    Abstract: A solid-state imaging device includes: a base made of an insulation material and having a frame form in planar shape with an aperture formed at an inner region; a plurality of wirings provided on one surface of the base and extending toward an outer periphery of the base from a region along the aperture; and an imaging element mounted on the surface of the base with wirings provided thereon so that a light-receptive region of the imaging element faces the aperture. An end portion on the aperture side of each of the plurality of wirings forms an internal terminal portion and an end portion on the outer peripheral side of each of the plurality of wirings forms an external terminal portion, the internal terminal portion of the wiring being connected electrically with an electrode of the imaging element.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: December 26, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masanori Minamio, Mutsuo Tsuji, Kouichi Yamauchi
  • Patent number: 7112465
    Abstract: Ultra thin back-illuminated photodiode array structures and fabrication methods. The photodiode arrays are back illuminated photodiode arrays having a substrate of a first conductivity type having first and second surfaces, the second surface having a layer of the first conductivity type having a greater conductivity than the substrate. The arrays also have a matrix of regions of a first conductivity type of a higher conductivity than the substrate extending from the first surface of the substrate to the layer of the first conductivity type having a greater conductivity than the substrate, a plurality of regions of the second conductivity type interspersed within the matrix of regions of the first conductivity type and not extending to the layer of the first conductivity type on the second surface of the substrate, and a plurality of contacts on the first surface for making electrical contact to the matrix of regions of the first conductivity type and the plurality of regions of the second conductivity type.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: September 26, 2006
    Assignee: Semicoa Semiconductors
    Inventors: Alexander O. Goushcha, Chris Hicks, Richard A. Metzler, Mark Kalatsky, Eddie Bartley, Dan Tulbure
  • Patent number: 7098519
    Abstract: The invention relates to an avalanche radiation detector comprising a semiconductor substrate (HK) with a front side (VS) and a back side (RS), an avalanche region (AB) which is arranged in the semiconductor substrate (HK) on the front side (VS) of the semiconductor substrate (HK) and a control electrode (R) for adjusting the electric field strength in the avalanche region (AB). It is proposed that the control electrode (R) is also arranged on the front side of the semiconductor substrate (HK).
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: August 29, 2006
    Assignee: Max-Planck-Gesellschaft zur Forderung der Wissenchafter E.V.
    Inventors: Gerhard Lutz, Rainer H. Richter, Lothar Struder
  • Patent number: 7042060
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 9, 2006
    Assignee: Intevac, Inc.
    Inventors: Kenneth A Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Patent number: 6972469
    Abstract: A PIN diode includes a first p-area, an n-area, and in between an intermediate area on a first surface of a substrate, wherein a doping concentration of the intermediate area is lower than a doping concentration of the p-area and lower than a doping concentration of the n-area. Further, the PIN diode includes a first electrically conductive member, which is arranged on a side of the p-area, which faces away from the intermediate area, and a second electrically conductive member, which is arranged on a side of the n-area, which faces away from the intermediate area. The PIN diode is preferably separated from the substrate by an insulating layer, covered by a further insulating layer on the surface, which faces away from the substrate, and laterally surrounded by a trench filled with an insulating material, such that it is essentially fully insulated and encapsulated.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: December 6, 2005
    Assignee: Infineon Technologies AG
    Inventors: Raimund Peichl, Philipp Seng
  • Patent number: 6969839
    Abstract: This invention deals with the reduction in fixed pattern noise in backthinned CMOS imagers primarily for use in a vacuum environment. Reduction is achieved by effectively shielding the imager. This is done by depositing a conductive layer on the front surface prior to the attachment of a support member or by incorporating a conductive layer into the die at least extensive with the analog circuitry. This also may be achieved by leaving a void adjacent to the analog circuitry area. This void, filled with air or a vacuum specifies a low dielectric layer over critical analog circuitry. Finally there is extended across the die an adhesive or underfill material after which a support member is placed onto the underfill to provide structure to the die. The underfill and the support layer should have thermal coefficients of expansion that substantially match that of the silicon.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: November 29, 2005
    Assignee: Intevac, Inc.
    Inventor: Kenneth A Costello
  • Patent number: 6933489
    Abstract: Disclosed are a back illuminated photodiode array, which is mass-producible and has an ultra-thin high-performance single-sided electrode structure, and a method of manufacturing the same. Both electrodes of a photodiode on a semiconductor substrate 1, which are anode and cathode, are collected on one plane of the substrate. The collection of the electrodes is achieved by electrically introducing one of them to the other plane via a hole H penetrating the semiconductor substrate 1. The semiconductor substrate 1 is thinned by polishing, and thus the time for forming the hole H is shortened. Moreover, during the manufacturing process, a supporting plate 3 is attached to the semiconductor substrate for reinforcing the thinned substrate. Thus, handling of a wafer during the process becomes easy and complies with mass production.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: August 23, 2005
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Yoshimaro Fujii, Kouji Okamoto, Akira Sakamoto
  • Patent number: 6930327
    Abstract: There are provided a semiconductor substrate 101 on which solid-state imaging devices are formed, and a translucent member 201 provided onto a surface of the semiconductor substrate such that spaces are provided to oppose to light receiving areas of the solid-state imaging devices, wherein external connecting terminals are arranged on an opposing surface of the semiconductor substrate 101 to a solid-state imaging device forming surface, and the external connecting terminals are connected to the solid-state imaging devices via through-holes provided in the semiconductor substrate 101.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: August 16, 2005
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Hiroshi Maeda, Kazuhiro Nishida, Yoshihisa Negishi, Shunichi Hosaka
  • Patent number: 6924541
    Abstract: A semiconductor photodetection device includes a semiconductor structure including an optical absorption layer having a photo-incidence surface on a first side thereof, a dielectric reflecting layer formed on a second side of the semiconductor structure opposite to the first side, a contact electrode surrounding the dielectric reflecting layer and contacting with the semiconductor structure, and a close contact electrode covering the dielectric reflecting layer and contacting with the contact electrode and the dielectric reflecting layer, wherein the close contact electrode adheres to the dielectric reflecting layer more strongly than to the contact electrode.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Yoshihiro Yoneda, Ikuo Hanawa
  • Patent number: 6873034
    Abstract: The present invention provides a solid-state imaging device comprising: a transparent substrate transmitting light therethrough; a first chip including a solid-state imaging element having a light receiving portion; a first resin providing airtight sealing between the first chip and the transparent substrate; a second chip opposite to the transparent substrate with respect to the first chip; and second resin die bonding the second chip to the first chip, wherein the first resin and the second resin are made of the same material.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: March 29, 2005
    Assignees: Sharp Kabushiki Kaisha, Sun-S Co. Ltd.
    Inventors: Masao Nakamura, Kazumasa Doi, Kouji Shidahara
  • Patent number: 6872992
    Abstract: A CCD unit is provided on the surface side of a thin shape section that is formed on a first substrate. In the CCD unit, first cells are provided and disposed in the form of an array in a direction in which the thin shape section extends. An InGaAs photodiode unit is provided at a second substrate in the InGaAs photodiode unit, second cells are provided and disposed in an array in the same direction as the first cells while having equal pitches to the first cells. The first substrate and second substrate are stacked over each other in such a manner that the surface of the first substrate and a second incidence plane of the second substrate oppose each other to ensure that part of a first photoelectric conversion region of the CCD unit correspondingly overlap part of a second photoelectric conversion region of the InGaAs photodiode unit when seen in plan view.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 29, 2005
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Masaharu Muramatsu
  • Patent number: 6835990
    Abstract: A semiconductor light receiving element has a semiconductor portion. The semiconductor portion includes a substrate, a light detecting portion, and a filter portion. The substrate, the light detecting portion, and the filter portion are provided sequentially in a direction of a predetermined axis. The light detecting portion has a light absorbing layer including a III-V semiconductor layer, a window layer including a III-V semiconductor layer, and an anode semiconductor region. The light absorbing layer is an n or i conductivity type semiconductor layer. The light absorbing layer is provided between a III-V semiconductor layer and the window layer. The light detecting portion is provided on one face of the semiconductor substrate with the III-V semiconductor layer interposed therebetween. The filter portion includes InGaAsP semiconductor layers and III-V semiconductor layers.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: December 28, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yasuhiro Iguchi, Akira Yamaguchi, Manabu Shiozaki, Takashi Iwasaki, Kenji Ohki
  • Publication number: 20040245593
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Application
    Filed: July 15, 2004
    Publication date: December 9, 2004
    Inventors: Kenneth A. Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Patent number: 6815789
    Abstract: A semiconductor electronic device includes a die of semiconductor material and a support. The die of semiconductor material includes an integrated electronic circuit and a plurality of contact pads associated with the electronic circuit and connected electrically to the support by wire leads. Each contact pad may include a lower layer of aluminum, copper, or alloys thereof, and an upper layer including at least one film of a metal and/or metallic alloy including nickel, palladium, or alloys thereof, and being deposited by an electroless chemical process.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: November 9, 2004
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Tiziani, Carlo Passagrilli
  • Publication number: 20040169248
    Abstract: Backthinning in an area selective manner is applied to imaging sensors 12 for use in electron bombarded devices. A further arrangement results in an array of collimators 51 aligned with pixels 42 or groups of pixels providing improved image contrast of such image sensor. Provision of a thin P-doped layer 52 on the illuminated rear surface provides both a diffusion barrier resulting in improved resolution and a functional shield for reference pixels. A gradient in concentration of P-doped layer 52 optimizes electron collection at the pixel array.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 2, 2004
    Applicant: INTEVAC, INC.
    Inventors: Kenneth A. Costello, Kevin P. Fairbairn, David W. Brown, Yun Chung, Patricia Gober, Edward Yin
  • Publication number: 20040159775
    Abstract: A QWIP structure is disclosed that is configured with enhanced optical coupling to improve absorption capability and efficiency. A waffle-type light-coupling grating having a pattern of etched holes operates to improve absorption by preventing photons from bouncing out of the detector sensing areas. A post-type light coupling grating can also be used. Parameters of the grating, including its orientation, pitch, and etch depth, can be adjusted to optimize specific color detection. The grating can include a hybrid metal layer including both ohmic and reflective qualities to further improve quantum and conversion efficiency. A “photon-in-a-box” configuration is also disclosed, where sides of the QWIP sensing areas are coated with reflective metal to further inhibit the escaping of photons. The material design and number of quantum wells per QWIP can be selected so as to exploit the avalanche effect, thereby increasing device responsivity.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 19, 2004
    Applicant: BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
    Inventors: Mani Sundaram, Axel R. Reisinger
  • Patent number: 6777769
    Abstract: A light-receiving element, comprises an absorption layer formed on a semiconductor substrate, a window layer formed on the absorption layer, a first electrode formed on the window layer, a second electrode formed on the window layer and electrically connected to the first electrode, and a diffusion region which is formed in the absorption layer and the window layer and is formed between the first electrode and the substrate and between the second electrode and the substrate.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: August 17, 2004
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takeshi Higuchi, Naoki Tsukiji
  • Patent number: 6753587
    Abstract: A high response speed semiconductor photo detecting device having a thin photo absorption layer which avoids an optical efficiency loss. The semiconductor photo detecting devices are formed on a semiconductor substrate having an inclined cleavage face to a principal plane of the substrate. An incoming photo signal is input to the cleavage face perpendicularly.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: June 22, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Akira Furuya, Tatsunori Shirai
  • Patent number: 6724062
    Abstract: A semiconductor energy detector as disclosed herein is arranged so that an aluminum wiring pattern is formed on the front side of transfer electrodes of a CCD vertical shift register, which pattern includes meander-shaped auxiliary wirings for performing auxiliary application/supplement and additional wirings for performing auxiliary supplement of transfer voltages in a way independent of the auxiliary wirings with respective ones of such wirings being connected to corresponding transfer electrodes to thereby avoid a problem as to lead resistivities at those transfer electrodes made of polycrystalline silicon, thus achieving the intended charge transfer at high speeds with high efficiency.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: April 20, 2004
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hiroshi Akahori, Hisanori Suzuki, Kazuhisa Miyaguchi, Masaharu Muramatsu, Koei Yamamoto
  • Patent number: 6720588
    Abstract: An improved APD structure and an improved manner of operating APD's particularly beneficial for a single photon detection applications are provided. An APD is provided having an absorption region, a control region, and a multiplication region, wherein the multiplication region has a k value of approximately 1. In one example the multiplication region comprises a doped InP layer. The field control layer is designed so as to produce a reduction of electric field that is equal to the multiplication region's breakdown electric field, plus or minus 5V/&mgr;m. The method comprises applying a potential across the APD so as to induce an electric field across the multiplication region that exceeds the breakdown field; while having the control region shield the absorption region to prevent excessive noise.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: April 13, 2004
    Assignee: Optonics, Inc.
    Inventor: James S. Vickers
  • Publication number: 20040041225
    Abstract: Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of the anode electrode and the cathode electrode. A ratio of the peak impurity concentration Np to an averaged impurity concentration Ndm in the n-drift layer is in the range of 1 to 5. This provides a diode and a manufacturing method thereof by which oscillations in voltage and current at reverse recovery are inhibited to achieve enhancement both in high speed and low-loss characteristics and in soft recovery characteristics.
    Type: Application
    Filed: February 20, 2003
    Publication date: March 4, 2004
    Inventor: Michio Nemoto
  • Patent number: 6696740
    Abstract: A photodiode that is used in an optical communication system using two different wavelengths, &lgr;1 and &lgr;2 (&lgr;1<&lgr;2), and that enables a reduction in the optical crosstalk caused by outgoing light having a longer wavelengths, &lgr;2. A photodiode that receives light having a shorter wavelengths, &lgr;1, is provided with an absorption layer made of a material having a bandgap wavelength, &lgr;g. (&lgr;1<&lgr;g<&lgr;2), to detect the light having &lgr;1. A filter layer that absorbs unwanted light having &lgr;2 is provided over the absorption layer so that the light having &lgr;2 cannot return to the absorption layer after passing through it once.
    Type: Grant
    Filed: December 6, 2002
    Date of Patent: February 24, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshiki Kuhara, Yasuhiro Iguchi
  • Patent number: 6690079
    Abstract: The invention relates to a back-illuminated type light-receiving device. The light-receiving device can be used for a wide frequency range. The device has a structure in which a p-type semiconductor layer and an n-type semiconductor layer are successively stacked on the front side of the semiconductor substrate. A light-receiving portion is provided on the back side of the substrate. A dopant diffusion suppressing layer may be provided between the substrate and the p-type layer.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: February 10, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yasushi Fujimura, Hiroshi Yano, Tsukuru Katsuyama
  • Patent number: 6683326
    Abstract: The present invention relates to a high-sensitivity top-electrode and bottom-illuminated type photodiode. The device consists of a highly doped buffer layer, a photo-detecting layer on a semi-insulating substrate. An electrode is formed on the conductive domain that is formed in the photo-detecting layer, and another electrode is formed on the partly exposed peripheral area of the highly-doped buffer layer by removing a part of the photo-detecting layer. As the semi-insulating substrate absorbs less light in the substrate, a decrease of sensitivity by the substrate absorption can be prevented.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: January 27, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yasuhiro Iguchi, Yoshiki Kuhara
  • Patent number: 6667528
    Abstract: A photodetector (and method for producing the same) includes a semiconductor substrate, a buried insulator formed on the substrate, a buried mirror formed on the buried insulator, a semiconductor-on-insulator (SOI) layer formed on the conductor, alternating n-type and p-type doped fingers formed in the semiconductor-on-insulator layer, and a backside contact to one of the p-type doped fingers and the n-type doped fingers.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: December 23, 2003
    Assignee: International Business Machines Corporation
    Inventors: Guy Moshe Cohen, Kern Rim, Dennis L. Rogers, Jeremy Daniel Schaub, Min Yang
  • Patent number: 6625367
    Abstract: The present invention provides an optoelectronic device that includes an optical active layer formed over a substrate and an active region formed in the optical active layer. The optoelectronic device further includes a P-contact and an N-contact formed over a same side of the substrate and associated with the active region, the N-contact is located within a trench formed in the optical active layer and contacts the substrate within the trench.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: September 23, 2003
    Assignee: TriQuint Technology Holding Co.
    Inventors: David G. Coult, Gustav E. Derkits, Jr., Charles W. Lentz, Bryan P. Segner
  • Patent number: 6545333
    Abstract: A device with an optically controlled VT is disclosed. The device includes a semiconductor die which includes an FET, the FET having a gate on an upper surface of a substrate, a body under the gate and a source contacting the body forming a body-to-source junction. A light source is provided for exposing the body to light from the lower surface of the substrate.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: April 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: Mark B. Ketchen, Edward J. Nowak, Jed H. Rankin, Keith C. Stevens
  • Patent number: 6541753
    Abstract: A substrate beam 1b is formed so as to divide a membrane for enabling detection of an energy ray upon back illumination, there by suppressing distortion of the membrane and preventing defocus upon detection due to the distortion, or the like. The distance is set sufficiently short from each region of the membrane to a substrate frame or to the substrate beam, thereby decreasing substrate resistance and enabling high-speed reading operation.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: April 1, 2003
    Assignee: Hammatsu Photonics K.K.
    Inventors: Hiroshi Akahori, Masaharu Muramatsu, Koei Yamamoto
  • Patent number: 6489659
    Abstract: A non-hermetic APD for operation in a moisture-containing ambient comprises an InP/InGaAsP-containing Group III-V compound semiconductor body and a p-n junction formed in the body. Typically the junction intersects a top surface of the body. A patterned dielectric layer is formed on the surface so as to cover at least those regions of the surface that are intersected by the junction. An electrode is formed in an opening in the dielectric layer so as to make electrical contact with one side of the junction. Importantly, the thickness of the dielectric layer is sufficient to reduce the leakage current through it to less than about 1 nA when the operating voltage is in the range of about 20-100 V. In accordance with a preferred embodiment, the thickness of the dielectric layer is greater than about 2 &mgr;m when the applied voltage is in excess of about 20 V. Moreover, the composition of dielectric layer may be either inorganic (e.g., a silicon nitride) or a combination of inorganic and organic materials.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: December 3, 2002
    Assignee: Agere Systems Inc.
    Inventors: Utpal Kumar Chakrabarti, Robert Benedict Comizzoli, John William Osenbach, Christopher Theis
  • Patent number: 6476455
    Abstract: An infrared sensor includes a concavity made on a side of a semiconductor substrate and a plurality of sensing areas formed in a thin film area on the back side of the bottom of the concavity. Groups of two thermocouples, three thermocouples and four thermocouples reside in a sensing area in the central part of the thin film area, in another sensing area adjacent the central sensing area and in yet other sensing areas adjacent to the central sensing area, respectively, to compensate for the heterogeneity of heat transfer in the thin film area. Therefore, sensitivity loss is suppressed in the sensing area having a boundary with the substrate. More specifically, the difference in sensitivity between the sensing areas is reduced.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: November 5, 2002
    Assignee: Denso Corporation
    Inventors: Inao Toyoda, Kazuaki Hamamoto
  • Patent number: 6423980
    Abstract: Techniques for coupling radiation into a quantum-well detector by using a two-dimensional array of grating cells to form at least three different grating directions to provide efficient coupling.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 23, 2002
    Assignee: California Institute of Technology
    Inventors: Daniel W. Wilson, John K. Liu, Sumith V. Bandara, Sarath D. Gunapala
  • Patent number: 6303943
    Abstract: Organic photodetectors with switchable photosensitivity are achieved using organic photoactive layers in electrode/organic/electrode structures. The photosensitivity can be switched on and off by the biasing voltage across the detectors, the switching voltage imparting photosensitivity above 1 mA/W at a preselected operating bias and near zero photosensitivity at a cut-off bias substantially equivalent in magnitude to the built-in potential of the photodetector. The photocurrent can be probled with a read-out circuit in the loop. These photodetectors can be arranged in linear arrays or in two-dimensional matrices that function as high performance, linear or two-dimensional image sensors.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: October 16, 2001
    Assignee: Uniax Corporation
    Inventors: Gang Yu, Yong Cao
  • Patent number: 6297442
    Abstract: It is to provide an essentially transparent solar cell of high efficiency that can be used by accumulating with a display device to generate electricity simultaneously with utilization of the display function, a self-power-supply display device comprising the same, and a process for producing the solar cell. The solar cell comprises at least a transparent conductive substrate having thereon a photoconductor layer that is transparent to a visible ray and has an absorbance of 0.8 or less at a wavelength of from 400 to 800 nm, and a transparent conductive electrode in this order. An embodiment, in which the photoconductor layer contains at least one element selected from Group IIIA elements and at least one element selected from Group VA elements in the Periodic Table, and an embodiment, in which the photoconductor layer contains a metallic oxide semiconductor, are preferred.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: October 2, 2001
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shigeru Yagi, Seiji Suzuki, Nobuyuki Torigoe
  • Patent number: 6281519
    Abstract: A quantum semiconductor memory device includes a quantum structure formed on a substrate, wherein the quantum structure includes a plurality of self-organized quantum dots forming a strained heteroepitaxial system with respect to the substrate and an accumulation layer formed adjacent to the self-organized quantum dots, and wherein the self-organized quantum dots are formed of a semiconductor crystal having a composition set such that quantum levels of the self-organized quantum dots are located higher than a conduction band of the accumulation layer.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: August 28, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sugiyama, Yoshiaki Nakata
  • Patent number: 6281561
    Abstract: A multicolor sensor with a plurality of diode functions comprising a succession of layers with p and n doped layers. A microcrystalline layer is thus constructed from at least one of the internal contacts for contacting. According to the invention, pin, nip, npin and/or pnip structures are provided to form the diode functions.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: August 28, 2001
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Helmut Stiebig, Dietmar Knipp, Joachim Fölsch, Heribert Wagner
  • Patent number: 6265727
    Abstract: A solar blind p-i-n photodiode where the active i-region has a bandgap larger than the bandgap of one or both of the n-type and p-type regions. The preferred embodiment photodiode is GaN based and Al is added to the regions to obtain the desired bandgap profiles. Al is added to the i-region to obtain a bandgap large enough to be responsive to light in the solar blind spectrum. By having a smaller bandgap p-type and n-type region, the problems associated with growing highly doped AlGaN are avoided. In most embodiments the light incident on the photodiode illuminates the p-type region first. The p-type region is grown thin compared to conventional photodiodes which allows the majority of light incident to pass through the p-type region to the i-region. Light with sufficient energy will be detected in the i-region. The inventive photodiode can also be used in the fabrication of backside illuminated solar blind photodiodes that are useful for photodiode arrays.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: July 24, 2001
    Assignee: Cree Lighting Company
    Inventors: Peter Kozodoy, Eric J. Tarsa
  • Patent number: 6259085
    Abstract: A backside illuminated charge coupled device (CCD) is formed of a relatively thick high resistivity photon sensitive silicon substrate, with frontside electronic circuitry, and an optically transparent backside ohmic contact for applying a backside voltage which is at least sufficient to substantially fully deplete the substrate. A greater bias voltage which overdepletes the substrate may also be applied. One way of applying the bias voltage to the substrate is by physically connecting the voltage source to the ohmic contact. An alternate way of applying the bias voltage to the substrate is to physically connect the voltage source to the frontside of the substrate, at a point outside the depletion region. Thus both frontside and backside contacts can be used for backside biasing to fully deplete the substrate. Also, high resistivity gaps around the CCD channels and electrically floating channel stop regions can be provided in the CCD array around the CCD channels.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: July 10, 2001
    Assignee: The Regents of the University of California
    Inventor: Stephen Edward Holland
  • Patent number: 6239474
    Abstract: The present invention is to prevent a back metal electrode film from being insufficiently processed even if an amorphous silicon related material film is thinned, wherein a transparent conductive film 2, an amorphous silicon related material film 3, and a back metal electrode film 4 are formed in this order on one main surface of a light transmissive insulation substrate 1, a brittle film 5 having higher hardness than that of the back metal electrode film 4 in at least a fused state is provided on the back metal electrode film 4, and an energy beam is irradiated from the other main surface of the light transmissive insulation substrate 1, to remove the amorphous silicon related material film 3, the back metal electrode film 4, and the brittle film 5.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: May 29, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Wataru Shinohara, Hisaki Tarui
  • Patent number: 6078070
    Abstract: A composite-layer semiconductor device includes a gate above a host substrate, an n++ contact layer above the gate, and source and drain ohmic contacts applied to the n++ contact layer. The source and drain ohmic contacts define a central gate location which is recessed through the n++ contact layer toward the gate. The source and drain ohmic contacts create a barrier to chemical etching so that a current path below the central gate location can be incrementally recessed in repeated steps to precisely tailor the operating mode of the device for depletion or enhancement applications. The composite-layer semiconductor device is fabricated by depositing a gate on an n++ contact layer above a semi-insulating substrate. The semi-insulating substrate and gate are flipped onto an epoxy layer on the host substrate so that the gate is secured to the epoxy layer and the semi-insulating substrate presents an exposed backside. A portion of the exposed backside is removed.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: June 20, 2000
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: Gerald D. Robinson
  • Patent number: 6028323
    Abstract: A method for infrared (IR) imaging using a panel made of integrated GaAs quantum well infrared photodetector (QWIP) and near-infrared (NIR) or visible light emitting diode (LED). The panel is a large area diode with an optical window for top illumination or without the window for backside illumination. The integrated device acts as a photon energy up-converter which converts infrared light of wavelength longer than about 1.1 .mu.m to near infrared or visible light which falls into the silicon detector spectral range. Using this device, an IR image is up-converted and the resulting NIR or visible image is then detected by an off-the-shelf silicon charge-coupled-device (CCD) camera The image detected on the CCD camera represents the original infrared image. A specific device embodiment for converting 9 .mu.m IR to 870 nm NIR is given.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: February 22, 2000
    Assignee: National Research Council of Canada
    Inventor: Hui-Chun Liu
  • Patent number: 6025585
    Abstract: The invention comprises a combination of a low resistivity, or electrically conducting, silicon layer that is transparent to long or short wavelength photons and is attached to the backside of a photon-sensitive layer of silicon, such as a silicon wafer or chip. The window is applied to photon sensitive silicon devices such as photodiodes, charge-coupled devices, active pixel sensors, low-energy x-ray sensors and other radiation detectors. The silicon window is applied to the back side of a photosensitive silicon wafer or chip so that photons can illuminate the device from the backside without interference from the circuit printed on the frontside. A voltage sufficient to fully deplete the high-resistivity photosensitive silicon volume of charge carriers is applied between the low-resistivity back window and the front, patterned, side of the device. This allows photon-induced charge created at the backside to reach the front side of the device and to be processed by any circuitry attached to the front side.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: February 15, 2000
    Assignee: The Regents of the University of California
    Inventor: Stephen Edward Holland
  • Patent number: 5998806
    Abstract: A pin or nip layer sequence, especially for use as a color sensor in electrooptical components. The bond gap of a first intrinsic (i) layer closer to the light input side is greater than the bond gap of a second i layer adjacent to the first and further removed from the light input side. The new .mu..tau. product for the i layer furthest distant from the layer is greater than the .mu..tau. product of an i layer closer is the n layer.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: December 7, 1999
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Helmut Stiebig, Joachim Folsch, Dietmar Knipp
  • Patent number: 5959339
    Abstract: An array (41) is comprised of a plurality of radiation detectors (10, 10') each of which includes a first photoresponsive diode (D1) having an anode and a cathode that is coupled to an anode of a second photoresponsive diode (D2). The first photoresponsive diode responds to electromagnetic radiation within a first band of wavelengths and the second photoresponsive diode responds to electromagnetic radiation within a second band of wavelengths. Each radiation detector further includes a first electrical contact (26) that is conductively coupled to the anode of the first photoresponsive diode; a second electrical contact (28) that is conductively coupled to the cathode of the first photoresponsive diode and to the anode of the second photoresponsive diode; and a third electrical contact (30) that is conductively coupled to a cathode of each second photoresponsive diode of the array. The electrical contacts are coupled during operation to respective bias potentials.
    Type: Grant
    Filed: March 19, 1996
    Date of Patent: September 28, 1999
    Assignee: Raytheon Company
    Inventors: George R. Chapman, Kenneth Kosai
  • Patent number: 5923071
    Abstract: A semiconductor substrate having a silicon-on-insulator structure may achieve superior performance by utilizing a low oxygen content monocrystalline silicon thin film layer for device formation. A supporting substrate, which may comprise a transparent material, such as quartz, or which may be silicon, has an insulating film disposed thereover. The insulating film preferably has a lower diffusion coefficient with respect to impurities than the monocrystalline silicon thin film, which is provided thereover. In accordance with this structure, oxygen particles are not introduced into the monocrystalline thin film and the thin film has a low oxygen concentration to maximize the minority carrier lifetime, enhance device performance characteristics, and prevent the occurrence of latch up.
    Type: Grant
    Filed: September 27, 1993
    Date of Patent: July 13, 1999
    Assignee: Seiko Instruments Inc.
    Inventor: Yutaka Saito