With Field Electrode Under Or On A Side Edge Of Amorphous Semiconductor Material (e.g., Vertical Current Path) Patents (Class 257/60)
  • Patent number: 8847230
    Abstract: A thin film transistor is provided that includes a gate electrode, a source electrode, and a drain electrode, an oxide semiconductor active layer formed over the gate electrode, a fixed charge storage layer formed over a portion of the oxide semiconductor active layer, and a fixed charge control electrode formed over the fixed charged storage layer.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: September 30, 2014
    Assignee: Sony Corporation
    Inventors: Yasuhiro Terai, Eri Fukumoto, Toshiaki Arai
  • Patent number: 8847232
    Abstract: A transistor includes a substrate. A first electrically conductive material layer, having a thickness, is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer overhangs the first electrically conductive material layer. An electrically insulating material layer, having a thickness, is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. The thickness of the first electrically conductive material layer is greater than the thickness of the electrically insulating material layer.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: September 30, 2014
    Assignee: Eastman Kodak Company
    Inventors: Lee W. Tutt, Shelby F. Nelson
  • Patent number: 8841677
    Abstract: A thin film transistor array panel includes: a gate line and a storage electrode on a substrate and separated from each other; a gate insulating layer covering the gate line and the storage electrode; a data line crossing the gate line and being on the gate insulating layer; a thin film transistor formed at a crossing region of the gate line and the data line, and including a gate electrode, a source electrode, and a drain electrode; a passivation layer exposing a portion of the drain electrode and formed on the thin film transistor and the data line; and a pixel electrode contacting the drain electrode and overlapping the storage electrode with the gate insulating layer interposed therebetween.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: September 23, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sun-Kyo Jung
  • Patent number: 8823005
    Abstract: A thin-film transistor (TFT) and a method of manufacturing the same are disclosed herein. The TFT may include a gate electrode disposed on an insulating substrate, an insulating layer disposed on the insulating substrate and the gate electrode, an active layer pattern disposed on the insulating layer to overlap the gate electrode, a source electrode disposed on the insulating layer and at least part of which overlaps the active layer pattern, and a drain electrode which is separated from the source electrode and at least part of which overlaps the active layer pattern. A first ohmic contact layer pattern may be disposed between the active layer pattern and the source electrode and between the active layer pattern and the drain electrode. The first ohmic contact layer may have higher nitrogen content on its surface than in other portions of the first ohmic contact layer.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: September 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: O-Sung Seo, Seong-Hun Kim, Yang-Ho Bae, Jean-Ho Song
  • Patent number: 8803155
    Abstract: According to an aspect of the present invention, there is provided a thin-film transistor (TFT) sensor, including a bottom gate electrode on a substrate, an insulation layer on the bottom gate electrode, an active layer in a donut shape on the insulation layer, the active layer including a channel through which a current generated by a charged body flows, an etch stop layer on the active layer, the etch stop layer including a first contact hole and a second contact hole, and a source electrode and a drain electrode burying the first and second contact holes, the source and drain electrodes being disposed on the etch stop layer so as to face each other.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: August 12, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mu-Gyeom Kim, Chang-Mo Park
  • Publication number: 20140218652
    Abstract: [Problem] A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. [Solving Means] By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
    Type: Application
    Filed: November 18, 2013
    Publication date: August 7, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hideaki KUWABARA, Yasuyuki ARAI
  • Patent number: 8779428
    Abstract: A transistor includes a first active layer having a first channel region and a second active layer having a second channel region. A first gate of the transistor is configured to control electrical characteristics of at least the first active layer and a second gate is configured to control electrical characteristics of at least the second active layer. A source electrode contacts the first and second active layers. A drain electrode also contacts the first and second active layers.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: July 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eok-su Kim, Sang-yoon Lee, Myung-kwan Ryu
  • Patent number: 8779418
    Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Publication number: 20140175434
    Abstract: A thin film transistor, comprising: a substrate; a first electrode formed on the substrate; a first insulation layer formed on the first electrode; a gate electrode formed on the first insulation layer; a second insulation layer formed on the gate electrode; an active layer penetrating through the first and second insulation layers and electrically isolated from the gate electrode; and a second electrode formed on the active layer and electrically connected to the first electrode through the active layer, wherein the first electrode is one of a source electrode and a drain electrode, and the second electrode is the other of the source electrode and the drain electrode.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: BOE Technology Group Co., Ltd.
    Inventor: Guangcai Yuan
  • Patent number: 8754418
    Abstract: Disclosed is a semiconductor device 100A that has first lightly doped drain regions 31A1 and 32A1 between a source region 34A1 and a channel region 33A1 of a first conductive-type driver circuit TFT 10A1 and/or between a drain region 35A1 and the channel region 33A1 of the first conductive-type driver circuit TFT 10A1, and second lightly doped drain regions 31C and 32C between a source region 34C and a channel region 33C of a first conductive-type pixel TFT 10C and/or between a drain region 35C and the channel region 33C of the first conductive-type pixel TFT 10C, in which the first lightly doped drain regions 31A1 and 32A1 have first conductive-type impurities n1 at a first impurity concentration C1, and the second lightly doped drain regions 31C and 32C have first conductive-type impurities n1 at the first impurity concentration C1 and second conductive-type impurities p2 at a second impurity concentration C2.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: June 17, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kazushige Hotta
  • Patent number: 8723294
    Abstract: It is possible to suppress a change in a resistance value caused by a potential of a semiconductor substrate 10 near a resistance element layer 13, a power line passing on or above the resistance element layer, or a signal line, without generating useless current or a distortion in a signal. A first conductive layer 15 biased by the potential of a first electrode 11 and a second conductive layer 16 biased by the potential of a second electrode 12 cover below the resistance element layer equally. A change in the resistance value caused by a potential difference between the resistance element layer and a neighboring semiconductor substrate 14 is cancelled by the first conductive layer and the second conductive layer covering at least one of above and below the resistance element layer with both ends biased, so the change in the resistance value is suppressed.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: May 13, 2014
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Ken Yamamura
  • Patent number: 8697535
    Abstract: A thin film transistor substrate includes a substrate, a gate electrode on the substrate, an active layer on or below the gate electrode (the active layer at least partially overlapping the gate electrode) including a first active region and a second active region, the first active region and the second active region facing each other and extending beyond the gate electrode, a source electrode electrically connected to the first active region and a drain electrode electrically connected to the second active region, wherein the active layer includes a recess region which is at least partially recessed from a surface of the active layer facing the gate electrode, and the recess region includes a portion extending between the first active region and the second active region.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Jin Kim, Sang-Jae Yeo, Dae-Sung Choi
  • Patent number: 8653527
    Abstract: Disclosed is a method for manufacturing a thin film transistor in which a semiconductor film in a channel portion is provided between a source electrode and a drain electrode, wherein a partition layer (a bank) can be appropriately formed. The method comprises the steps of: forming two underlying electrodes on an underlying layer; forming a partition layer on the surface of the underlying layer containing the two underlying electrodes so as to surround an area where the source electrode and the drain electrode are to be formed; forming the source electrode and the drain electrode by a plating method on the surfaces of the two underlying electrodes, which are surrounded by the partition layer; and applying semiconductor solution, in which a semiconductor material is dissolved or dispersed, to the area surrounded by the partition layer so that a semiconductor film is formed in the area.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: February 18, 2014
    Assignee: Konica Minolta Holdings, Inc.
    Inventor: Jun Yamada
  • Patent number: 8643482
    Abstract: A vehicle has a display device which widens the field of view (visible area) reflected by a side mirror or a back mirror mounted on the vehicle. To enable a driver driving the vehicle to confirm safety even when it is difficult for the driver to visually recognize some of objects surrounding the vehicle, a liquid crystal display device or an EL display device is provided in the side mirror (door mirror), the back mirror (room mirror) or in an interior portion of the vehicle. A camera is mounted on the vehicle and an image from the camera is displayed on the display device. Further, information read from a sensor (distance measuring sensor) having the function of measuring the distance to another vehicle, and a sensor (impact sensor) having the function of sensing an externally applied impact force larger than a predetermined value is displayed on the display device.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8624259
    Abstract: An organic light-emitting display device includes a substrate; a thin-film transistor on the substrate; a first insulating layer covering the thin-film transistor; a first electrode on the first insulating layer, and electrically connected to the thin-film transistor; a second insulating layer on the first insulating layer so as to cover the first electrode, and having an opening for exposing a part of the first electrode; a porous member in the second insulating layer; a second electrode on the second insulating layer, and facing the first electrode so as to correspond to the opening; and an organic emission layer between the first electrode and the second electrode so as to correspond to the opening. The organic light-emitting display device may prevent degradation of characteristics of an organic light-emitting device due to discharge of gas from an organic material.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon-Hwa Lee, Won-Jong Kim, Ji-Young Choung, Joon-Gu Lee, Darby Choi, Young-Woo Song, Jong-Hyuk Lee
  • Patent number: 8624254
    Abstract: A highly reliable transistor in which change in electrical characteristics is suppressed is provided. A highly reliable transistor in which change in electrical characteristics is suppressed is manufactured with high productivity. A display device with less image deterioration over time is provided. An inverted staggered thin film transistor which includes, between a gate insulating film and impurity semiconductor films functioning as source and drain regions, a semiconductor stacked body including a microcrystalline semiconductor region and a pair of amorphous semiconductor regions. In the microcrystalline semiconductor region, the nitrogen concentration on the gate insulating film side is low and the nitrogen concentration in a region in contact with the amorphous semiconductor is high. Further, an interface with the amorphous semiconductor has unevenness.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: January 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuji Egi, Tetsuhiro Tanaka, Toshiyuki Isa, Hidekazu Miyairi, Koji Dairiki, Yoichi Kurosawa, Kunihiko Suzuki
  • Patent number: 8598587
    Abstract: An optical sensor preventing damage to a semiconductor layer, and preventing a disconnection and a short circuit of a source electrode and a drain electrode, and a manufacturing method of the optical sensor is provided. The optical sensor includes: a substrate; an infrared ray sensing thin film transistor including a first semiconductor layer disposed on the substrate; a visible ray sensing thin film transistor including a second semiconductor layer disposed on the substrate; a switching thin film transistor including a third semiconductor layer disposed on the substrate; and a semiconductor passivation layer enclosing an upper surface and a side surface of an end portion of at least one of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun Jong Yeo, Hong-Kee Chin, Byeong Hoon Cho, Ki-Hun Jeong, Jung Suk Bang, Woong Kwon Kim, Sung Ryul Kim, Dae Cheol Kim, Kun-Wook Han
  • Patent number: 8598586
    Abstract: Disclosed is a thin film transistor including: a gate insulating layer covering a gate electrode; a microcrystalline semiconductor region over the gate insulating layer; a pair of amorphous semiconductor region over the microcrystalline semiconductor; a pair of impurity semiconductor layers over the amorphous semiconductor regions; and wirings over the impurity semiconductor layers. The microcrystalline semiconductor region has a surface having a projection and depression on the gate insulating layer side. The microcrystalline semiconductor region includes a first microcrystalline semiconductor region which is not covered with the amorphous regions and a second microcrystalline semiconductor region which is in contact with the amorphous semiconductor regions. A thickness d1 of the first microcrystalline semiconductor region is smaller than a thickness d2 of the second microcrystalline semiconductor region and d1 is greater than or equal to 30 nm.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: December 3, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshiyuki Isa, Atsushi Hirose
  • Publication number: 20130292682
    Abstract: In a thin film transistor substrate (10) having an island-like channel protection layer (15a) covering a channel portion of an oxide semiconductor layer (14), a source electrode (16S) and a drain electrode (16D) are formed of an aluminum alloy film or a multilayer film including an aluminum alloy film.
    Type: Application
    Filed: January 10, 2012
    Publication date: November 7, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Sumio Katoh
  • Patent number: 8525178
    Abstract: A flexible semiconductor device includes an insulating film on which a semiconductor element is formed. The top and bottom surfaces of the insulating film have a top wiring pattern layer and a bottom wiring pattern layer, respectively. The semiconductor element includes a semiconductor layer formed on the top surface of the insulating film, a source electrode and a drain electrode formed on the top surface of the insulating film so as to contact the semiconductor layer, and a gate electrode formed on the bottom surface of the insulating film so as to be opposite the semiconductor layer. A first thickness, which is the thickness of the insulating film facing the source electrode, the drain electrode, the top wiring pattern layer, and the bottom wiring pattern layer, is greater than a second thickness, which is the thickness of the insulating film between the gate electrode and the semiconductor layer.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Takashi Ichiryu, Seiichi Nakatani, Koichi Hirano
  • Patent number: 8519425
    Abstract: A light-emitting device includes a substrate and a planarizing film above the substrate. The planarizing film has a recessed portion between non-recessed portions. A bottom electrode layer is above the non-recessed portions. A semiconductor interlayer is above the bottom electrode layer. A filling layer is above the recessed portion. The filling layer comprises a same material as the semiconductor layer and has an inner portion between outer portions. A bank is above the recessed portion of the planarizing film and edge portions of the bottom electrode layer, with each of the edge portions of the bottom electrode layer neighboring the recessed portion of the planarizing film. The filling layer inner portion has a thickness of t1, the filling layer outer portions have a thickness of t2, and t1 is greater than t2.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: August 27, 2013
    Assignee: Panasonic Corporation
    Inventor: Shuhei Yada
  • Patent number: 8502230
    Abstract: An organic light-emitting display is disclosed. In one embodiment, the display includes i) a substrate, ii) a thin film transistor formed on the substrate, and comprising i) a gate electrode, ii) an active layer electrically insulated from the gate electrode, and iii) source and drain electrodes that are electrically connected to the active layer and iii) a first electrode electrically connected to the thin film transistor. The display further includes an intermediate layer formed on the first electrode and comprising an organic emission layer and a second electrode formed on the intermediate layer, wherein the source electrode or the drain electrode has an optical blocking portion extending in the direction of substrate thickness.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Han Jeong, Steve Y.G. Mo, Eun-Hyun Kim, Hyun-Sun Park
  • Patent number: 8492770
    Abstract: A thin film transistor includes a gate electrode formed on a substrate, a semiconductor pattern overlapped with the gate electrode, a source electrode overlapped with a first end of the semiconductor pattern and a drain electrode overlapped with a second end of the semiconductor pattern and spaced apart from the source electrode. The semiconductor pattern includes an amorphous multi-elements compound including a II B element and a VI A element or including a III A element and a V A element and having an electron mobility no less than 1.0 cm2/Vs and an amorphous phase, wherein the VI A element excludes oxygen. Thus, a driving characteristic of the thin film transistor may be improved.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: July 23, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Woo Park, Je-Hun Lee, Seong-Jin Lee, Yeon-Hong Kim
  • Patent number: 8492769
    Abstract: A transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. A third electrically conductive material layer is in contact with and positioned on the second electrically conductive material layer. The third electrically conductive material layer overhangs the second electrically conductive material layer.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: July 23, 2013
    Assignee: Eastman Kodak Company
    Inventors: Lee W. Tutt, Shelby F. Nelson
  • Patent number: 8486774
    Abstract: A thin film transistor is provided that includes a gate electrode, a source electrode, and a drain electrode, an oxide semiconductor active layer formed over the gate electrode, a fixed charge storage layer formed over a portion of the oxide semiconductor active layer, and a fixed charge control electrode formed over the fixed charged storage layer.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: July 16, 2013
    Assignee: Sony Corporation
    Inventors: Yasuhiro Terai, Eri Fukumoto, Toshiaki Arai
  • Publication number: 20130176195
    Abstract: An organic light emitting diode display device is provided. The organic light emitting display device includes at least one capacitor, at least one transistor, and an organic light emitting element connected to the capacitor and the transistor. The transistor includes a first structure and a second structure disposed on the first structure with a first insulating layer therebetween. The capacitor includes a first electrode and a second electrode disposed on the first electrode with the insulating layer therebetween. A distance between the first electrode and the second electrode in at least a region, is less than a distance between the first structure and the second structure.
    Type: Application
    Filed: June 29, 2012
    Publication date: July 11, 2013
    Inventor: Jungbae Kim
  • Publication number: 20130168682
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.
    Type: Application
    Filed: March 20, 2012
    Publication date: July 4, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chen-Yuan Tu, Yih-Chyun Kao, Shu-Feng Wu, Chun-Nan Lin
  • Patent number: 8461593
    Abstract: A display apparatus includes a thin film transistor provided on a substrate and a pixel electrically coupled to the thin film transistor. The thin film transistor includes a semiconductor layer on the substrate, a first insulating layer on the semiconductor layer and having a first contact hole and a second contact hole, a source electrode on the first insulating layer and making contact with the semiconductor layer through the first contact hole, a drain electrode on the first insulating layer and making contact with the semiconductor layer through the second contact hole, a gate electrode between the source electrode and the drain electrode and having a stacked structure including a first conductive layer and a second conductive layer, and a second insulating layer between the source electrode and the drain electrode and covering the gate electrode.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: June 11, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Sun Park
  • Patent number: 8450740
    Abstract: A display device includes an infrared sensing transistor and a visible sensing transistor. The visible sensing transistor includes a semiconductor on a substrate; an ohmic contact on the semiconductor; an etch stopping layer on the ohmic contact; a source electrode and a drain electrode on the etch stopping layer; a passivation layer on the source electrode and the drain electrode; and a gate electrode on the passivation layer. The etch stopping layer may be composed of the same material as the source electrode and the drain electrode. The infrared sensing transistor is similar to the visible sensing transistor except the etch stopping layer is absent.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae-Cheol Kim, Sung-Ryul Kim, Yun-Jong Yeo, Hong-Kee Chin, Ki-Hun Jeong
  • Patent number: 8445909
    Abstract: Provided are a sensor array substrate and a method of fabricating the same. The sensor array substrate includes: a substrate in which a switching element region and a sensor region that senses light are defined; a first semiconductor layer which is formed in the sensor region; a first gate electrode which is formed on the first semiconductor layer and overlaps the first semiconductor layer; a second gate electrode which is formed in the switching element region; a second semiconductor layer which is formed on the second gate electrode and overlaps the second gate electrode; and a light-blocking pattern which is formed on the second semiconductor layer and overlaps the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers, and the second gate electrode and the light-blocking pattern are electrically connected to each other.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: May 21, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung-Sook Jeon, Jun-Ho Song, Sang-Youn Han, Sung-Hoon Yang, Dae-Cheol Kim, Ki-Hun Jeong, Mi-Seon Seo
  • Patent number: 8431496
    Abstract: A threshold voltage of a thin film transistor is adjusted. The thin film transistor is manufactured through the steps of: introducing a semiconductor material gas into a treatment chamber; forming a semiconductor film in the treatment chamber over a gate insulating layer provided covering a gate electrode; evacuating the semiconductor material gas in the treatment chamber; introducing rare gas into the treatment chamber; performing plasma treatment on the semiconductor film in the treatment chamber; forming an impurity semiconductor film over the semiconductor film; processing the semiconductor film and the impurity semiconductor film into island shapes, so that a semiconductor stack is formed; forming source and drain electrodes in contact with an impurity semiconductor layer included in the semiconductor stack. Argon is preferably used as the rare gas. The rare gas element is preferably contained in the semiconductor film at 2.5×1018 cm?3 or more.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: April 30, 2013
    Assignee: Semiconductor Energy Labortory Co., Ltd.
    Inventor: Satoshi Toriumi
  • Publication number: 20130075739
    Abstract: Some embodiments include a method of manufacturing electronic devices on both sides of a carrier substrate and electronic devices thereof. Other embodiments of related methods and structures are also disclosed.
    Type: Application
    Filed: November 21, 2012
    Publication date: March 28, 2013
    Applicants: Arizona State University
    Inventor: Arizona Board of Regents, a Body Corporate of th
  • Publication number: 20130062608
    Abstract: A thin-film transistor includes: a gate electrode; a semiconductor layer separated from the gate electrode with a separation insulating layer in between; and a source electrode and a drain electrode that are connected with the semiconductor layer and are separated from each other. Between the source electrode and the drain electrode, a thickness of the separation insulating layer at a first region where the gate electrode does not overlap both the source electrode and the drain electrode is smaller than a thickness of the separation insulating layer at a second region where the gate electrode overlaps one or both of the source electrode and the drain electrode.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 14, 2013
    Applicant: SONY CORPORATION
    Inventor: Nobukazu Hirai
  • Patent number: 8395208
    Abstract: It is an object to provide an SGT production method capable of obtaining a structure for reducing a resistance of a gate, a desired gate length, desired source and drain configurations and a desired diameter of a pillar-shaped semiconductor.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: March 12, 2013
    Assignee: Unisantis Electronics Singapore Pte Ltd.
    Inventors: Fujio Masuoka, Shintaro Arai, Hiroki Nakamura, Tomohiko Kudo
  • Publication number: 20130043479
    Abstract: A thin film transistor substrate includes a substrate, a gate electrode on the substrate, an active layer on or below the gate electrode (the active layer at least partially overlapping the gate electrode) including a first active region and a second active region, the first active region and the second active region facing each other and extending beyond the gate electrode, a source electrode electrically connected to the first active region and a drain electrode electrically connected to the second active region, wherein the active layer includes a recess region which is at least partially recessed from a surface of the active layer facing the gate electrode, and the recess region includes a portion extending between the first active region and the second active region.
    Type: Application
    Filed: December 16, 2011
    Publication date: February 21, 2013
    Inventors: Tae-Jin KIM, Sang-Jae Yeo, Dae-Sung Choi
  • Publication number: 20130020575
    Abstract: To provide a miniaturized semiconductor device with stable electric characteristics in which a short-channel effect is suppressed. Further, to provide a manufacturing method of the semiconductor device. The semiconductor device (transistor) including a trench formed in an oxide insulating layer, an oxide semiconductor film formed along the trench, a source electrode and a drain electrode which are in contact with the oxide semiconductor film, a gate insulating layer over the oxide semiconductor film, a gate electrode over the gate insulating layer is provided. The lower corner portions of the trench are curved, and the side portions of the trench have side surfaces substantially perpendicular to the top surface of the oxide insulating layer. Further, the width between the upper ends of the trench is greater than or equal to 1 time and less than or equal to 1.5 times the width between the side surfaces of the trench.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akihiro ISHIZUKA, Shinya SASAGAWA
  • Publication number: 20130009161
    Abstract: There is provided a method of manufacturing a semiconductor device including: forming a gate electrode on a substrate ; forming a gate insulating layer of which a recessed portion is formed in a region in which a channel formation region is to be formed, on the substrate and the gate electrode; forming the channel formation region including an organic semiconductor material within the recessed portion based on a coating method; and forming source/drain electrodes on portions of the channel formation region from on the gate insulating layer.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 10, 2013
    Applicant: SONY CORPORATION
    Inventor: Kazuo Himori
  • Patent number: 8349632
    Abstract: Provided is an organic light-emitting display device that can display a full color image by forming a simple structure of light-emitting layers and a method of manufacturing the same. The organic light-emitting display device includes a substrate; a first electrode layer formed on the substrate; a second electrode layer which is formed above the first electrode layer and faces the first electrode layer; and a light-emitting layer interposed between the first electrode layer and the second electrode layer, wherein the light-emitting layer comprises first and second light-emitting layers respectively corresponding to first and second pixels having different colors from each other, and the first light-emitting layer is commonly formed in the first and second pixels, and the second light-emitting layer is formed in the second pixel.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jun-Yeob Lee
  • Publication number: 20130001556
    Abstract: A thin film transistor and a press sensing device using the thin film transistor are disclosed. The thin film transistor, comprises a source electrode; a drain electrode spaced from the source electrode; a semiconductor layer electrically connected with the source electrode and the drain electrode, a channel defined in the semiconductor layer and located between the source electrode and the drain electrode; and a gate electrode electrically insulated from the semiconductor layer; and an insulative layer configured for insulating the source electrode, the drain electrode, and the semiconductor layer from each other, wherein the insulative layer is made of a polymeric material with an elastic modulus ranged from about 0.1 megapascal (MPa) to about 10 MPa.
    Type: Application
    Filed: December 13, 2011
    Publication date: January 3, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: CHUN-HUA HU, CHANG-HONG LIU, SHOU-SHAN FAN
  • Publication number: 20130001573
    Abstract: A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.
    Type: Application
    Filed: March 12, 2012
    Publication date: January 3, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Su LEE, Yoon-Ho KHANG, Se-Hwan YU, Su-Hyoung KANG
  • Patent number: 8344384
    Abstract: Disclosed are a thin film transistor and a method of manufacturing the thin film transistor. An electrode layer of the thin film transistor includes a seed layer formed of a transparent conductive material doped with indium gallium zinc oxide (IGZO) and a main layer formed of a transparent conductive material. The thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulation film on the substrate to cover the gate electrode, a semiconductor layer disposed on the gate insulation film in a region corresponding to the gate electrode, an electrode layer having a double layer structure and disposed on the gate insulation film in a manner such that a topside portion of the semiconductor layer is exposed through the electrode layer, and a passivation layer on the gate insulation film to cover the semiconductor layer and the electrode layer.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: January 1, 2013
    Assignee: SNU R&DB Foundation
    Inventors: Sung Hwan Choi, Min Koo Han
  • Patent number: 8324628
    Abstract: Provided is a channel layer for a thin film transistor, a thin film transistor and methods of forming the same. A channel layer for a thin film transistor may include IZO (indium zinc oxide) doped with a transition metal. A thin film transistor may include a gate electrode and the channel layer formed on a substrate, a gate insulating layer formed between the gate electrode and channel layer, and a source electrode and a drain electrode which contact ends of the channel layer.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: December 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-il Kim, I-hun Song, Young-soo Park, Dong-hun Kang, Chang-jung Kim, Jae-chul Park
  • Publication number: 20120298987
    Abstract: An offset transistor and a non-offset transistor each including an oxide semiconductor are formed over one substrate. An oxide semiconductor layer, a gate insulator, and first layer wirings which serve as gate wirings are formed. After that, the offset transistor is covered with a resist and impurities are mixed into the oxide semiconductor layer, so that an n-type oxide semiconductor region is formed. Then, second layer wirings are formed. Through the above steps, the offset transistor and the non-offset transistor (e.g., aligned transistor) can be formed.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 29, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Junichiro SAKATA
  • Publication number: 20120286278
    Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
    Type: Application
    Filed: July 26, 2012
    Publication date: November 15, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toshikazu KONDO, Hideyuki KISHIDA
  • Patent number: 8304774
    Abstract: The invention provides a transistor having a leak current between a source and drain in a nitride compound semiconductor formed on a substrate that is reduced. A gate electrode, a source electrode and a drain electrode are formed respectively on the surface of the nitride compound semiconductor formed on the silicon substrate in the transistor. At least one of the source electrode and the drain electrode is surrounded by an auxiliary electrode connected with the gate electrode. Because a depletion layer is formed in the nitride compound semiconductor under the auxiliary electrode, a route of the leak current is shut off and the leak current between the source and drain may be effectively reduced.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: November 6, 2012
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Shusuke Kaya, Nariaki Ikeda, Jiang Li
  • Publication number: 20120248452
    Abstract: An optical sensor preventing damage to a semiconductor layer, and preventing a disconnection and a short circuit of a source electrode and a drain electrode, and a manufacturing method of the optical sensor is provided. The optical sensor includes: a substrate; an infrared ray sensing thin film transistor including a first semiconductor layer disposed on the substrate; a visible ray sensing thin film transistor including a second semiconductor layer disposed on the substrate; a switching thin film transistor including a third semiconductor layer disposed on the substrate; and a semiconductor passivation layer enclosing an upper surface and a side surface of an end portion of at least one of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.
    Type: Application
    Filed: August 12, 2011
    Publication date: October 4, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun Jong YEO, Hong-Kee CHIN, Byeong Hoon CHO, Ki-Hun JEONG, Jung Suk BANG, Woong Kwon KIM, Sung Ryul KIM, Dae Cheol KIM, Kun-Wook HAN
  • Patent number: 8278664
    Abstract: Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: October 2, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eui-Hoon Hwang, Sang-Gul Lee
  • Publication number: 20120235150
    Abstract: A semiconductor device in which improvement of a property of holding stored data can be achieved. Further, power consumption of a semiconductor device is reduced. A transistor in which a wide-gap semiconductor material capable of sufficiently reducing the off-state current of a transistor (e.g., an oxide semiconductor material) in a channel formation region is used and which has a trench structure, i.e., a trench for a gate electrode and a trench for element isolation, is provided. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor enables data to be held for a long time. Further, since the transistor has the trench for a gate electrode, the occurrence of a short-channel effect can be suppressed by appropriately setting the depth of the trench even when the distance between the source electrode and the drain electrode is decreased.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsuo Isobe, Toshihiko Saito, Kiyoshi Kato
  • Patent number: 8269221
    Abstract: Provided is a thin film device and an associated method of making a thin film device. For example, a thin film transistor with nano-gaps in the gate electrode. The method involves providing a substrate. Upon the substrate are then provided a plurality of parallel spaced electrically conductive strips. A plurality of thin film device layers are then deposited upon the conductive strips. A 3D structure is provided upon the plurality of thin film device layers, the structure having a plurality of different heights. The 3D structure and the plurality of thin film device layers are then etched to define a thin film device, such as for example a thin film transistor that is disposed above at least a portion of the conductive strips.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: September 18, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Ping Mei, Albert Jeans, Carl Taussig
  • Patent number: 8258516
    Abstract: A thin-film transistor (TFT) substrate includes a gate electrode, a gate insulation pattern, a channel pattern, a first organic insulation pattern, a source electrode and a drain electrode. The gate electrode is formed on a base substrate. The gate insulation pattern is formed on the gate electrode and is smaller than the gate electrode. The channel pattern is formed on the gate insulation pattern and the channel pattern is smaller than the gate electrode. The first organic insulation pattern is formed on the base substrate to cover the channel pattern, the gate insulation pattern and the gate electrode.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: September 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Soo-Wan Yoon