Abstract: A metallic island is disposed between a first metallic bus and a second metallic bus. The first metallic strip is isolated from the metallic island by a first dielectric barrier. At least a parallel portion of the first metallic strip is generally parallel to the first metallic bus, the second metallic strip isolated from the second metallic bus by a second dielectric barrier. Each first semiconductor terminals that are coupled to the first metallic bus and to the metallic island. Each second semiconductor has terminals coupled to the metallic island and to the second metallic bus.

Abstract: A base is metal, ceramic, or a complex combining thereof, and has thereon multiple concave-convex patterns that are provided at one or more pitches equal to or less than 2 ?m, and a surface part 1a of the base 1 is porous.

Abstract: A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.

Abstract: A power module apparatus (10) comprises: a power module (100A) comprising a package (110) configured to seal a perimeter of a semiconductor device, and a heat radiator (42) bonded to one surface of the package; a cooling device (30) comprising a coolant passage (33) through which coolant water flows, in which the heat radiator is attached to an opening (35) provided on a way of the coolant passage, wherein the heat radiator (42) of the power module (100A) is attached to the opening (35) of the cooling device (30) so that a height (ha) and a height (hb) are substantially identical to each other. The power module in which the heat radiator is attached to the opening formed at the upper surface portion of the cooling device can also be efficiently cooled, and thereby it becomes possible to reduce degradation due to overheating.

Abstract: A semiconductor device has a first substrate. A first semiconductor component and second semiconductor component are disposed on the first substrate. In some embodiments, a recess is formed in the first substrate, and the first semiconductor component is disposed on the recess of the first substrate. A second substrate has an opening formed through the second substrate. A third semiconductor component is disposed on the second substrate. The second substrate is disposed over the first substrate and second semiconductor component. The first semiconductor component extends through the opening. An encapsulant is deposited over the first substrate and second substrate.

Abstract: Disclosed are exemplary embodiments of systems and methods for controllably changing (e.g., weaken, strengthen, eliminate, add, customize, alter, etc.) surface tack of thermal interface materials. Also disclosed are exemplary embodiments of thermal interface material assemblies, which include coatings configured to change surface tack of the thermal interface materials.

Abstract: The present application relates generally to haptic feedback actuators and their construction and use in touch based systems. The haptic feedback actuators are suitably bilayer structures including at least two materials having different thermal coefficients, allowing the structure to deflect from a first position to a second position in response to heating and/or cooling of the structure.

Abstract: According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal joints between heat spreaders or lids and heat sources. In exemplary embodiments, a method of establishing a thermal joint for conducting heat between a heat spreader and a heat source of an electronic device generally includes positioning a thermal interface material (TIM1) between the heat spreader and the heat source.

Abstract: A digital micro-mirror unit is arranged on a circuit board. A digital micro-mirror device mask surroundingly covers the digital micro-mirror unit. A thermo-insulation element is arranged between the digital micro-mirror unit and the digital micro-mirror device mask. The digital micro-mirror unit is thermally insulated against the digital micro-mirror device mask through the thermos-insulation element. A thermoelectric cooler (TEC) is thermally connected to the digital micro-mirror unit. A thermo-conductive body is attached on the hot side of the TEC. Therefore the digital micro-mirror unit can meet temperature requirements of safety standards and avoid reducing its service life.

Abstract: This invention relates to the field of lighting modules employing light emitting diodes (LEDs), and more particularly to LED modules suitable for exposed lens plate luminaires. There is herein provided an LED module having a printed circuit board comprising at least two layers, wherein the interface between two layers at a side surface of the printed circuit board is covered by a protrusion of an optically transmissive cover plate. The same said optically transmissive cover plate is also adapted to cover at least one LED positioned in or on the printed circuit board.

Abstract: An electronic component includes a substrate having a principal surface, a chip arranged at the principal surface of the substrate, a sealing resin sealing the chip on the principal surface of the substrate, and a heat dissipation member formed on the sealing resin.

Abstract: An electronic device has a substrate 10, an electronic element 80 provided on the substrate 10 and a sealing part 20 for sealing the electronic element 80. The sealing part 20 has an insertion part 22 for inserting a fastening member 90. The insertion part 22 is provided in a sealing recessed part 25 recessed compared with a circumferential region. At least side surface and the sealing recessed part 25 of the sealing part 20 are exposed to the outside.

Abstract: Standardized photon building blocks are used to make both discrete light emitters as well as array products. Each photon building block has one or more LED chips mounted on a substrate. No electrical conductors pass between the top and bottom surfaces of the substrate. The photon building blocks are supported by an interconnect structure that is attached to a heat sink. Landing pads on the top surface of the substrate of each photon building block are attached to contact pads disposed on the underside of a lip of the interconnect structure. In a solder reflow process, the photon building blocks self-align within the interconnect structure. Conductors on the interconnect structure are electrically coupled to the LED dice in the photon building blocks through the contact pads and landing pads. The bottom surface of the interconnect structure is coplanar with the bottom surfaces of the substrates of the photon building blocks.

Abstract: A power supply board includes: a first board including a top surface on which a processor is capable of being mounted, a bottom surface located on an opposite side of the top surface, and a plurality of first through holes and a plurality of second through holes capable of being electrically connected with the processor by penetrating through the first board from the top surface to the bottom surface; a second board arranged at a position distant from the bottom surface of the first board and provided with a power supply device; a first conductor mounted on the bottom surface of the first board and electrically connects the plurality of first through holes and the power supply device, and a second conductor mounted on the bottom surface of the first board and electrically connects the plurality of second through holes and the power supply device.

Abstract: A heat spreading lid, including a lid body, a wing portion, where the wing portion flexibly moves independently from the lid body.

Abstract: A semiconductor memory device includes a housing having a wall, a circuit board located in the housing and spaced from the wall and extending along the surface of the wall, a memory located on the circuit board, a heat conduction member interposed, and compressed, between the wall and the memory. The wall includes an uneven region comprising contact portions contacting the heat conduction member and recess portions located between the contact portions. The recess portions are recessed inwardly of the wall from the ends of the contact portions in a direction away from the location of the memory.

Abstract: A circuit package panel containing a packaging of epoxy mold compounds and a circuit device in the packaging, wherein the packaging comprises, at least one hybrid layer of a first epoxy mold compound and a second epoxy mold compound of a different composition.

Abstract: A method for forming a packaged electronic device includes providing a substrate comprising a lead and a pad. The method includes attaching a thermally conductive structure to the pad and attaching an electronic component to one of the thermally conductive structure or the pad. The method includes electrically coupling the electronic component to the lead, and forming a package body that encapsulates the electronic component and at least portions of the lead, the pad, and the thermally conductive structure, wherein the package body has a first major surface and a second major surface opposite to the first major surface, and one of the first bottom surface of the thermally conductive structure or the bottom surface of the pad is exposed in the first major surface of the package body.

Abstract: A semiconductor package includes a semiconductor die arranged on a substrate. The semiconductor package includes a stiffener structure arranged on the substrate. The stiffener structure is spaced at a distance from the semiconductor die. The stiffener structure includes a molding compound material.

Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.

Abstract: The present invention is a bonded body in which an aluminum member constituted by an aluminum alloy, and a metal member constituted by copper, nickel, or silver are bonded to each other. The aluminum member is constituted by an aluminum alloy in which a Si concentration is set to be in a range of 1 mass % to 25 mass %. A Ti layer is formed at a bonding portion between the aluminum member and the metal member, and the aluminum member and the Ti layer, and the Ti layer and the metal member are respectively subjected to solid-phase diffusion bonding.

Abstract: A power converter (1) includes: planar semiconductor modules (10) each having a resin sealing part (16) in which a semiconductor element (11), conductive members (12, 13, and 14), and a signal terminal (15) are sealed with a resin; a cooler (20) that holds the plurality of semiconductor modules (10) in a laminated manner; and a cover (30) that covers the semiconductor modules and the cooler, wherein at least a part of the resin sealing part (16) and the cooler (20) are supported by support media (41 and 42) that extend from the cover (30) so that facing parts of the resin sealing part and the cooler with respect to the cover (30) is positioned in proximity to the cover, and the conductive members and the signal terminal protrude from the resin sealing part in a direction away from the cover.

Abstract: Provided is a PCR heating block having heaters repeatedly arranged thereon is capable of preventing the radial thermal distribution generated from the individual heaters and the non-uniform heat superposition between the adjacent heaters improve the PCR yield and further capable of requiring no separate temperature controlling mechanism to achieve the miniaturization and integration of a device. Furthermore, a PCR device is capable of amplifying a plurality of nucleic acid samples at the same time and rapidly by using a PCR heating block on which heater units are repeatedly arranged and a plate-shaped PCR reaction unit and also capable of measuring successively generated optical signals electrochemical signals to in real time check the nucleic acid amplification.

Abstract: A semiconductor device includes a plurality of semiconductor elements; insulating circuit boards each including an insulating substrate, a circuit portion on a front surface of the insulating substrate connected to one semiconductor element, and a metal portion on a rear surface of the insulating substrate; a metal plate joined to the metal portions of the plurality of insulating circuit boards; and a joint member joining the plurality of insulating circuit boards to the metal plate. The metal plate has a front surface in which the insulating circuit boards are arranged apart from each other, and a rear surface including first regions corresponding to positions of the metal portions and second regions other than the first regions. At least a part of a surface of each of the first regions has a surface work-hardened layer, and the second regions have a hardness different from that of the surface work-hardened layer.

Abstract: A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.

Abstract: Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a die disposed on a substrate; a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is disposed on a backside of the die disposed on a package substrate. A lid comprising an outer surface is disposed on the first surface of the cooling solution, wherein the lid includes a plurality of fins disposed on an inner surface of the lid. A solder is disposed between the outer surface of the lid and the first surface of the cooling solution.

Abstract: The IP Camera of the present invention includes a housing, a heat conducting component, a base and a supporting structure. The heat conducting component is disposed inside the housing to directly contact a heat generating component. The base can be put on or fixed onto a supporting plane, so as to hold a weight of the IP Camera by the supporting plane. An end of the supporting structure extends through the housing to directly contact the heat generating component, and the other end of the supporting structure extends into the base. The heat conducting component and the supporting structure are used to be an uninterrupted heat conduction path between the heat generating component and the base, and a coefficient of heat conductivity of the uninterrupted heat conduction path is greater than 5W/m*K, so that the IP Camera has preferred heat dissipating efficiency.

Abstract: The present application relates generally to haptic feedback actuators and their construction and use in touch based systems. The haptic feedback actuators are suitably bilayer structures including at least two materials having different thermal coefficients, allowing the structure to deflect from a first position to a second position in response to heating and/or cooling of the structure.

Abstract: A first surface of a heat source is spaced from a support by a first gap, in a thermal path from the first surface to the support. A second surface of the heat source, opposite to the first surface, is spaced by a second gap from a heat sink, in a thermal path from the second surface to the heat sink. The thermal path to the support provides a first thermal resistance, based on a gap spacing of the first gap and the thermal path to the heat sink provides a second thermal resistance, based on a gap spacing of the second gap.

Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

Abstract: The present invention provides a silicon nitride circuit board in which metal plates are attached on front and rear sides of a silicon nitride substrate having a three-point bending strength of 500 MPa or higher, with attachment layers interposed therebetween, wherein assuming that a thickness of the metal plate on the front side is denoted by t1, and a thickness of the metal plate on the rear side is denoted by t2, at least one of the thicknesses t1 and t2 is 0.6 mm or larger, a numerical relation: 0.10?|t1?t2|?0.30 mm is satisfied, and warp amounts of the silicon nitride substrate in a long-side direction and a short-side direction both fall within a range from 0.01 to 1.0 mm. Due to above configuration, TCT properties of the silicon nitride circuit board can be improved even if the thicknesses of the front and rear metal plates are large.

Abstract: A semiconductor device includes: a sealing body that seals a first semiconductor element and a second semiconductor element; first heat-radiating members exposed at a front surface of the sealing body; second heat-radiating members exposed at a back surface of the sealing body; first signal terminals electrically connected to the first semiconductor element, and projecting from a top surface of the sealing body in a first direction; and second signal terminals electrically connected to the second semiconductor elements, and projecting from the top surface of the sealing body in the first direction. The top surface of the sealing body includes a first inclined surface, a second inclined surface, and a boundary line or a boundary range located therebetween. The boundary line or the boundary range includes at least part of a minimum creepage path between the first signal terminals and the second signal terminals.

Abstract: Methods for reducing the junction temperature between an IC chip and its lid by including metal spacers in the TIM layer and the resulting devices are disclosed. Embodiments include providing a substrate, including integrated circuit devices, having front and back sides; forming vertical spacers on the backside of the substrate; providing a plate parallel to and spaced from the backside of the substrate; and forming a TIM layer, surrounding the vertical spacers, between the backside of the substrate and the plate.

Abstract: A knockdown heat dissipation unit includes at least one combination body and multiple heat pipes. The combination body has two opposite connection sections. The heat pipes are respectively connected with the connection sections of the combination body to form a large area of thermal contact face. According to the structural design of the knockdown heat dissipation unit, the number of the heat pipes can be increased or reduced according to the heat dissipation requirement of a user. Also, the number of the heat pipes can be flexibly adjusted according to the size of a heat source to enhance the heat dissipation effect.

Abstract: A heat transfer assembly may be used to provide a thermal conduit from a module mounted on a circuit board through the circuit board, allowing a thermal path away from the module. The heat transfer assembly generally includes a thermally conductive base with at least one raised thermal pedestal accessible through at least one heat transfer aperture in the circuit board and in thermal contact with the module. In an embodiment, the heat transfer assembly is used in a remote PHY device (RPD) in an optical node, for example, in a CATV/HFC network. The RPD includes an enclosure having a base with at least one raised thermal pedestal in thermal contact with an optical module (e.g., an optical transmitter or transceiver) on a circuit board through at least one heat transfer aperture in the circuit board.

Abstract: In an embodiment, a method includes arranging a first carrier on a first major surface of a circuit board such that an electronic component arranged on the first carrier is positioned in an aperture in the circuit board and spaced apart from side walls of the aperture, and arranging a second carrier on a second major surface of the circuit board such that the second carrier covers the electronic component and the aperture, the second major surface of the circuit board opposing the first major surface of the circuit board. The electronic component includes a power semiconductor device embedded in a dielectric core layer and at least one contact pad arranged on a first major surface of the dielectric core layer.

Abstract: A method is provided. The method includes providing a first wafer having a plurality of first dummy pads exposed along a first surface of the first wafer. The first dummy pads contact a first metallization layer of the first water. The method also includes providing a second wafer having a plurality of second dummy pads exposed along a first surface of the second wafer. The second dummy pads contact a second metallization layer of the second wafer. The method also includes bonding the first wafer to the second wafer in a manner that the first surface of the first wafer contacts the first surface of the second wafer and the plurality of first dummy pads are interleaved with the plurality of second dummy pads but do not contact the plurality of second dummy pads.

Abstract: In a resin sealing type semiconductor device, a semiconductor chip CP2 is mounted over a die pad DP having conductivity via a bonding member BD2 having insulation property, and a semiconductor chip CP1 is mounted over the die pad DP via a bonding member BD1 having conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP2, covered with the bonding member BD2 is larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP1, covered with the bonding member BD1.

Abstract: An interconnect element 130 can include a dielectric layer 116 having a top face 116b and a bottom face 116a remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces 132, 134. A plurality of conductive protrusions 112 can extend upwardly from the plane defined by the first metal layer 102 through the dielectric layer 116. The conductive protrusions 112 can have top surfaces 126 at a first height 115 above the first metal layer 132 which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias 128 can extend from the top surfaces 126 of the protrusions 112 to connect the protrusions 112 with the second metal layer.

Abstract: An electronics cooling arrangement includes a housing configured to contain a coolant and an electronic device disposed within the housing. The electronic device has a passageway with at least one inlet and at least one outlet and is configured to allow fluid flowing between the inlet and the outlet to cool the electronic device.

Abstract: The present invention provides a packaging shell and a power module having the same. The packaging shell mainly comprises an accommodating recess for receiving a substrate disposed with a plurality of electronic devices/components, so as to make the substrate be further assembled with a heat sink through the support of the packaging shell. Most importantly, in the present invention, the accommodating recess has a stepped surface for contacting with the substrate, and the stepped surface is a curve surface having a flatness difference. By such design, the compressional force generated when assembling the packaging shell, the heat sink and the system circuit board can be uniformly transmitted to substrate via the curve surface structure; such that the compressional force is avoid from being concentrated to a certain point on the substrate, and then the substrate is protected from being ruptured due to the action of the concentrated compressional force.

Abstract: A semiconductor device includes a semiconductor die having a top side and a bottom, active side. During assembly of the semiconductor device, a metal film is sputtered over the top and side surfaces of the die, and then a mold compound is formed over the metal film. The metal film can provide both heat dissipation and EMI shielding. The device may be assembled using a wafer level assembly process.

Abstract: A semiconductor package comprising: a semiconductor chip; a connection pillar that is disposed adjacent to the semiconductor chip; a first heat dissipation layer disposed on the semiconductor chip; and a second heat dissipation layer disposed on the first heat dissipation layer, the second heat dissipation layer including a first protrusion extending beyond a perimeter of the semiconductor chip and extending towards the connection pillar.

Abstract: A semiconductor device includes an insulating substrate,a semiconductor element disposed on an upper surface of the substrate, a heat dissipation member, and a metal bonding layer that bonds the lower surface of the substrate to the upper surface of the heat dissipation member, and the area of the upper surface of the heat dissipation member is larger than the area of the lower surface of the substrate, and the metal bonding layer contacts the whole of the lower surface of the substrate and has an area larger than the area of the lower surface of the substrate, and the heat conductivity of the metal bonding layer is higher than the heat conductivity of the heat dissipation member.

Abstract: Provided is an insulated radiating rubber molded article that can be pre-installed in an electrical apparatus such as an LED package, can improve handling properties during attachment work, and moreover can exert superior insulating characteristics and radiating characteristics. To achieve the objective, the insulated radiating rubber molded article, which, by means of being interposed between a base and the electrical apparatus when attaching the electrical apparatus, which emits heat alongside the operation thereof, to the base, promotes radiating from the electrical apparatus and electrically insulates the electrical apparatus from the base, is characterized by having a 3D shape by means of being integrally provided with: a flat surface section disposed between the electrical apparatus and the base; and a lateral surface section disposed around the electrical apparatus.

Abstract: In an embodiment, a method includes arranging a first carrier on a first major surface of a circuit board such that an electronic component arranged on the first carrier is positioned in an aperture in the circuit board and spaced apart from side walls of the aperture, and arranging a second carrier on a second major surface of the circuit board such that the second carrier covers the electronic component and the aperture, the second major surface of the circuit board opposing the first major surface of the circuit board. The electronic component includes a power semiconductor device embedded in a dielectric core layer and at least one contact pad arranged on a first major surface of the dielectric core layer.

Abstract: Between smoothing capacitor connected between connection conductors for positive and negative poles and semiconductor power modules constituting inverter, a circuit inductance might be increased due to imbalance of current circuit loops. Phase arms each formed by a series combination of semiconductor power modules are stacked, and the group of semiconductor power modifies connected with positive connection conductor and the group of the semiconductor power modules connected with negative connection conductor are arranged in the same direction. There is formed an interspace between the arrangement of semiconductor power modules for positive pole and the arrangement of semiconductor power modules for negative pole. Connection conductors for positive and negative poles extend in a parallel state with an insulator interposed between connection conductors, through the interspace.

Abstract: A semiconductor device may include a circuit board having an opening, and a frame. The frame may have an IC die pad in the opening, and arms extending outwardly from the IC die pad and coupled to the circuit board. The semiconductor device may include an IC mounted on the IC die pad, bond wires coupling the circuit board with the IC, and encapsulation material surrounding the IC, the bond wires, and the arms.

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.

Abstract: A semiconductor device includes a plurality of die pad sections, a plurality of semiconductor chips, each of which is arranged in each of the die pad sections, a resin encapsulation portion having a recess portion for exposing at least a portion of the die pad sections, the resin encapsulation portion configured to cover the die pad sections and the semiconductor chips, and a heat radiation layer arranged in the recess portion. The heat radiation layer includes an elastic layer exposed toward a direction in which the recess portion is opened. The heat radiation layer directly faces at least a portion of the die pad sections. The elastic layer overlaps with at least a portion of the die pad sections when seen in a thickness direction of the heat radiation layer.