Abstract: The replaceable power module includes a power section positioned between a cover and a frame. The cover is provided with clips to permit the attachment and detachment of the cover to the base as well the attachment and detachment of the power module to a surface mounted integrated circuit. The frame is provided with an opening for receiving the integrated circuit, and electrical contacts for electrically connecting the power module to the leads of an integrated circuit. The power section is electrically coupled to the frame and includes a battery and a crystal oscillator for controlling the integrated circuit.

Abstract: A semiconductor device which includes a ceramic package main body, a semiconductor element and a closure for sealing the semiconductor element in the package. A capacitor is formed on an upper or lower surface of the closure. The capacitor has a dielectric film interposed between a pair of electrode films. The dielectric film includes a ceramic filler and an amorphous glass. The closure and the package main body are sealed. A terminal formed in the package main body and the electrode film of the capacitor are connected electrically. High-density packaging on a substrate can be achieved. High strength of the closure itself can be maintained. Thermal stress developed in the closure itself, or the conjugated portion between the closure and the package main body, can be suppressed. Reliability of a sealed structure in the semiconductor device for a long period of time can be increased.

Abstract: An electronic package which contains discrete resistive and capacitive components used to control the operating device of an integrated circuit located within the package. The package has a bonding shelf that has a plurality of bond fingers which are connected to the integrated circuit. The discrete passive components are mounted to the bonding shelf and connected to the bond fingers by lead traces. The lead traces terminate at the discrete devices so that the resistor and capacitor cannot be accessed through the external contacts of the package. The integrated circuit and discrete components are typically enclosed by a molded plastic material to prevent physical access to the devices without damaging the package.

Abstract: An integrated circuit package which contains an integrated circuit that is mounted to a plurality of contact pads located on a top surface of a substrate. The package may also have a number of capacitors that are mounted to the contact pads. The substrate has an internal first power plane and an internal first ground plane located adjacent to the top surface and coupled to the contact pads by a plurality of vias. The power and ground planes are coupled to the capacitors and the integrated circuit, such that the capacitors filter power that is provided to the circuit. Locating the power and ground planes near the top surface minimizes the length of the vias and lowers the self inductance of the package. The contact pads of the capacitors may be arranged in alternating rows of ground and power to increase the mutual inductance and lower the effective inductance of the package.

Abstract: Through exposure of the top surface of a tungsten film to plasma of a gas including nitrogen at a temperature of 550.degree. C. or less, a tungsten nitride layer having a structure in which nitrogen atoms and tungsten atoms are bonded is formed in an area in the vicinity of the surface of the tungsten film. Then, an aluminum alloy film is deposited on the tungsten film, thereby forming a metallic interconnection. Since the nitrogen atoms and the tungsten atoms are bonded in the tungsten nitride layer formed by such plasma nitridation, the tungsten nitric layer not only has a good barrier function to prevent the diffusion of other metal atoms but also can be formed in a small thickness. Accordingly, formation of an alloy layer with a high resistance otherwise caused due to counter diffusion during an annealing process and a junction leakage can be avoided.

Abstract: A semiconductor device having a semiconductor element mounted on an insulating substrate and a decoupling capacitor provided on the semiconductor element. The semiconductor device minimizes the occurrence of switching noise. The semiconductor device comprises an insulating substrate, a semiconductor element mounted on said insulating substrate, and a decoupling capacitor which is joined to the upper surface of said semiconductor element and is electrically connected to said semiconductor element, wherein said decoupling capacitor has a coefficient of thermal expansion close to the coefficient of thermal expansion of said semiconductor element, and is electrically connected to said semiconductor element by soldering and is further secured to said semiconductor element.

Abstract: A chip type electronic component is provided which includes a chip substrate having an opposite pair of end edges and an opposite pair of side edges between the pair of end edges. An opposite pair of first electrodes is formed in a layer on the chip substrate to extend from the end edges toward each other. Each first electrode has a narrower root portion closer to a corresponding end edge of the chip substrate and a wider head portion spaced from the corresponding end edge. An electronic element is formed in another layer on the chip substrate in electrical conduction with both of the first electrodes, and an insulating protective coating is formed on the chip substrate to entirely cover the electronic element together with the entire wider head portion of each electrode.

Abstract: A thin and flat integrated circuit assembly (10, 40) may be achieved by using a thin carrier (20) with shallow cavities (22, 24) for holding the integrated circuits (16) and/or discrete circuit components (14). The integrated circuits (16) and/or circuit components (14) may be friction fitted in the cavities (22, 24) or they may be secured therein by the use of adhesives and/or solder. Electrical connection between the integrated circuits (16) and circuit components (14) may be done with wire bonding, ribbon bonding, tape-automated bonding, lead frames, flip chip bonding, and/or conductive gluing of leads. The circuit assembly may then be accommodated into a credit card-sized packaging with standard dimensions set by the International Standards Organization.

Abstract: A semiconductor device comprising a substrate having a hollow cavity for mounting a semiconductor element therein and a lowered step surface at a periphery of the cavity for mounting a chip component thereon. A semiconductor element is mounted within the cavity and a chip capacitor is mounted to the lowered step surface. The semiconductor element and the chip component are adapted to be connected to an external circuit through electrical conductors. A cap is attached to the substrate and a seal material is filled into a space defined between the cap and the substrate for sealing the cavity and for encapsulating the chip component on the lowered step surface which may extend along the entire periphery of the cavity. The cap may include a projection adapted to abut gainst a side wall of the lowered step surface, or alternatively, the lowered step surface may include a side wall having a projection adapted to abut against periphery of the cap.

Abstract: An optical device is disclosed which comprises a base including a lower cylindrical base member having a common central line and a first diameter and having top and bottom surfaces, a first electrode layer formed on the top surface of the lower base member, a dielectric layer formed on the first electrode, a second electrode layer formed on the dielectric layer, and an upper base member formed on the second electrode layer, the upper base member including a first cylindrical member having the common central line and the first diameter and having top and bottom surfaces, the bottom surface of the first cylindrical member faced on the second electrode layer and a second cylindrical member having the common central line and a second diameter smaller than the first diameter and having a top surface and a bottom surface faced on the top surface of the first cylindrical member; elongated leads supported by the base, the leads being elongated so as to protrude from the bottom surface of the lower base member; a ring

Abstract: Methods of forming, in an integrated circuit, aluminum-silicon contacts with a barrier layer is disclosed. The barrier layer is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom of the contact. The titanium oxynitride may be formed by depositing a low density titanium nitride film over a titanium metal layer that is in contact with the silicon in the contact; subsequent exposure to air allows a relatively large amount of oxygen and nitrogen to enter the titanium nitride. A rapid thermal anneal (RTA) both causes silicidation at the contact location and also results in the oxygen and nitrogen being gettered to what was previously the titanium/titanium nitride interface, where the oxygen and nitrogen react with the titanium metal and nitrogen in the atmosphere to form titanium oxynitride. The low density titanium nitride also densifies during the RTA.

Abstract: An integrated circuit for implementing a resistor network on a die of the integrated circuit. The integrated circuit includes a common conductor, which is disposed on a first side of the die and coupled to resistors of the resistor network. The integrated circuit further includes a substantially conductive substrate through the die. There is further included a conductive back side contact coupled to the substantially conductive substrate. The conductive back side contact is disposed on a second side of the die opposite the first side, whereby the common conductor, the substantially conductive substrate, and the conductive back side contact form a common conducting bus from the common conductor to the conductive back side contact through the die.

Abstract: A thin and flat integrated circuit assembly (10, 40) may be achieved by using a thin carrier (20) with shallow cavities (22, 24) for holding the integrated circuits (16) and/or discrete circuit components (14). The integrated circuits (16) and/or circuit components (14) may be friction fitted in the cavities (22, 24) or they may be secured therein by the use of adhesives and/or solder. Electrical connection between the integrated circuits (16) and circuit components (14) may be done with wire bonding, ribbon bonding, tape-automated bonding, lead frames, flip chip bonding, and/or conductive gluing of leads. The circuit assembly may then be accommodated into a credit card-sized packaging with standard dimensions set by the International Standards Organization.

Abstract: A semiconductor integrated circuit device includes a substrate formed with semiconductor elements and a metal wiring having a laminated structure and provided on the substrate. The metal wiring includes a first layer including aluminum as a main component, and a second layer formed on the first layer. The second layer includes titanium and nitrogen as main components. The second layer includes more titanium than nitrogen in number of atoms. A third layer may be formed between the first and second layers. The third layer includes a compound of aluminum and titanium as a main component. A fourth layer may further be formed between the second and third layers. The fourth layer includes titanium as a main component and is free of aluminum.

Abstract: An optical device is disclosed which comprises a base including a lower cylindrical base member having a common central line and a first diameter and having top and bottom surfaces, a first electrode layer formed on the top surface of the lower base member, a dielectric layer formed on the first electrode, a second electrode layer formed on the dielectric layer, and an upper base member formed on the second electrode layer, the upper base member including a first cylindrical member having the common central line and the first diameter and having top and bottom surfaces, the bottom surface of the first cylindrical member faced on the second electrode layer and a second cylindrical member having the common central line and a second diameter smaller than the first diameter and having a top surface and a bottom surface faced on the top surface of the first cylindrical member; elongated leads supported by the base, the leads being elongated so as to protrude from the bottom surface of the lower base member; a ring

Abstract: A discrete element electronic package (100) includes a heat spreader (180) with a cavity (185) for receiving a substrate (110), a substrate (110) mounted within the cavity (185) of the heat spreader (180), a heat-generating semiconductor device (170), such as a power transistor (170), mounted on the substrate (110), and electrical connectors (140) located on the substrate (110) to provide an electrical interface to the semiconductor device (170).

Abstract: A fastener is provided with onboard memory in the form of a non-volatile memory device. The fastener defines a casing with an elongate body and a transverse gripping head, such casing defining a bore into which the nonvolatile memory device is placed. The memory device is mounted on a circuit board having a first side which defines a plurality of electrically conductive contacts for use in communicating with the memory device. The electrically conductive contacts are selectively exposed to provide access to the memory device. The other side of the circuit board is placed inside the casing and covered with potting material. Simple wiring on the small board, using through-hole vias, suffices to route power, ground, and data lines to the memory device, while providing a sealed durable package with at least three external contacts and fastening capabilities.

Abstract: An interposer including a first face and second face opposite the first face and at least one electrically conductive plane. The at least one electrically conductive plane functions as a power, ground, or signal plane. At least one electrically insulating plane is positioned on opposite sides of the at least one electrically conductive plane. A plurality of plated through holes are formed through the at least one electrically conductive planes and the at least two electrically insulating planes. The through holes are selectively electrically joined to the at least one electrically conductive plane. At least one passive electronic structure is positioned within the interposer structure.

Abstract: An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.

Abstract: Methods of forming, in an integrated circuit, aluminum-silicon contacts with a barrier layer is disclosed. The barrier layer is enhanced by the provision of titanium oxynitride layers adjacent the silicide film formed at the exposed silicon at the bottom of the contact. The titanium oxynitride may be formed by depositing a low density titanium nitride film over a titanium metal layer that is in contact with the silicon in the contact; subsequent exposure to air allows a relatively large amount of oxygen and nitrogen to enter the titanium nitride. A rapid thermal anneal (RTA) both causes silicidation at the contact location and also results in the oxygen and nitrogen being gettered to what was previously the titanium/titanium nitride interface, where the oxygen and nitrogen react with the titanium metal and nitrogen in the atmosphere to form titanium oxynitride. The low density titanium nitride also densifies during the RTA.

Abstract: An integrated circuit package of the surface-mountable type within which a battery is mounted is disclosed. Battery leads extend from the side of the package body opposite that which is adjacent the circuit board when mounted, and between which a conventional battery may be placed. Standoffs are located on the package body for supporting the battery above the package body, so that a gap is present therebetween. A housing is attached to the package over the battery, and has standoffs attached to its inner surface so that a gap is also present between the housing and the battery. The gaps may be air gaps or filled with a low thermal conductivity material. The gaps thermally insulate the battery from the package body and housing, so that the circuit may be subjected to solder reflow mounting to a circuit board, while insulating the high temperatures from the battery.

Abstract: A switching power supply embodiment of the present invention includes a plastic leaded chip carrier (PLCC) that has two rectangular holes joined by a channel on the bottom surface that allow the PLCC to be surface mounted on a printed circuit board over a ferrite U-core section. A ferrite I-core section caps the ends of the U-core section above the top surface of the PLCC. A wire frame within the PLCC provides for several individual parallel conductor segments that pass between the two holes to rows of surface mount pins on opposite edges of the PLCC. Traces on the printed circuit board complete the connection of these conductor segments to form a primary winding of a transformer. A secondary winding is similarly constructed using pins on another edge of the PLCC.

Abstract: In a tape carrier type semiconductor device with reinforcement wherein tape carrier type semiconductor modules are mounted in holes or depressions enclosed by a frame, and at least one flexible circuit is stacked additionally as required, and the semiconductor modules are electrically connected to electrodes formed on the frame, by mounting chip parts such as capacitors on the frame and/or flexible circuit, the mounting area of the semiconductor device can be reduced and the performance can be hyperfunctioned. By stacking a plurality of such semiconductor devices with reinforcement, much more satisfactory effects can be obtained.

Abstract: A lead frame for use in an integrated circuit package is disclosed herein. The lead frame includes a magnetic component winding wherein the winding is formed as an integral part of the lead frame. Additional windings may be formed as an integral part of the lead frame and then folded into position over the first winding to form a multiple layered magnetic component winding. In one embodiment, the lead frame based winding is coated with a magnetic material to form a lead frame based inductor. There is also disclosed a method of producing a lead frame including a magnetic component winding wherein the winding is formed as an integral part of the lead frame.

Abstract: A molded device package supports a volatile memory chip and a replaceable backup battery for preserving data in the event of loss of main power supply. The package includes an external socket for receiving a replaceable backup battery which can be manually inserted into or removed from the socket after molding encapsulation and metal trim work have been completed. The socket is intersected by an exposure cavity which permits the positive and negative terminals of a backup battery to engage positive and negative finger leads. The positive and negative battery terminals are engaged by resilient terminal contact portions of the positive and negative finger leads which project into the exposure cavity. Socket shoulder portions and a retainer cap hold a backup battery within the socket and in electrical contact with the resilient terminal contact portions.

Abstract: A premolded battery package supports a volatile memory chip and a replaceable backup battery for preserving data in the event of loss of main power supply. The package includes an integrally formed external socket for receiving a replaceable backup battery which can be manually inserted into or removed from the socket after molding encapsulation and metal trim work have been completed. The socket assembly includes an interface battery cavity which permits the negative terminal of a backup battery to engage a negative power finger lead. The positive battery terminal is engaged by a resilient terminal contact portion of a positive finger lead which projects externally of the molded package. The terminal contact portion of the positive power lead serves as a retainer in combination with socket shoulder portions for retaining the backup battery within the socket.

Abstract: The invention provides a trench sidewall structure and a method of forming and using the same to reduce parasitic sidewall leakage through a trench sidewall, for example from bitline contact to storage node or from storage node to substrate. The method involves placing a polysilicon layer of the same polarity as that of the array well, along with a diffusion barrier layer such an titanium nitride, between the storage node poly and the oxide collar.

Abstract: An oscillator package includes a header substrate with a number of through holes formed therein, a copper post passed through each through hole, a ceramic substrate securely mounted to and supported by the copper posts for mounting a die and a crystal thereon, a substantially L-shaped lead securely attached to an underside as well as a lateral side of the header substrate and contacting each copper post, and a ceramic cover housing the die and crystal. A metal film is applied to an inner periphery of the hole, and the copper posts are mounted in the holes after the metal-film is sintered. An outer periphery of the copper post is plated by nickel then gold. The lead is mountable to a circuit board by soldering, and the solder covers an overall area of the lead. The ceramic cover has at least a 90% weight of aluminum oxide.

Abstract: An integrated circuit device is disclosed. The device includes a first leadframe power supply bus and a second leadframe power supply bus that each have portions separate from and adjacent to one another that lie between a first plurality of leadfingers and a second plurality of leadfingers. An electronic device is connected to the first leadframe power supply bus and to the second leadframe power supply bus. Another electronic device can be connected to the first leadframe power supply bus and to the second leadframe bus. Exemplary of the electronic devices are a de-coupling capacitor and a capacitor for high frequency noise suppression. A semiconductor die is attached to the power supply busses. A substance encapsulates the components so that an integrated semiconductor chip is formed. A method of making an integrated circuit device is also disclosed.

Abstract: A flat geometry interconnect media connects the electrodes of a laminated power source in electrical contact with positive and negative power input terminals on a planar substrate. The interconnect media is in the form of a flexible, laminated strip having a central conductive lamina sandwiched between a pair of insulation laminae. The flexible, laminated interconnect media is folded about the anode and cathode of the laminated power source for presenting positive and negative battery terminals in substantially coplanar relation for electrical contact with substrate lands or metallization deposits situated on one side of a printed circuit board. The laminated battery supplies backup operating power to integrated circuit devices such as static random access memories.

Abstract: Noise generated at high frequencies at the time of simultaneous switchings of logical circuits is reduced by lowering an inductance from LSI to a capacitor formed on a substrate. The capacitor is formed to ensure that an inductance from a bonding pad for the LSI loaded on the substrate to an electrode of the capacitor is 0.05 nanohenry. The lower inductance from the LSI to the capacitor allows a reduction in the amount of the noise at high frequencies among those generated in power supply system, whereby the rising time of signals is made shorter, and the speed of arithmetic operation can be increased.

Abstract: A high-frequency semiconductor device includes a semiconductor element disposed on a top surface of a protrusion of a thin heat-radiating plate. The high-frequency semiconductor device also has a first conductive grounding bridge on which a MOS capacitive element is disposed. Since the heat-radiating plate can be extended to lie beneath the conductive grounding bridge, the heat resistance of the semiconductor element and of the heat-radiating plate can be reduced, and the size of the insulating substrate can be reduced.