Abstract: A method of manufacturing a semiconductor device includes growing a first GaN layer on a SiC substrate, and forming a second GaN layer on the first GaN layer, the second GaN layer being grown under such conditions that a ratio of a vertical growth rate to a horizontal growth rate is lower than that in the growth of the first GaN layer.

Abstract: A group III nitride semiconductor crystal substrate has a diameter of at least 25 mm and not more than 160 mm. The resistivity of the group III nitride semiconductor crystal substrate is at least 1×10?4 ?·cm and not more than 0.1 ?·cm. The resistivity distribution in the diameter direction of the group III nitride semiconductor crystal is at least ?30% and not more than 30%. The resistivity distribution in the thickness direction of the group III nitride semiconductor crystal is at least ?16% and not more than 16%.

Abstract: A stacking fault and twin blocking barrier for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with defect densities below 1×108 cm?2 to be formed on silicon substrates. In an embodiment of the present invention, a buffer layer is positioned between a III-V device layer and a silicon substrate to glide dislocations. In an embodiment of the present invention, GaSb buffer layer is selected on the basis of lattice constant, band gap, and melting point to prevent many lattice defects from propagating out of the buffer into the III-V device layer. In a specific embodiment, a III-V InSb device layer is formed directly on the GaSb buffer.

Abstract: Exemplary embodiments provide high-quality layered semiconductor devices and methods for their fabrication. The high-quality layered semiconductor device can be formed in planar with low defect densities and with strain relieved through a plurality of arrays of misfit dislocations formed at the interface of highly lattice-mismatched layers of the device. The high-quality layered semiconductor device can be formed using various materials systems and can be incorporated into various opto-electronic and electronic devices. In an exemplary embodiment, an emitter device can include monolithic quantum well (QW) lasers directly disposed on a SOI or silicon substrate for waveguide coupled integration. In another exemplary embodiment, a superlattice (SL) photodetector and its focal plane array can include a III-Sb active region formed over a large GaAs substrate using SLS technologies.

Abstract: Methods and apparatus for producing a gallium nitride semiconductor on insulator structure include: bonding a single crystal silicon layer to a transparent substrate; and growing a single crystal gallium nitride layer on the single crystal silicon layer.

Abstract: A compound semiconductor substrate which inhibits the generation of a crack or a warp and is preferable for a normally-off type high breakdown voltage device, arranged that a multilayer buffer layer 2 in which AlxGa1-xN single crystal layers (0.6?X?1.0) 21 containing carbon from 1×1018 atoms/cm3 to 1×1021 atoms/cm3 and AlyGa1-yN single crystal layers (0.1?y?0.5) 22 containing carbon from 1×1017 atoms/cm3 to 1×1021 atoms/cm3 are alternately and repeatedly stacked in order, and a nitride active layer 3 provided with an electron transport layer 31 having a carbon concentration of 5×1017 atoms/cm3 or less and an electron supply layer 32 are deposited on a Si single crystal substrate 1 in order. The carbon concentrations of the AlxGa1-xN single crystal layers 21 and that of the AlGa1-yN single crystal layers 22 respectively decrease from the substrate 1 side towards the above-mentioned active layer 3 side. In this way, the compound semiconductor substrate is produced.

Abstract: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a p-type nitride semiconductor and an active layer formed between the n-type nitride semiconductor and the p-type nitride semiconductor, wherein the n-type nitride semiconductor includes at least an n-type contact layer and an n-side GaN layer, the n-side GaN layer consists of a single or a plurality of undoped and/or n-type layers, and the method includes the step of forming the n-side GaN layer by organic metal vapor deposition with the growth temperature set within the range of 500 to 1000° C., such that the n-side GaN layer is formed between the n-type contact layer and the active layer.

Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.

Abstract: A stacking fault and twin blocking barrier for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with defect densities below 1×108 cm?2 to be formed on silicon substrates. In an embodiment of the present invention, a buffer layer is positioned between a III-V device layer and a silicon substrate to glide dislocations. In an embodiment of the present invention, GaSb buffer layer is selected on the basis of lattice constant, band gap, and melting point to prevent many lattice defects from propagating out of the buffer into the III-V device layer. In a specific embodiment, a III-V InSb device layer is formed directly on the GaSb buffer.

Abstract: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a p-type nitride semiconductor and an active layer formed between the n-type nitride semiconductor and the p-type nitride semiconductor, wherein the n-type nitride semiconductor includes at least an n-type contact layer and an n-side GaN layer, the n-side GaN layer consists of a single or a plurality of undoped and/or n-type layers, and the method includes the step of forming the n-side GaN layer by organic metal vapor deposition with the growth temperature set within the range of 500 to 1000° C., such that the n-side GaN layer is formed between the n-type contact layer and the active layer.

Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.

Abstract: A manufacture method for zinc oxide (ZnO) based semiconductor crystal includes providing a substrate having a Zn polarity plane; and reacting at least zinc (Zn) and oxygen (O) on the Zn polarity plane of said substrate to grow ZnO based semiconductor crystal on the Zn polarity plane of said substrate in a Zn rich condition. (a) An n-type ZnO buffer layer is formed on a Zn polarity plane of a substrate. (b) An n-type ZnO layer is formed on the surface of the n-type ZnO buffer layer. (c) An n-type ZnMgO layer is formed on the surface of the n-type ZnO layer. (d) A ZnO/ZnMgO quantum well layer is formed on the surface of the n-type ZnMgO layer, by alternately laminating a ZnO layer and a ZnMgO layer. @(e) A p-type ZnMgO layer is formed on the surface of the ZnO/ZnMgO quantum well layer. (f) A p-type ZnO layer is formed on the surface of the p-type ZnMgO layer. @(g) An electrode is formed on the n-type ZnO layer and p-type ZnO layer. The n-type ZnO layer is formed under a Zn rich condition at the step (b).

Abstract: The present invention provides a method for depositing or growing a group III-nitride layer, e.g. GaN layer (5), on a substrate (1), the substrate (1) comprising at least a Ge surface (3), preferably with hexagonal symmetry. The method comprises heating the substrate (1) to a nitridation temperature between 400° C. and 940° C. while exposing the substrate (1) to a nitrogen gas flow and subsequently depositing the group III-nitride layer, e.g. GaN layer (5), onto the Ge surface (3) at a deposition temperature between 100° C. and 940° C. By a method according to embodiments of the invention, a group III-nitride layer, e.g. GaN layer (5), with good crystal quality may be obtained. The present invention furthermore provides a group III-nitride/substrate structure formed by the method according to embodiments of the present invention and a semiconductor device comprising at least one such structure.

Abstract: There is provided a method of fabricating InGaAlN film on a silicon substrate, which comprises the following steps of forming a pattern structured having grooves and mesas on the silicon substrate, and depositing InGaAlN film on the surface of substrate, wherein the depth of the grooves is more than 6 nm, and the InGaAlN film formed on the mesas of both sides of the grooves are disconnected in the horizontal direction. The method may grow high quality, no crack and large area of InGaAlN film by simply treating the substrate. At the same time, there is also provided a method of fabricating InGaAlN light-emitting device by using the silicon substrate.

Abstract: A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.

Abstract: A nitride semiconductor device includes: a substrate having a principal surface; a first nitride semiconductor layer formed on the principal surface of the substrate and includes one or more convex portions whose side surfaces are vertical to the principal surface; and a second nitride semiconductor layer selectively grown on the side surfaces of the one or more convex portions of the first nitride semiconductor layer.

Abstract: Multi-layered carbon-based hardmask and method to form the same. The multi-layered carbon-based hardmask includes at least top and bottom carbon-based hardmask layers having different refractive indexes. The top and bottom carbon-based hardmask layer thicknesses and refractive indexes are tuned so that the top carbon-based hardmask layer serves as an anti-reflective coating (ARC) layer.

Abstract: A fabrication method of fabricating a structure capable of being used for generation or detection of electromagnetic radiation includes a forming step of forming a layer containing a compound semiconductor on a substrate at a substrate temperature below about 300° C., a first heating step of heating the substrate with the layer in an ambience containing arsenic, and a second heating step of heating the substrate with the layer at the substrate temperature above about 600° C. in a gas ambience incapable of chemically reacting on the compound semiconductor. Structures of the present invention capable of being used for generation or detection of electromagnetic radiation can be fabricated using the fabrication method by appropriately regulating the substrate temperature, the heating time, the gas ambience and the like in the second heating step.

Abstract: The present invention provides a method for depositing or growing a group III-nitride layer, e.g. GaN layer (5), on a substrate (1), the substrate (1) comprising at least a Ge surface (3), preferably with hexagonal symmetry. The method comprises heating the substrate (1) to a nitridation temperature between 400° C. and 940° C. while exposing the substrate (1) to a nitrogen gas flow and subsequently depositing the group III-nitride layer, e.g. GaN layer (5), onto the Ge surface (3) at a deposition temperature between 100° C. and 940° C. By a method according to embodiments of the invention, a group III-nitride layer, e.g. GaN layer (5), with good crystal quality may be obtained. The present invention furthermore provides a group III-nitride/substrate structure formed by the method according to embodiments of the present invention and a semiconductor device comprising at least one such structure.

Abstract: Methods and apparatus for producing a gallium nitride semiconductor on insulator structure include: bonding a single crystal silicon layer to a transparent substrate; and growing a single crystal gallium nitride layer on the single crystal silicon layer.

Abstract: A nitride semiconductor device of the present invention includes: a nitride semiconductor laminated structure comprising an n type first layer, a second layer containing a p type dopant laminated on the first layer, and an n type third layer laminated on the second layer, each layer of the nitride semiconductor laminated structure made of a group III nitride semiconductor, and the nitride semiconductor laminated structure formed with a first trench and a second trench, the first trench penetrating the second layer from the third layer and reaching at least the first layer, and the second trench having a side wall extending from the first, second, to third layers and being different from the first trench; a surface insulating film containing at least silicon nitride formed such that the surface insulating film covers the surface of the first trench; a gate insulating film formed on the side wall of the second trench such that the gate insulating film extends over the first, second, and third layers; and a gate

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A process for fabricating a III-nitride power semiconductor device which includes forming a gate structure while providing a protective body over areas that are to receive power electrodes.

Abstract: A process for preparing a nitride based semiconductor device in accordance with the present invention comprises growing a high temperature AlN single crystal layer on a substrate; growing a first GaN layer on the high temperature AlN single crystal layer in a first V/III ratio, under a first pressure of 300 Torr or more, such that the predominant direction of growth is the lateral direction; and growing a second GaN layer on the first GaN layer in a second V/III ratio lower than the first V/III ratio, under a second pressure lower than the first pressure such that the predominant direction of growth is the lateral direction.

Abstract: A III-V group nitride system semiconductor substrate is of a III-V group nitride system single crystal. The III-V group nitride system semiconductor substrate has a flat surface, and a vector made by projecting on a surface of the substrate a normal vector of a low index surface closest to the substrate surface at an arbitrary point in a plane of the substrate is converged on a specific point or a specific region inside or outside the plane of the substrate.