Selective Deposition (epo) Patents (Class 257/E21.171)
  • Patent number: 7202166
    Abstract: Methods are provided for treating germanium surfaces in preparation for subsequent deposition, particularly gate dielectric deposition by atomic layer deposition (ALD). Prior to depositing, the germanium surface is treated with plasma products or thermally reacted with vapor reactants. Examples of surface treatments leave oxygen bridges, nitrogen bridges, —OH, —NH and/or —NH2 terminations that more readily adsorb ALD reactants. The surface treatments avoid deep penetration of the reactants into the germanium bulk but improve nucleation.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 10, 2007
    Assignee: ASM America, Inc.
    Inventor: Glen Wilk
  • Patent number: 7148128
    Abstract: We describe a system of electronically active inks which may include electronically addressable contrast media, conductors, insulators, resistors, semiconductive materials, magnetic materials, spin materials, piezoelectric materials, optoelectronic, thermoelectric or radio frequency materials. We further describe a printing system capable of laying down said materials in a definite pattern. Such a system may be used for instance to: print a flat panel display complete with onboard drive logic; print a working logic circuit onto any of a large class of substrates; print an electrostatic or piezoelectric motor with onboard logic and feedback or print a working radio transmitter or receiver.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: December 12, 2006
    Assignee: E Ink Corporation
    Inventor: Joseph M. Jacobson
  • Publication number: 20060258125
    Abstract: Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on the semiconductor substrate while in situ doping the epitaxial layer to suppress facet formation. Suppression of faceting during selective epitaxial growth by in situ doping of the epitaxial layer at a predetermined level rather than by manipulating spacer composition and geometry alleviates the stringent requirements on the device design and increases tolerance to variability during the spacer fabrication.
    Type: Application
    Filed: July 20, 2006
    Publication date: November 16, 2006
    Applicant: AmberWave Systems Corporation
    Inventors: Thomas Langdo, Anthony Lochtefeld
  • Patent number: 7122449
    Abstract: Methods for fabricating facetless semiconductor structures using commercially available chemical vapor deposition systems are disclosed herein. A key aspect of the invention includes selectively depositing an epitaxial layer of at least one semiconductor material on the semiconductor substrate while in situ doping the epitaxial layer to suppress facet formation. Suppression of faceting during selective epitaxial growth by in situ doping of the epitaxial layer at a predetermined level rather than by manipulating spacer composition and geometry alleviates the stringent requirements on the device design and increases tolerance to variability during the spacer fabrication.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: October 17, 2006
    Assignee: Amberwave Systems Corporation
    Inventors: Thomas A. Langdo, Anthony J. Lochtefeld